Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 6 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 6 recites “The method of claim
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Debnath, Demonstration of a small programmable quantum computer with atomic qubits, 2016.
Claim Element
Prior Art Reference:
Debnath, Demonstration of a small programmable quantum computer with atomic qubits, 2016.
1. (Original) A quantum processing unit1: for performing a quantum Fourier transform, the quantum processing unit comprising-
Abstract
Quantum computers can solve certain problems more efficiently than any possible conventional computer. Small quantum algorithms have been demonstrated on multiple quantum computing platforms, many specifically tailored in hardware to implement a particular algorithm or execute a limited number of computational paths1–10. Here we demonstrate a five-qubit trapped-ion quantum computer that can be programmed in software to implement arbitrary quantum algorithms by executing any sequence of universal quantum logic gates. We compile algorithms into a fully connected set of gate operations that are native to the hardware and have a mean fidelity of 98 per cent. Reconfiguring these gate sequences provides the flexibility to implement a variety of algorithms without altering the hardware. As examples, we implement the Deutsch Jozsa11 and Bernstein–Vazirani12 algorithms with average success rates of 95 and 90 per cent, respectively. We also perform a coherent quantum Fourier transform13,14 on five trapped-ion qubits for phase estimation and period finding with average fidelities of 62 and 84 per cent, respectively. This small quantum computer can be scaled to larger numbers of qubits within a single register, and can be further expanded by connecting several such modules through ion shuttling15 or photonic quantum channels
a first qubit, qo;
p. 64 Fig. 1; (Examiner finds Fig. 1 qubit 5 teaches first qubit; see annotation below)
p. 63 (“Whereas most physical platforms have nearest-neighbour interactions only, a multi-qubit trapped-ion system features an intrinsic long-range interaction that is optically gated and connects any pair of qubits”);
p. 64, Fig. 1 (“For the two-qubit gates between qubits i and j, we can continuously tune the nonlinear gate angle χij. This represents a system of qubits with fully connected and reconfigurable spin–spin Ising interactions (inset).”)
(It is the Examiner’s position that the claimed invention does not exclude additional connections.)
Annotations added by Examiner:
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338
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- a second qubit, q1, connected directly to the first qubit; -
p. 64 Fig. 1; (Examiner finds Fig. 1 qubit 2 teaches second qubit; see annotation below; Examiner finds the lines in the figure reproduced below in Fig. 1 teach “direct connections”; it is the Examiner’s position that the claimed invention does not exclude additional connections);
p. 63 (“Whereas most physical platforms have nearest-neighbour interactions only, a multi-qubit trapped-ion system features an intrinsic long-range interaction that is optically gated and connects any pair of qubits”);
p. 64, Fig. 1 (“For the two-qubit gates between qubits i and j, we can continuously tune the nonlinear gate angle χij. This represents a system of qubits with fully connected and reconfigurable spin–spin Ising interactions (inset).”)
Annotations added by Examiner:
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478
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a plurality of central qubits, q2 to qN-1, where N is the total number of qubits including the first qubit and the second qubit and the plurality of central qubits, each central qubit being connected directly to the first qubit and to the second qubit.
p. 64 Fig. 1; (Examiner finds Fig. 1 qubits 4 and 3 teach recited central qubits q2 and q3 respectively; see annotated Fig. 1 below; anticipation does not require exact terminology to anticipate; i.e. it is Examiner’s position that Debnath does not need to use the term “central” to describe its qubits in order to anticipate the claim; also, Applicant’s specification is consistent with this interpretation—see Applicant’s published spec at para. 46; it is the Examiner’s position that the claimed invention does not exclude additional connections);
p. 63 (“Whereas most physical platforms have nearest-[neighbor] interactions only, a multi-qubit trapped-ion system features an intrinsic long-range interaction that is optically gated and connects any pair of qubits”);
p. 64, Fig. 1 (“For the two-qubit gates between qubits i and j, we can continuously tune the nonlinear gate angle χij. This represents a system of qubits with fully connected and reconfigurable spin–spin Ising interactions (inset).”)
Annotations added by Examiner:
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283
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2. (Original) The quantum processing unit of claim 1, wherein the first qubit, second qubit and plurality of central qubits are logical qubits that each comprise one or more physical qubits.
Abstract, Fig. 1; p. 63:
Implementing a scalable programmable quantum computing architecture requires high-fidelity initialization and detection at the individual qubit level and pristine control of interactions between qubits. Whereas most physical platforms have nearest-neighbour interactions only, a multi-qubit trapped-ion system features an intrinsic long-range interaction that is optically gated and connects any pair of qubits17,18
At the hardware level, the processor consists of trapped 171Yb+ atomic ion qubits . . .
7. (Original) A quantum processing unit2 for performing a quantum Fourier transform, the quantum processing unit comprising N qubits qo to qN-1, wherein the qubits are arranged in a four-degree chain such that all qubits qk except for the first qubit qo, second qubit q1, penultimate qubit qN2andfinal qubit qN-1 are connected to four other qubits qk-2,qk-1,qk+1 andqk+2- 8
p. 64 Fig. 1:
(Examiner’s position is that claim 7 does not exclude extra connections; as such, the extra connections in Fig. 1 do not cause Debnath to be deficient)
Annotations added by Examiner:
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8. (Original) The quantum processing unit of claim 7 comprising at least five qubits.
p. 64 Fig. 1:
(Examiner’s position is that claim 7 does not exclude extra connections; as such, the extra connections in Fig. 1 do not cause Debnath to be deficient)
Annotations added by Examiner:
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455
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9. (Currently Amended) The quantum processing unit of claim 7 wherein:- the first qubit qo is connected to qubits q1 and q2; - the second qubit q1 is connected to qubits qo, q2 and q3; - the penultimate qubit qN-2isconnected to qubitsqN-4,qN-3andqN-1and - the final qubit qN-1 is connected to qubitsqN-3 and qN-2-
p. 64 Fig. 1:
(Examiner’s position is that claim 7 does not exclude extra connections; as such, the extra connections in Fig. 1 do not cause Debnath to be deficient)
Annotations added by Examiner:
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609
863
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10. (Currently Amended) The quantum processing unit of claim 7, wherein the qubits q₀ to qN-1 are logical qubits that each comprise one or more physical qubits.
Abstract, Fig. 1; p. 63:
Implementing a scalable programmable quantum computing architecture requires high-fidelity initialization and detection at the individual qubit level and pristine control of interactions between qubits. Whereas most physical platforms have nearest-neighbour interactions only, a multi-qubit trapped-ion system features an intrinsic long-range interaction that is optically gated and connects any pair of qubits17,18
At the hardware level, the processor consists of trapped 171Yb+ atomic ion qubits . . .
Allowable Subject Matter
Claims 3-5 and 11-22 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The following prior art is relevant to Applicant’s specification:
US-11562277-B2 (abstract, Fourier QFT circuits)
Linke, Experimental comparison of two quantum computing architectures pp. 3305–3310, (Year: 2017) (Fig. 1 teaches fully connected qubit connectivity graphs)
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALBERT M PHILLIPS, III whose telephone number is (571)270-3256. The examiner can normally be reached 10a-6:30pm EST M-F.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ann J Lo can be reached at (571) 272-9767. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ALBERT M PHILLIPS, III/ Primary Examiner, Art Unit 2159
1 Examiner finds “quantum processing unit” necessarily includes non-transitory computer hardware by definition and when read broadly in light of the specification.
2 See note 1 above.
Prosecution Insights