Prosecution Insights
Last updated: April 19, 2026
Application No. 18/845,632

Device Having a Communication Apparatus for Data Transfer Via a Data-Transfer Bus

Non-Final OA §103§112
Filed
Sep 10, 2024
Examiner
WASEL, MOHAMED A
Art Unit
2454
Tech Center
2400 — Computer Networks
Assignee
VITESCO TECHNOLOGIES GMBH
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
2y 9m
To Grant
99%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allow Rate
743 granted / 826 resolved
+32.0% vs TC avg
Moderate +11% lift
Without
With
+11.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
16 currently pending
Career history
842
Total Applications
across all art units

Statute-Specific Performance

§101
12.4%
-27.6% vs TC avg
§103
24.3%
-15.7% vs TC avg
§102
32.9%
-7.1% vs TC avg
§112
11.4%
-28.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 826 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This action is responsive to claims filed on September 10, 2024. Claims 1-10 are pending and presented for examination. Authorization for Internet Communication To expedite prosecution, filing a written authorization for internet communication is recommended. Doing so permits the USPTO to communicate using email to schedule interviews and/or discuss other aspects of the application. Without a written authorization in place, the USPTO cannot respond to email communications. The preferred method of providing authorization is by filing form PTO/SB/439, available at: https://www.uspto.gov/patent/forms/forms. See MPEP § 502.03. Abstract Applicant is reminded of the proper language and format for an abstract of the disclosure. The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words. It is important that the abstract not exceed 150 words in length since the space provided for the abstract on the computer tape used by the printer is limited. The form and legal phraseology often used in patent claims, such as "means" and "said," should be avoided. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details. The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, "The disclosure concerns," "The disclosure defined by this invention," "The disclosure describes," etc. Examiner's note: It is recommended to amend the abstract to briefly describe the claimed invention according to the above guidelines. The abstract filed on September 10, 2024 exceeds 150 words in length. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 7-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 7 recites “a data transmission bus” in lines 3 and 12 of the claim. It is unclear whether the cited “a data transmission bus” refers to a single claim element or two different data transmission buses. Appropriate corrections and/or clarifications are required where applicable. Claims 8-10 are rejected under the same rationale as claim 7 due to their dependency. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-10 are rejected under 35 U.S.C. 103 as being unpatentable over Assmann et al “Assmann”, US-PGPub. No. 20230070899 in view Vandersteegen, US-PGPub. No. 20160261426. As per claim 1, Assmann teaches a device (Fig. 1, Paragraph(s) [0101]; battery management controller (BMC)) comprising: a communication apparatus for sending and/or receiving data via a data transmission bus (Fig. 7 – transmit and receive lines (TX & TX), Paragraph(s) [0121]; the central control unit ZS and the battery module 1 can exchange data and information via the transmit and receive lines (TX and RX) of the cable harness 20). Assmann further teaches the controller has an interface. An interface is a connecting unit which makes it possible to communicate information to the controller which can then be processed in the controller (Paragraph(s) [0026])); a device-side connection apparatus to connect the device to the data transmission bus (Paragraph(s) [0034]; a connector device for connecting a cable harness to the battery management controller interface); wherein the device-side connection apparatus includes electrical contacts configured to be connected in pairs to corresponding bus-side electrical contacts of a bus-side connection apparatus on the data transmission bus (Paragraph(s) [0114]; four pairs of battery modules interconnected in series are also interconnected in parallel such that the capacities of all the pairs of battery modules are added to one another); wherein the electrical contacts comprise a data contact to transmit a data signal, a first supply contact to transmit a first supply potential, a second supply contact to transmit a second supply potential different from said first supply potential, and a third contact (Paragraph(s) [0046]; the first potential can, for example, be connected to ground (GND), whilst the second potential is 5 volts. If the potentials GND, 5V, 5V, GND, GND are, for example, then present at a connector with 5 addressing pins, these potentials are transmitted to the battery management controller interface where they are interpreted by the battery management controller as “01100”. Assmann further teaches the address contacts of the battery management controller interface can normally also be connected to a first potential and have a second potential applied to them by contact with the addressing pin (Paragraph(s) [0037]); and a voltmeter to measure a potential present at the third contact with respect to the first supply potential and/or the second supply potential (Paragraph(s) [0015-0016]; a battery module comprises at least one battery cell and a cell measuring device “voltmeter” for measuring the state of the battery cell(s). In addition, Assman teaches the controller can read or measure the assignment of the address contacts of the interface in order to allocate an address); wherein the communication apparatus assigns an address to the device for sending and/or receiving the data via the data transmission bus said address selected from multiple different addresses on the basis of the potential measured at the third contact (Abstract, Paragraph(s) [0021], [0029], [0102]; the unassigned address contact is interpreted by the microcontroller μC as “1”, and the address contacts 12 which are connected to ground are interpreted as “0”. The battery management controller thus allocates the address “1000” to the battery module). Assmann fails to explicitly teach but Vandersteegen teaches wherein assigning an address to the device for sending and/or receiving the data via the data transmission bus said address selected from multiple different predefined addresses (Paragraph(s) [0007], [0067]; providing good and efficient unique address allocation for an integrated circuit node on a communication bus. Vandersteegen further teaches a detecting circuit for detecting a state of the at least one static address selection terminal and a communication circuit for receiving and/or transmitting data over a data bus (Paragraph(s) [0015]). In addition, Vandersteegen teaches terminal connectors of the node can be efficiently used, where four pins can be used to configure 34=81 different addresses “multiple different predefined addresses” (Paragraph(s) [0053], [0061])). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the applicants' invention to combine the teachings of Assmann and Vandersteegen in order to provide an efficient address allocation for an integrated circuit node on a communication bus (Vandersteegen – Paragraph [0007]). As per claim 2, Assmann teaches wherein the communication apparatus selects the address from at least four different predefined addresses (Paragraph(s) [0102]; the battery management controller interface BMCS has four address contacts 12). As per claim 3, Assmann teaches wherein the communication apparatus identifies a fault if the measured potential corresponds to the first supply potential or the second supply potential as a fault (Paragraph(s) [0053], [0116]). As per claim 4, Assmann teaches wherein the communication apparatus selects the address using an assignment table defining mutually non-overlapping sub-ranges within the potential range between the first supply potential and the second supply potential and addresses respectively assigned to these sub-ranges (Paragraph(s) [0057], [0061-0062]). As per claim 5, Assmann teaches wherein the device-side connection apparatus includes an electrical plug connector configured to be connected in pairs to corresponding bus-side electrical plug connectors of the bus-side connection apparatus (Paragraph(s) [0034], [0105]). As per claim 6, Assmann teaches the device as claimed in claim 1, further comprising: a first resistor via which the third contact is connected to the first supply contact and/or a second resistor via which the third contact is connected to the second supply contact (Paragraph(s) [0027]; as shown on Fig. 1, the various lines on the BMC system include at least one resistor “R”). As per claim 7, Assmann teaches data transmission system (Paragraph(s) [0042], [0117]; controlled area network (CAN)) comprising: a data transmission bus with at least one data line for transmitting a data signal, a first supply line for transmitting a first supply potential, and a second supply line for transmitting a second supply potential different from said first supply potential (Paragraph(s) [0046], [0089]; the first potential can, for example, be connected to ground (GND), whilst the second potential is 5 volts. If the potentials GND, 5V, 5V, GND, GND are, for example, then present at a connector with 5 addressing pins, these potentials are transmitted to the battery management controller interface where they are interpreted by the battery management controller as “01100”. Assmann further teaches the address contacts of the battery management controller interface can normally also be connected to a first potential and have a second potential applied to them by contact with the addressing pin (Paragraph(s) [0037]); a device (Fig. 1, Paragraph(s) [0101]; battery management controller (BMC)) connected to the data transmission bus, the device comprising: a communication apparatus for sending and/or receiving data via a data transmission bus (Fig. 7 – transmit and receive lines (TX & TX), Paragraph(s) [0121]; the central control unit ZS and the battery module 1 can exchange data and information via the transmit and receive lines (TX and RX) of the cable harness 20). Assmann further teaches the controller has an interface. An interface is a connecting unit which makes it possible to communicate information to the controller which can then be processed in the controller (Paragraph(s) [0026])), and a device-side connection apparatus to connect the device to the data transmission bus (Paragraph(s) [0034]; a connector device for connecting a cable harness to the battery management controller interface); wherein the device-side connection apparatus includes electrical contacts configured to be connected in pairs to corresponding bus-side electrical contacts of a bus-side connection apparatus on the data transmission bus (Paragraph(s) [0034]; a connector device for connecting a cable harness to the battery management controller interface); wherein the electrical contacts comprise a data contact to transmit a data signal, a first supply contact to transmit a first supply potential, a second supply contact to transmit a second supply potential different from said first supply potential, and a third contact (Paragraph(s) [0046]; the first potential can, for example, be connected to ground (GND), whilst the second potential is 5 volts. If the potentials GND, 5V, 5V, GND, GND are, for example, then present at a connector with 5 addressing pins, these potentials are transmitted to the battery management controller interface where they are interpreted by the battery management controller as “01100”. Assmann further teaches the address contacts of the battery management controller interface can normally also be connected to a first potential and have a second potential applied to them by contact with the addressing pin (Paragraph(s) [0037]); wherein the device further includes a voltmeter to measure a potential present at the third contact with respect to the first supply potential and/or the second supply potential (Paragraph(s) [0015-0016]; a battery module comprises at least one battery cell and a cell measuring device “voltmeter” for measuring the state of the battery cell(s). In addition, Assman teaches the controller can read or measure the assignment of the address contacts of the interface in order to allocate an address); wherein the communication apparatus assigns an address to the device for sending and/or receiving the data via the data transmission bus, said address selected from multiple different addresses on the basic of the potential measured at the third contact (Abstract, Paragraph(s) [0021], [0029], [0102]; the unassigned address contact is interpreted by the microcontroller μC as “1”, and the address contacts 12 which are connected to ground are interpreted as “0”. The battery management controller thus allocates the address “1000” to the battery module); a respective bus-side connection apparatus on the data transmission bus (Paragraph(s) [0034]; a connector device for connecting a cable harness to the battery management controller interface), having bus-side electrical contacts that are connected in pairs to the corresponding electrical contacts of the device-side connection apparatus of the respective device and comprise at least one bus-side data contact for transmitting the data signal (Paragraph(s) [0114]; four pairs of battery modules interconnected in series are also interconnected in parallel such that the capacities of all the pairs of battery modules are added to one another), a bus-side first supply contact for transmitting the first supply potential, a bus-side second supply contact for transmitting the second supply potential, and a bus-side additional contact (Paragraph(s) [0046]; the first potential can, for example, be connected to ground (GND), whilst the second potential is 5 volts. If the potentials GND, 5V, 5V, GND, GND are, for example, then present at a connector with 5 addressing pins, these potentials are transmitted to the battery management controller interface where they are interpreted by the battery management controller as “01100”. Assmann further teaches the address contacts of the battery management controller interface can normally also be connected to a first potential and have a second potential applied to them by contact with the addressing pin (Paragraph(s) [0037]); and for each of the at least one bus-side connection apparatus on the data transmission bus: a third resistor, via which the bus-side additional contact of the bus-side connection apparatus in question is connected to the bus-side first supply contact of the bus-side connection apparatus in question, and/or a fourth resistor via which the bus-side additional contact of the bus-side connection apparatus in question is connected to the bus-side second supply contact of the bus-side connection apparatus in question (Paragraph(s) [0027], [0046]; as shown on Fig. 1, the various lines on the BMC system include at least one resistor “R” connected to the ground (GND) “first supply contact” and another resistor “R” on the voltage line (5V) “second supply contact”; wherein, in the case of multiple bus-side connection apparatuses provided on the data transmission bus, the respective resistor arrangements, formed from a respective third resistor and/or a respective fourth resistor, all differ from one another (Fig. 1, Paragraph(s) [0027], [0043], [0101-0102]). Assmann fails to explicitly teach but Vandersteegen teaches wherein assigning an address to the device for sending and/or receiving the data via the data transmission bus said address selected from multiple different predefined addresses (Paragraph(s) [0007], [0067]; providing good and efficient unique address allocation for an integrated circuit node on a communication bus. Vandersteegen further teaches a detecting circuit for detecting a state of the at least one static address selection terminal and a communication circuit for receiving and/or transmitting data over a data bus (Paragraph(s) [0015]). In addition, Vandersteegen teaches terminal connectors of the node can be efficiently used, where four pins can be used to configure 34=81 different addresses “multiple different predefined addresses” (Paragraph(s) [0053], [0061])). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the applicants' invention to combine the teachings of Assmann and Vandersteegen in order to provide an efficient address allocation for an integrated circuit node on a communication bus (Vandersteegen – Paragraph [0007]). As per claim 8, Assmann teaches wherein the bus-side connection apparatus has one or more bus-side electrical plug connectors to connect the respective device to the data transmission bus, configured to be connected in pairs to corresponding electrical plug connectors of the device-side connection apparatus of the respective device (Paragraph(s) [0034], [0114]). As per claim 9, Assmann teaches wherein the resistor arrangement formed from the third resistor and/or the fourth resistor is formed at least partially in the bus-side connection apparatus in question (Fig. 1, Paragraph(s) [0027], [0102]). As per claim 10, Assmann teaches the data transmission system as claimed in claim 7, furthermore comprising: a control device connected to the data transmission bus, the control device having a communication apparatus to send and/or receive data via the data transmission bus (Paragraph(s) [0089], [0105]); wherein the resistor arrangement formed from the third resistor and/or the fourth resistor for each bus-side connection apparatus provided on the data transmission bus, is formed at least partially in the control device and is connected to the bus-side connection apparatus in question via an additional line (Fig. 1, Paragraph(s) [0012], [0105-0106]). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Please refer to form PTO-892 (Notice of Reference Cited) for a list of relevant prior art. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMED A WASEL whose telephone number is (571) 272-2669. The examiner can normally be reached Mon-Fri (8:00 am – 4:30 pm). If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Glenton Burgess can be reached on (571)272-3949. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free)? If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHAMED A. WASEL/Primary Examiner, Art Unit 2454
Read full office action

Prosecution Timeline

Sep 10, 2024
Application Filed
Feb 27, 2026
Non-Final Rejection — §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12602458
ACCESS MANAGEMENT AND CONTROL OF A DISPLAY UNIT MENU OPTIONS
2y 5m to grant Granted Apr 14, 2026
Patent 12591648
BIOMETRIC AUTHENTICATION SYSTEM, TEMPLATE UPDATING METHOD THEREFOR, STORAGE MEDIUM, BIOMETRIC AUTHENTICATION CLIENT DEVICE, AND BIOMETRIC AUTHENTICATION SERVER DEVICE
2y 5m to grant Granted Mar 31, 2026
Patent 12580906
INTERFACE FOR CREATING A CERTIFICATE-ENFORCED NETWORK FOR DEVICES IN A LOGICAL GROUP
2y 5m to grant Granted Mar 17, 2026
Patent 12580889
SPECIFIC USE OF A GATEWAY IN OPERATIONAL TECHNOLOGY NETWORKS
2y 5m to grant Granted Mar 17, 2026
Patent 12581051
DISPLAY DEVICE AND METHOD FOR PROVIDING STEREOSCOPIC IMAGE THE SAME
2y 5m to grant Granted Mar 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
99%
With Interview (+11.4%)
2y 9m
Median Time to Grant
Low
PTA Risk
Based on 826 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month