DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is in response to Application filed on 09/10/2024
Application is a 371 of PCT/JP2023/006026 02/20/2023
Application claims a FP date of 03/11/2022
Claim 1 is independent
Claims 1-6 are pending
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in the instant Application.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 09/10/2024 and 06/09/2025 are in compliance with the provisions of 37 CFR 1.97 and 37 CFR 1.98(a)(4). Accordingly, the information disclosure statements are being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “charge storage unit” and “control unit” in claims 1 and 6.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 4-6 are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Applicant disclosed prior art Akahori et al. (U.S. Patent Publication Number 2022/0146684).
Regarding Claim 1, Akahori discloses a photoelectric conversion circuit (Fig 1-light receiving uni4 3; pixel 321 in Fig 3) comprising:
a light receiving element that outputs charges corresponding to an amount of exposure to a predetermined wiring line (In Fig 3 and in ¶0064 - ¶0069, Akahori discloses that the pixel 321 includes a photo electric conversion device PD);
an output circuit (In ¶0068, Akahori discloses that the pixel 321 distributes the electric charge generated by performing electric conversion of incident light to the charge accumulating units CS (reading units RU) and outputs voltage signals to the processing circuit 325) that, when an instruction signal is input, outputs charges corresponding to a period during which the instruction signal is input to the predetermined wiring line (In ¶0058, Akahori discloses that the control circuit 322 controls operations of elements in accordance with an instruction from the timing control unit 41 of the processing unit 4);
a plurality of charge storage units (Fig 3; In each of the pixel signal reading units RU an electric charge accumulating unit CS is composed of the floating diffusion FD and the electric charge accumulating capacitor C); and
a transfer circuit that transfers the charges output to the predetermined wiring line to each of the plurality of charge storage units (As shown in Fig 3, Akahori discloses that the pixel 321 reading unit RU1 includes a reading gate transistor G1 and in ¶0073-¶0079 he also discloses that the scanning circuit causes the gate transistor g1 to be in an ON state and charge acquired through photoelectric conversion is accumulated in the charge accumulating unit CS1 through the reading gate transistor G1).
Regarding Claim 4, Akahori discloses further comprising a second switch that is provided between the light receiving element and the predetermined wiring line (Fig 3 – element signal reading unit RU2 that has configuration similar to RU1. Also see ¶0076-¶0077; Further in ¶0111 Akahori discloses that the vertical scanning circuit 323 sequentially causes the reading gate transistors G2 and G3 to be the on state during an accumulation period Ta at a timing at which the drain gate transistor GD is returned to the off state).
Regarding Claim 5, Akahori discloses further comprising a third switch that is connected in parallel to the light receiving element (Fig 3 – element signal reading unit RU3 that has configuration similar to RU1. Also see ¶0078-¶0079).
Regarding Claim 6, Akahori discloses a control unit (Timing control unit 41, control circuit 322) that controls the transfer circuit (the timing control unit controls the timing at which various control signals are output and the measurement control unit 43 selects the mode for measurement and the control circuit 322 performs overall control of the image sensor 32), wherein the transfer circuit (Fig 3 – pixel signal reading circuits RU1, RU2, RU3) includes a plurality of transistors that are connected to each of the plurality of charge storage units (Fig 3; ¶0058-¶0081), and the control unit controls each of the plurality of transistors (In ¶0060, Akahori further discloses that the signal processing circuit 325 performs processing of voltage output from each column in the pixel circuits).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Applicant disclosed prior art Akahori et al. (U.S. Patent Publication Number 2022/0146684) in view of Applicant disclosed prior art Mahara (U. S. Patent Publication Number 2012/0193179 A1).
Regarding Claim 2, Akahori fails to clearly disclose wherein the output circuit includes a current source, and a first switch that is provided between the current source and the predetermined wiring line and that is turned on based on the instruction signal and turned off based on a stop signal.
Instead in a similar endeavor, Mahara discloses wherein the output circuit includes a current source (Fig 5 – transistor 1100 is a current source), and a first switch (Fig 5 – switch 1101) that is provided between the current source (Fig 5 – transistor 1100 is a current source) and the predetermined wiring line (Fig 5 – the wiring line connected to the output of the light receiving element 1000) and that is turned on based on the instruction signal and turned off based on a stop signal (In ¶0058-¶0070, Mahara teaches that the switch unit 1101 is controlled to be on (closed) and off(open) according to a signal EN_PR. The other end is connected to a drain of transistor 110 – which is a current source).
Akahori and Mahara are combinable because both are related to light receiving units.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a current source as taught by Mahara in the imaging module disclosed by Akahori.
The suggestion/motivation for doing so would have been to have “a current corresponding to the power supply voltage Vdd and the reference voltage Vref as with such a configuration, a reverse bias is applied to the light receiving element 1000” as disclosed by Mahara in ¶0060.
Therefore, it would have been obvious to combine Akahori and Mahara to obtain the invention as specified in claim 2.
Allowable Subject Matter
Claim 3 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Reference Cited
The following prior art made of record but not relied upon is considered pertinent to applicant's disclosure.
Katayama (U.S. Patent Publication Number 2021/0255282 A1) discloses relates to a light receiving element, a distance measurement module, and an electronic device that enable signal degradation during charge transfer to be reduced. The light receiving element includes a pixel at least including: a first charge holding unit and a second charge holding unit each of which holds an electric charge generated by a photodiode; a first transfer transistor that transfers the electric charge to the first charge holding unit; and a second transfer transistor that transfers the electric charge to the second charge holding unit, in which the first and second transfer transistors each include a vertical transistor including a vertical gate electrode portion. The present technology can be applied to, for example, a light receiving element that performs distance measurement by an indirect ToF method, and the like.
Conclusion
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/PADMA HALIYUR/Primary Examiner, Art Unit 2639 July 30, 2026
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