Prosecution Insights
Last updated: April 19, 2026
Application No. 18/846,534

CONTROL SYSTEM FOR CONTROLLING A TRANSISTOR, ELECTRIC VEHICLE COMPRISING THE CONTROL SYSTEM, METHOD FOR CONTROLLING THE TRANSISTOR

Non-Final OA §102§103
Filed
Sep 12, 2024
Examiner
CHEN, SIBIN
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Lightyear Ipco B V
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
92%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allow Rate
886 granted / 1023 resolved
+18.6% vs TC avg
Moderate +5% lift
Without
With
+5.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
16 currently pending
Career history
1039
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
42.2%
+2.2% vs TC avg
§102
40.9%
+0.9% vs TC avg
§112
14.2%
-25.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1023 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4, 9, 10, 14, and 18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zojer (US 2018/0131365). Regarding claim 1, fig. 3 of Zojer discloses a control system for controlling a transistor comprising a gate, a source and a drain, the control system comprising: a gate connector connectable to the gate of the transistor; a voltage connector connectable to a voltage supply; a first electrical path extending from the voltage connector to the gate connector; a second electrical path extending from the voltage connector to the gate connector, wherein the second electrical path comprises a first resistive component, wherein the first electrical path and the second electrical path are at least partly parallel to each other; wherein the control system further comprises a control unit which is adapted to: connect the voltage supply to the gate via the first electrical path to allow the voltage supply to supply a first voltage via the first electrical path to the gate connector when the transistor is in a first state; control the voltage supply to apply the first voltage via the first electrical path to the gate connector to switch the transistor from the first state to a second state; disconnect the voltage supply and the gate from each other via the first electrical path when the transistor is in the second state; connect the voltage supply to the gate via the second electrical path to allow the voltage supply to supply a second voltage via the second electrical path to the gate connector when the transistor is in the second state; control the voltage supply to apply the second voltage via the second electrical path to the gate connector, wherein the second electrical path is adapted to conduct a current from the voltage connector via the first resistive component to the gate connector based on a leakage current of the transistor. Regarding claim 2, fig. 3 of Zojer discloses wherein the first resistive component is arranged to reduce, in response to the current, a gate voltage at the gate connector to a value lower than the first voltage to switch the transistor from the second state to the first state. Regarding claim 3, fig. 3 of Zojer discloses wherein the control system further comprises a first switch arranged in the first electrical path to connect the voltage supply to the gate via the first electrical path. Regarding claim 4, fig. 3 of Zojer discloses comprising a pull-up driver, wherein the first switch is controlled by the pull-up driver adapted to generate a pulse to switch the first switch. Regarding claim 9, fig. 3 of Zojer discloses wherein the first electrical path and the second electrical path are arranged in serial connection to the gate of the transistor. Regarding claim 10, fig. 3 of Zojer discloses wherein the control system further comprises a second switch arranged in the second electrical path to connect the voltage supply to the gate via the second electrical path. Regarding claim 14, fig. 3 of Zojer discloses wherein the transistor is a HEMT, preferably a GaN HEMT. Regarding claim 18, this claim is merely a method to operate the circuit having structure recited in claim 1. Since Zojer above teaches the structure, the method to operate such a circuit is similarly disclosed. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 5-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zojer. Regarding claim 5, Zojer discloses the device as indicated above except where the first electrical path further comprises a second resistive component. However, fig. 3c of Zojer describes where both first and second resistive paths are activatable and de-activatable. It would have been an obvious matter of design choice to the ordinary artisan before the effective filing date of the claimed invention to implement a resistive component in the first electrical path to control the current in the path for controlling the gate of the transistor, since it was well known in the art that resistors are implemented to control current. Regarding claims 6-8, Zojer discloses the claimed invention except for the values of the first and second resistive components. It would have been obvious to the ordinary artisan before the effective filing date of the claimed invention to implement the claims resistive values, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Claim(s) 11-13 and 20-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zojer in view of Ikeda (US 2020/0014295). Regarding claim 11, Zojer discloses the device as indicated above except for the leakage current detection system as claimed. However, fig. 1 and 2 of Ikeda discloses a leakage current detection system [111, 112] (par. 48) configured to determine the leakage current of the transistor based on a voltage over the first resistive component [109]. In view of such teaching, it would have been obvious to the ordinary artisan before the effective filing date of the claimed invention to modify the invention as indicated above by incorporating the leakage current detection system as taught in Ikeda for the purpose of utilizing a suitable and well-known type of leakage current detection. Regarding claim 12, the combination as indicated above discloses wherein the leakage current detection system is configured to provide a signal representative of the leakage current of the transistor to the control unit [e.g. VDET and PWM SIGNAL to 110], wherein the control unit is configured, in response of the signal, to switch the transistor from the second state to the first state. Regarding claim 13, the combination as indicated above discloses wherein the signal representative of the leakage current of the transistor is representative of a short circuit of the transistor. Regarding claims 20-22, these claims are merely methods to operate the circuit having structure recited in claims 11-13. Since Zojer in view of Ikeda above teaches the structure, the methods to operate such a circuit are similarly disclosed. Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zojer in view of Miao (US 2021/0175817). Regarding claim 15, Zojer discloses the device as indicated above except for a discharging switch arranged between the first electrical path and/or the second electrical path and a ground to connect the first electrical path to the ground and/or to connect the second electrical path to the ground. However, par. 35 of Miao discloses a discharging switch arranged between a gate path and a ground. In view of such teaching, it would have been obvious to the ordinary artisan before the effective filing date of the claimed invention to modify the invention as indicated above by incorporating the discharging switch as taught in Miao for the purpose of utilizing a suitable and well-known type of gate control. Claim(s) 16 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zojer in view of Gaither (US 2016/0152152). Regarding claim 16, Zojer discloses the device as indicated above except for an electric vehicle with the control system of claim 1. However, fig. 1 of Gaither discloses an electric vehicle with an electronic system with controls. In view of such teaching, it would have been obvious to the ordinary artisan before the effective filing date of the claimed invention to modify the invention as indicated above by incorporating the control system of Zojer in the electric vehicle of Miao for the purpose of utilizing a suitable and well-known type of implementation of a control system. Regarding claim 17, the combination as indicated above discloses an inverter [108] or power converter and at least one of a drive train [134] and a solar panel (par. 25), wherein the inverter or power converter comprises the transistor, wherein the drive train is for providing power to drive the electric vehicle, and wherein the solar panel is for generating electric energy based on solar energy, wherein the inverter or power converter is adapted to exchange electric energy with at least one of the drive train and the solar panel. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kinoshita describes a control system for a dual-gate bidirectional switch. Ishida describes a charge pump circuit with a control system for the gate of a transistor. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SIBIN CHEN whose telephone number is (571)270-5768. The examiner can normally be reached 9:00am - 5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Han can be reached at (571) 272-2078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SIBIN CHEN/Primary Examiner, Art Unit 2896
Read full office action

Prosecution Timeline

Sep 12, 2024
Application Filed
Nov 05, 2025
Non-Final Rejection — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
92%
With Interview (+5.1%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 1023 resolved cases by this examiner. Grant probability derived from career allow rate.

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