Prosecution Insights
Last updated: October 02, 2026
Application No. 18/849,179

APPARATUS AND METHOD FOR SUPPLYING POWER TO A LOAD

Non-Final OA §DP
Filed
Sep 20, 2024
Priority
Mar 25, 2022 — nonprovisional of PCTEP2022057967
Examiner
AZAD, MD ABUL K
Art Unit
Tech Center
Assignee
Hitachi Ltd.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
549 granted / 674 resolved
+21.5% vs TC avg
Strong +21% interview lift
Without
With
+20.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
24 currently pending
Career history
688
Total Applications
across all art units

Statute-Specific Performance

§101
15.1%
-24.9% vs TC avg
§103
45.2%
+5.2% vs TC avg
§102
4.2%
-35.8% vs TC avg
§112
19.1%
-20.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 674 resolved cases

Office Action

§DP
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION The action is in response to the Applicant’s communication filed on 09/20/2024. Claims 1-15 are pending, where claims 1 and 13 are independent. No art rejection is given for the application based on the search; IDS and the references made of record. Information Disclosure Statement The information disclosure statement (IDS) submitted on 9/20/2024 has been filed on the filing date of the application. The submission is in-compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Specification objections (Title) The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: APPARATUS AND METHOD FOR CONTROLLING VIRTUAL IMPEDANCE AND SUPPLYING POWER TO A LOAD. MPEP 606.01 Multiple filed related applications Applicants have filed multiple related applications. To date, some of the related applications have been allowed or under NOA and it appears that some related applications are stand pending, yet to be examined. There are plurality of co-pending related Applications (e.g. Appl #18/849179, 18/876147 and so on) and double patenting is proper. See MPEP 804 and 1490 (VI) D: Nonstatutory Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. See MPEP § 804 and 1490 (VI) D. Claims 1 and 13 are rejected on the ground of non-statutory double patenting over the claims 1and 11 of US Patent Application No. 18/876147 (Pub. No. 2025/0233416 A1, now under NOA). The subject matter claimed in the instant application and the patent are claiming common/similar subject matter, as follows: Instant Application No. 18/849179 Under NOA US Patent Appl. No. 18/876147 (Pub. No. 2025/0233416 A1) Title APPARATUS AND METHOD FOR SUPPLYING POWER TO A LOAD APPARATUS AND METHOD FOR SUPPLYING POWER TO OR ABSORBING POWER FROM A LOAD Claim 1. An apparatus configured to supply power to a load connected with a power system, the load being connected or connectable to a load conductor, the apparatus comprising: a reactor connected or connectable between the power system and the load conductor; a power supplying and/or absorbing device connected to the load conductor and configured for selectively supplying power to the load conductor or absorbing power from the load conductor, the power supplied to the load conductor by the power supplying and/or absorbing device being governed at least by a voltage reference value of the power supplying and/or absorbing device; and a processing unit configured to: obtain values indicative of voltage supplied by the power system and voltage of the load, respectively, at a plurality of different time instants; and based on the values indicative of voltage supplied by the power system and voltage of the load, respectively, at the plurality of different time instants, determine a primary side voltage difference, representative of any difference in voltage supplied by the power system at different time instants, and a secondary side voltage difference, representative of any difference in voltage of the load at the different time instants; and determine a virtual impedance of the power supplying and/or absorbing device based on the primary side voltage difference and the secondary side voltage difference; the apparatus further comprising a control unit configured to control the power supplying and/or absorbing device, the control unit being further configured to: obtain at least one value indicative of voltage of the load conductor; determine, based on the at least one value indicative of voltage of the load conductor and the virtual impedance, a voltage reference value for the power supplying and/or absorbing device; and control the power supplying and/or absorbing device to supply power to the load conductor, and thereby to the load, based on the determined voltage reference value. 1. An apparatus configured to supply power to a load connected with a power system or absorb power from the load, the load being connected or connectable to a load conductor, the apparatus comprising: a power supplying and/or absorbing device connected to the load conductor and configured for selectively supplying power to the load conductor or absorbing power from the load conductor, wherein the power supplied to the load conductor or absorbed from the load conductor by the power supplying and/or absorbing device is governed at least by a voltage reference value of the power supplying and/or absorbing device; and a control unit configured to control operation of the power supplying and/or absorbing device, the control unit being further configured to: obtain at least one value indicative of voltage of the load conductor; determine, based on the at least one value indicative of voltage of the load conductor and a virtual impedance of the power supplying and/or absorbing device, a voltage reference value for the power supplying and/or absorbing device; and control the power supplying and/or absorbing device to supply power to the load conductor, and thereby supply power to the load, or absorb power from the load conductor, and thereby absorb power from the load, based on the determined voltage reference value; wherein the virtual impedance of the power supplying and/or absorbing device is associated with a virtual reactance and a virtual resistance, wherein the power supplying and/or absorbing device is configured such that a value of the virtual reactance is higher than the value of a reactance of the power supplying and/or absorbing device, and such that a value of the virtual resistance is less than the value of the virtual reactance. Claims 2-13 are also obvious to the claims 1-13 of the U.S. Patent Application No. 18/876147 (Pub. No. 2025/0233416 A1 now under NOA). Although the conflicting claims are not identical, they are not patentably distinct from each other (as shown in the table for comparison) because they are substantially, conceptually or inherently similar to the limitations of the patent (as for example the limitation “a power supplying and/or absorbing device connected to the load conductor and configured for selectively supplying power to the load conductor or absorbing power from the load conductor, the power supplied to the load conductor by the power supplying and/or absorbing device being governed at least by a voltage reference value of the power supplying and/or absorbing device” of the application is equivalent to the limitation “a power supplying and/or absorbing device connected to the load conductor and configured for selectively supplying power to the load conductor or absorbing power from the load conductor, wherein the power supplied to the load conductor or absorbed from the load conductor by the power supplying and/or absorbing device is governed at least by a voltage reference value of the power supplying and/or absorbing device” of the patent) in scope and they use the similar limitations and produce the similar/same end result of controlling power supplying and/or absorbing device to supply power to load. It would be therefore obvious to one having ordinary skill in the art before the effective filing date of the claimed invention was made that to modify or to omit the additional elements of claims 1 and 11 of the NOA for patent to arrive at the claims 1 and 13 of the instant application, would perform the same/similar functions as before. This is an obviousness-type double patenting rejection. A terminal disclaimer is required to overcome the obviousness-type double patenting rejection. See MPEP § 804 and 1490 (VI) D: Citation of Pertinent Prior Art It is noted that any citations to specific, pages, columns, lines, or figures in the prior art references and any interpretation of the reference should not be considered to be limiting in any way. A reference is relevant for all it contains and may be relied upon for all that it would have reasonably suggested to one having ordinary skill in the art. See MPEP 2141.02 VI. PRIOR ART MUST BE CONSIDERED IN ITS ENTIRETY, i.e., as a whole and 2123. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The prior art made of record: Ebrahimzadehveshareh, et al. USPGPub No. 20240079978 A1 discloses a method to control power generating units configured to exhibit virtual synchronous generator response. Howard, et al. USPGPub No. 2022/0082087 A1 discloses a method for grid-forming control of inverter-based resource using virtual impedance. Echoad, et al. USPGPub No. 2008/0088183 A1 discloses an apparatus and control system for providing substantially uninterrupted power to load includes static compensator (STATCOM) mode, uninterruptible power supply (UPS) mode and generator mode (gen set) to control transitions of the modes. Terada, et al. USP No. 5798634 A discloses a method for controlling load management to operate electric power maintaining voltage of the system at an appropriate value in the utility. Li, et al. USP No. 10,135,329 B2 discloses a virtual impedance comprehensive control method for inductive power filtering system combining harmonic damping control at grid side and quality factor control of the passive filtering device. Ramamurthy, et al. USPGPub No. 20210234370 A1 discloses a method for power converter based on virtual impedance scheme in electrical power system using local voltage to modify pulse width modulation commands. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Md Azad whose telephone @(571)272-0553 or email: md.azad@uspto.gov. The examiner can normally be reached on Mon-Thu 9AM-5PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mohammad Ali can be reached on (571)272-4105. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from Patent Center and the Private Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from Patent Center or Private PAIR. Status information for unpublished applications is available through Patent Center and Private PAIR for authorized users only. Should you have questions about access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) Form at https://www.uspto.gov/patents/uspto-automated- interview-request-air-form. /Md Azad/ Primary Examiner, Art Unit 2119
Read full office action

Prosecution Timeline

Sep 20, 2024
Application Filed
Aug 26, 2026
Non-Final Rejection mailed — §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
99%
With Interview (+20.9%)
2y 8m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 674 resolved cases by this examiner. Grant probability derived from career allowance rate.

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