DETAILED ACTION
- Applicant's response filed 04/07/2026 has been considered.
- Claims 1-7 are amended and claims 8-14 are added. Thus, claims 1-14 are pending in the present application.
- Specification objection is withdrawn in light of amendments/remarks.
- The objection to the drawings is withdrawn in view of the submitted replacement sheet.
Response to Arguments
Applicant's arguments filed 04/07/2026 have been fully considered but they are not persuasive.
However, upon further consideration, a new ground of rejection is made as set forth in details below. The rejection under 102(a) (1) as being by Kelly is maintained. A rejection under 112(a) and 112(b) are made and
Applicant's Argument:
Claim 1 defines that the control circuit transfers computation processing from the first quantum computer to the second quantum computer based on an error amount in the computation processing of the first quantum computer. In other words, the first and second quantum computers do not operate in parallel, such that the error correction of the second quantum computer is continuously operating. Instead, the computation processing is passed between the two quantum computers, under the direction of the control circuit, based on error. It is believed that Kelly does not disclose or suggest these features. Kelly does not disclose or suggest two separate quantum computers that pass and computation between them depending on error.
Examiner's Response:
The Examiner respectfully disagrees and the concepts are taught in Kelly’s reference to the extent required by the actual claim language. Further, the interpretation of the claim language must be as broad as possible for the given art. If the Applicant needs a specific interpretation of the claim language, these details must be imported into the claims. These details cannot be read into the claim language when the claim language is so broad as to encompass other valid interpretations.
Furthermore, in response to applicant's argument that the references fail to show certain features of applicant's invention, it is noted that the features upon which applicant relies (i.e., the first and second quantum computers do not operate in parallel, such that the error correction of the second quantum computer is continuously operating. Instead, the computation processing is passed between the two quantum computers, under the direction of the control circuit, based on error) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181,26 USPQ2d 1057 (Fed. Cir. 1993).
Applicants are advised to review Kelly reference in its entirety for a complete and better understanding of the prior art applied. This may enhance the Applicants ability to formulate claim language that includes novelty of the application. It is the Examiner's conclusion that the claims of the present application, as presented, are not patentably distinct or novel over the prior arts of record. Applicants are encouraged to formulate claim language that clearly differentiates the claims from the prior art of record.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1 recites “a first quantum computer computation unit that includes a qubit and performs quantum computation; a second quantum computer computation unit that includes qubits and performs quantum computation with error correction”. No support for the limitation appears in the specification. The specification in paragraphs [0016] and [0017] only discloses (FIG. 2 is a diagram illustrating an example of a schematic configuration of an information processing apparatus according to a first embodiment of the present disclosure. The drawing is a block diagram illustrating an example of a schematic configuration of the information processing apparatus 1. The information processing apparatus 1 includes a control unit 10, a first quantum computation unit 20, and a second quantum computation unit 30. The first quantum computation unit 20 includes a qubit and performs quantum computation. The first quantum computation unit 20 is a computation unit that does not perform error correction in the quantum computation. The second quantum computation unit 30 includes qubits and performs quantum computation with error correction). Because there is inadequate disclosure of the claimed invention, the inventor has also not provided sufficient disclosure to show possession of the invention.
All dependent claims of the claims stated above are also rejected under 112 as carrying the same problems as stated above since they are dependent from the rejected claims.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION. The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 1 recites “a first quantum computer computation unit that includes a qubit and performs quantum computation; a second quantum computer computation unit that includes qubits and performs quantum computation with error correction”. It is not clear from the claim language and clarification is requested. There is no way to determine the metes and bounds of these limitations, since there are no limits imposed by structure, material or acts, and can be performed by any means capable of performing the function, both and unknown.
All dependent claims of the claims stated above are also rejected under 112 as carrying the same problems as stated above since they are dependent from the rejected claims.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C.
102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the
basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless -
(a) (1) the claimed invention was patented, described in a printed publication, or in
public use, on sale, or otherwise available to the public before the effective filing date
of the claimed invention.
Claims 1-14 are rejected under 35 U.S.C. 102(a) (1) as being anticipated by Kelly (U.S. PN: 10,692,009).
Aa per claims 1 and 8, Kelly substantially teaches an information processing apparatus comprising (see col. 1, lines 29-34 and col. 1, lines 63-67) a first quantum computation unit that includes a qubit and performs quantum computation; a second quantum computation unit that includes qubits and performs quantum computation with error correction (see col. 1, lines 30-45, col. 3, lines 9-42, and col. 5, lines 60-67 to col. 1-4); and a control unit that causes the first quantum computation unit to perform computation processing and performs control to transfer the computation processing to the second quantum computation unit, based on an error amount in the computation processing in the first quantum computation unit (see col. 2, lines 18-67 and col. 3, lines 9-45, col. 5, lines 60-67 to col. 1-15).
As per claims 2 and 9, Kelly substantially teaches as indicated in claims 1 and 8. Kelly teaches wherein the control unit performs control to transfer the computation processing to the second quantum computation unit, based on the error amount according to a processing time of the computation processing (View Kelly col. 2, lines 18-67 and col. 3, lines 9-25, col. 5, lines 60-67 to col. 1-4).
As per claims 3 and 10, Kelly substantially teaches as indicated in claims 1 and 8. Kelly teaches wherein
the control unit performs control to transfer the computation processing to the second quantum computation unit, based on the error amount according to the number of single-qubit gate computations in the computation processing (View Kelly col. 1, lines 45-67 to col. 5, lines 1-9).
As per claims 4 and 11, Kelly substantially teaches as indicated in claims 1 and 8. Kelly teaches wherein the control unit performs control to transfer the computation processing to the second quantum computation unit, based on the error amount according to the number of two-qubit gate computations in the computation processing (View Kelly col. 1, lines 36-40).
As per claims 5 and 12, Kelly substantially teaches as indicated in claims 1 and 8. Kelly teaches wherein the control unit further performs control to transfer the computation processing to the first quantum computation unit after causing the second quantum computation unit having been selected to perform the computation processing (View Kelly col. 2, lines 62-67 to col.3, lines 1-5).
As per claims 6 and 13, Kelly substantially teaches as indicated in claims 1 and 8. Kelly teaches wherein the control unit further performs control to transfer the computation processing having been transferred to the second quantum computation unit to the first quantum computation unit again (View Kelly col. 6, lines 5-15).
As per claims 7 and 14, Kelly substantially teaches as indicated in claims 1 and 8. Kelly teaches wherein the control unit adjusts a code distance for the error correction in the second quantum computation unit (View Kelly col. 3, lines 6-19 and col. 6, lines 5-15).
Examiner Notes
Examiner cites particular columns, paragraphs, figures and line numbers in the references as applied to the claims below for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the Applicant fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner. Applicants are advised to formulate claim language that clearly defines the novelty of the application. The concept of Quantum computation that includes qubits and perform the computation with error correction based on error numbers or amounts in the quantum computation is not novel.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Esaw T. Abraham whose telephone number is (571) 272-3812. The examiner can normally be reached on M-F 8am-4PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner'ssupervisor, Albert DeCady can be reached on (571) 272-3819. The fax phone number for the organization where this application or proceeding is assigned is (703) 872-9306.
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/ESAW T ABRAHAM/Primary Examiner, Art Unit 2112
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