Prosecution Insights
Last updated: July 17, 2026
Application No. 18/851,413

COMPOSITE FILTER AND COMMUNICATION DEVICE

Non-Final OA §103
Filed
Sep 26, 2024
Priority
Mar 30, 2022 — JP 2022-055067 +1 more
Examiner
PEREZ, ANGELICA
Art Unit
Tech Center
Assignee
Kyocera Corporation
OA Round
1 (Non-Final)
75%
Grant Probability
Favorable
1-2
OA Rounds
1y 1m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
586 granted / 780 resolved
+15.1% vs TC avg
Strong +28% interview lift
Without
With
+27.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
22 currently pending
Career history
797
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
88.4%
+48.4% vs TC avg
§102
6.7%
-33.3% vs TC avg
§112
1.7%
-38.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 780 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Allowable Subject Matter Claims 7-10 and 12-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 7, Inoue, JP2012222491A, WO 2022054896 A1 and Mizoguchi fail to teach, disclose or suggest alone or in combination the limitations that read, “wherein, when the multilayer substrate is viewed in plan view: the first hybrid, the first filter and the second filter are located on one side of the direction in which the virtual line extends more than the second hybrid, the second filter system is located on the other side of the direction in which the virtual line extends more than the second hybrid, the first filter is located on one side of the direction orthogonal to the virtual line more than the first hybrid, and the second filter is located on the other side of the direction orthogonal to the virtual line more than the first hybrid”, in combination with all the limitations of the claims from which it depends and within the context of the claims. Claim 8 depends on claim 7 and inherits all the limitations of claim 7; therefore, claim 8 is objected due to its dependency form claim 7. Regarding claim 9, Inoue, JP2012222491A and Mizoguchi fail to teach, disclose or suggest alone or in combination the limitations that read, “wherein the at least one chip is located on the side of a first surface of the multilayer substrate, in the first hybrid, two ports connected to the first filter and the second filter are located closer to the side of the first surface than the remaining two ports, and in the second hybrid, two ports connected to the first filter and the second filter are closer to the side of the first surface than the remaining two ports”, in combination with all the limitations of the claims from which it depends and within the context of the claims. Regarding claim 10, Inoue, JP2012222491A and Mizoguchi fail to teach, disclose or suggest alone or in combination the limitations that read, “wherein the multilayer substrate includes a matching element that is composed of a part of the plurality of insulating layers, the plurality of conductor layers and the plurality of via conductors, and that is located in a layer different from the layer where the first hybrid and the second hybrid are located”, in combination with all the limitations of the claims from which it depends and within the context of the claims. Regarding claim 12, Inoue, JP2012222491A and Mizoguchi fail to teach, disclose or suggest alone or in combination the limitations that read, “wherein the first filter and the second filter are located on the same piezoelectric substrate included in the at least one chip, and when the multilayer substrate is viewed in plan view, the piezoelectric substrate is located on a virtual line passing through the center of the first hybrid and the center of the second hybrid”, in combination with all the limitations of the claims from which it depends and within the context of the claims. Claims 13 and 14 depend on claim 12 and inherits all the limitations of claim 12; therefore, claims 13 and 14 are objected due to its dependency form claim 12. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 15 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over US 20100148886 A1 (Inoue et all., hereinafter Inoue) in view of WO 2022054896 A1 (Cited by applicant. Tetsuya Kashino, hereinafter Kashino). Regarding claim 1, Inoue discloses a composite filter (Figs. 8-9C and 17, “duplexer 10”) comprising: a first hybrid composed of a 900 hybrid coupler (“hybrid 3”) and connected to a common terminal (“Terminal 1”); a second hybrid composed of a 900 hybrid coupler (“hybrid 31”) and connected to a first terminal (receiving “terminal 7”); a first filter system (“receiving filter 4a” and “receiving filter 4b”) connected to the common terminal (“Terminal 1”) via the first hybrid (“hybrid 3”) and connected to the first terminal (receiving “terminal 7”) via the second hybrid (“hybrid 31”) to pass a signal of a first pass band (par. [0004]); and a second filter system (“transmitting filter 2”) connected to the common terminal (“Terminal 1”) via the first hybrid (“hybrid 3”) and connected to a second terminal (transmitting “terminal 4”) to pass a signal of a second pass band different from the first pass band (par. [0004]), wherein the first filter system includes a first filter and a second filter (“receiving filter 4a” and “receiving filter 4b”), each of which passes a signal of the first pass band, the first filter and the second filter are connected to the first hybrid (“hybrid 3”) and the second hybrid (“hybrid 31”) in a connection relationship in which, when a signal is inputted to one of the common terminal and the first terminal, signals whose phases are shifted by 900 from each other are distributed to the first filter and the second filter, and the distributed signals are made to be in-phase signals and outputted to the other of the common terminal and the first terminal (“when a signal is input to the common terminal 1, signals for which the phases are shifted by 900 from each other are distributed to the receiving filters 4a and 4b, and the distributed signals are output to the receiving terminal 7 with the same phase”; “ when a signal is input to the transmission terminal Tx, the signals for which the phases are shifted by 900 from each other by the 900 hybrid are reflected by the receiving filters 4a, 4b, and become signals with the same phase at the common terminal 1, and at the transmitting terminal Tx, the signals are in opposite phase and cancel each other out”; and “when a signal is input to the transmission terminal 4, the leakage signal passing through the receiving filters 4a, 4b is shifted by 900 by the 900 hybrid 3, and the phase is further shifted by 900 by the 900 hybrid 31, so that the signals are in opposite phases and cancel each other out on the receiving terminal 7 side”), a difference between the length of wiring line from the first hybrid (Fig. 13, “hybrid 3b”) to the first filter (“filter 4a” connection to “terminal 2”) and the length of wiring line from the first hybrid (“hybrid 3b”) to the second filter (“4b” connection to “Terminal 3”) is less than half of a maximum dimension of the first filter (where less than half includes zero; therefore, having the same distance reads on the claimed limitation), and Inoue implicitly discloses where the circuits in Figs. 12 and 13 can be extrapolated to represent Fig. 8 where both hybrids 3 and 31 are present. Since, “the circuit is intended to cancel unnecessary signals as opposite phases by shifting the phases by 900 by the respective hybrids 3 and 31, and a person of ordinary skill in the art could have usually set the line lengths of the 900 hybrid and the reception filters 4a and 4b and the 900 hybrid 31 and the reception filters 4a and 4b to be the same length”; therefore, fulfilling the result desired as described above. Inoue implicitly discloses the limitations as shown above. However, for the sake of completeness, in related art concerning composite filter and communication device, Kashino also discloses a difference between the length of wiring line from the second hybrid to the first filter and the length of wiring line from the first hybrid to the second filter is less than half of a maximum dimension of the first filter (Fig. 5 and pars. [0069]-[0086], “describe a duplexer that uses two 900 hybrids between common terminals and receiving terminals , and two filters connected between the same to output the required signals to the receiving terminals in the same phase, and cancels out unwanted signals”; Figs 1-4A and pars. [0011]-[0052], also disclose “an example in which the transmission terminal, the receiving terminal, which is the other terminal, is distributed to two filters by 900 hybrid and output to a common terminal). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use Kashino’s teachings wherein a difference between the length of wiring line from the second hybrid to the first filter and the length of wiring line from the first hybrid to the second filter is less than half of a maximum dimension of the first filter with the duplexer disclosed by Inoue because one of ordinary skill in the art would have recognized that to swap the transmission terminal, the receiving terminal and transmission/receiving circuits, the distances between the second filter and the second hybrid would require to be the same or less than half of the maximum distance in the first filter (a difference zero; thus, equal). Regarding claim 15, Inoue and Kashino disclose all the limitations of claim 1. Inoue discloses wherein the first filter system is a reception filter that filters a signal transmitted from the common terminal to the first terminal (“receiving filter 4a” and “receiving filter 4b”), and the second filter system is a transmission filter that filters a signal transmitted from the second terminal to the common terminal (“transmitting filter 2”). Regarding claim 16, Inoue and Kashino disclose all the limitations of claim 1. Inoue discloses a communication device comprising: the composite filter according to claim 1(par. [0002], Fig. 17, “communication device 30”); an antenna connected to the common terminal (Fig. 17, par. [0002], “duplexer connected to an antenna”, “16”); and an integrated circuit element connected to the first terminal and the second terminal (Fig. 17, pars. [0066], [0105]-[0109]). Claims 2, 3 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Inoue in view Kashino, and further in view of JP 2012222491 A (Cited by applicant. hereinafter JP2012222491A). Regarding claim 2, Inoue and Kashino disclose all the limitations of claim 1. further comprising: a [multilayer] substrate that includes a plurality of insulating layers, a plurality of conductor layers overlapping the plurality of insulating layers, and a plurality of via conductors passing through the plurality of insulating layers (pars. [0103]-[0104], ceramic substrate being insulating), and that includes the first hybrid and the second hybrid composed of a part of the plurality of insulating layers (“hybrid 3” and “hybrid 31”), the plurality of conductor layers and the plurality of via conductors (Fig. 12 and pars. [0103]-[0104], [0110]); and at least one chip that is fixed to the [multilayer] substrate and that constitutes the first filter system and the second filter system by an acoustic wave filter (par. [0114]; “acoustic wave filters”; pars. [0105]). Inoue does not specifically disclose where the substate is a multilayer substrate. However, in related art concerning a module that keeps the performance of a balanced amplifier intact, JP2012222491A explicitly discloses where the substate is a multilayer substrate (par. [0046], “FIG. 8 is a diagram showing an arrangement of circuits configured in the multilayer substrate 200”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use JP2012222491A’s explicit teachings wherein the substate is a multilayer substrate with the duplexer disclosed by Inoue and Kashino because one of ordinary skill in the art would have recognized that such configuration constitutes a mere design choice available to the inventor that would allow denser circuitry in a smaller footprint; therefore, compact design. Regarding claim 3, Inoue, Kashino and JP2012222491A disclose all the limitations of claim 2. Inoue shows in Fig. 12 where the filters 4a and 4b are arranged on both sides with respect to a virtual line of the 900 hybrid 3a. JP2012222491A discloses when the multilayer substrate is viewed in plan view, the first filter and the second filter are located on either side of a direction orthogonal to a virtual line passing through the center of the first hybrid and the center of the second hybrid, with respect to the virtual line, and the ranges of the first hybrid and the second hybrid in a direction in which the virtual line extends overlap each other (Fig. 8, low-pass filters 30 and 31 are provided between a pair of hybrid circuits 20 and 21). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use JP2012222491A’s explicit teachings wherein the multilayer substrate is viewed in plan view, the first filter and the second filter are located on either side of a direction orthogonal to a virtual line passing through the center of the first hybrid and the center of the second hybrid, with respect to the virtual line, and the ranges of the first hybrid and the second hybrid in a direction in which the virtual line extends overlap each other with the duplexer disclosed by Inoue and Kashino because one of ordinary skill in the art would have recognized that such configuration constitutes a mere design choice available to the inventor. Regarding claim 11, Inoue, Kashino and JP2012222491A disclose all the limitations of claim 2. Inoue further discloses wherein the first hybrid and the second hybrid are located in the same layer [of the multilayer substrate] (Fig. 12 and pars. [0103]-[0104], [0110], [0114], [0122]). Inoue does not specifically disclose a multilayer substrate and wherein the plurality of via conductors includes a via conductor located between the first hybrid and the second hybrid and connected to a reference potential portion. JP2012222491A discloses a multilayer substrate (par. [0046], “FIG. 8 is a diagram showing an arrangement of circuits configured in the multilayer substrate 200”; and wherein the plurality of via conductors includes a via conductor located between the first hybrid and the second hybrid and connected to a reference potential portion (Figs. 1-2, pars. [0026]-[0030], “via holes 65”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use JP2012222491A’s teachings wherein the plurality of via conductors includes a via conductor located between the first hybrid and the second hybrid and connected to a reference potential portion with the duplexer disclosed by Inoue and Kashino because one of ordinary skill in the art would have recognized that vias are well known technique used to connect circuity in multilayered integrated circuits to save space. Claim 4 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Inoue in view of Kashino and JP2012222491A, and further in view of WO 2017203919 A1 (Cited by applicant. Mizoguchi et al., hereinafter Mizoguchi). Regarding claim 4, Inoue, Kashino and JP2012222491A discloses all the limitations of claim 3. Inoue, Kashino and JP2012222491A do not specifically disclose wherein the first filter and the second filter have a structure in which one side and the other side of a direction crossing the virtual line are reversed from each other. In related art concerning a duplexer with a pair of hybrids, Mizoguchi teaches wherein the first filter and the second filter have a structure in which one side and the other side of a direction crossing the virtual line are reversed from each other (Figs 6, 8 and 9, shows reversed input terminals of filters 50A-50B across the virtual center line). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use Mizoguchi’s teachings wherein the first filter and the second filter have a structure in which one side and the other side of a direction crossing the virtual line are reversed from each other with the duplexer disclosed by Inoue, Kashino and JP2012222491A because one of ordinary skill in the art would have recognized that such configuration constitutes a mere design choice available to the inventor. Regarding claim 5, Inoue, Kashino and JP2012222491A discloses all the limitations of claim 3. Inoue, Kashino and JP2012222491A do not specifically disclose wherein a wiring line connecting the first hybrid and the first filter and a wiring line connecting the first hybrid and the second filter are in line symmetry with respect to the virtual line, and a wiring line connecting the second hybrid and the first filter and a wiring line connecting the second hybrid and the second filter are in line symmetry with respect to the virtual line. Mizoguchi discloses wherein a wiring line connecting the first hybrid and the first filter and a wiring line connecting the first hybrid and the second filter are in line symmetry with respect to the virtual line, and a wiring line connecting the second hybrid and the first filter and a wiring line connecting the second hybrid and the second filter are in line symmetry with respect to the virtual line (Figs 6, 8 and 9, show “the wirings of the two 900 hybrids 30 and 40 and the left and right filters 50A and 50B are line-symmetrical”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use Mizoguchi’s teachings wherein a wiring line connecting the first hybrid and the first filter and a wiring line connecting the first hybrid and the second filter are in line symmetry with respect to the virtual line, and a wiring line connecting the second hybrid and the first filter and a wiring line connecting the second hybrid and the second filter are in line symmetry with respect to the virtual line with the duplexer disclosed by Inoue, Kashino JP2012222491A because one of ordinary skill in the art would have recognized that such configuration constitutes a mere design choice available to the inventor. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Inoue in view of Kashino, and further in view of WO 2017203919 A1 (Mizoguchi et al., hereinafter Mizoguchi). Regarding claim 6, Inoue and Kashino disclose all the limitations of claim 2. Although implied, Inoue does not specifically disclose wherein, when the multilayer substrate is viewed in plan view, the second filter system is located on the virtual line. Mizoguchi discloses wherein, when the multilayer substrate is viewed in plan view, the second filter system is located on the virtual line (Fig. 8). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use Mizoguchi’s teachings wherein, when the multilayer substrate is viewed in plan view, the second filter system is located on the virtual line with the duplexer disclosed by Inoue and Kashino because one of ordinary skill in the art would have recognized that such configuration constitutes a mere design choice available to the inventor. Note: The examiner has quoted portions of PCT Written Opinion cited in IDS dated 09/26/2024. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 20180083591 A1 relates to enhancing isolation in hybrid-based radio frequency duplexers and multiplexers. US 20060019611 A1 relates to distributed balanced duplexer. US 20150236390 A1 relates to miniature acoustic resonator-based filters and duplexers with cancelation methodology. US 20150222300 A1 relates to a duplexer having good insulation and small geometric dimensions. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Angelica Perez whose telephone number is 571-272-7885. The examiner can normally be reached on Monday-Friday from 8:00 a.m. to 4:00 p.m. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, Applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Yuwen (Kevin) Pan can be reached at (571) 272-7855. The fax phone numbers for the organization where this application or proceeding is assigned are 571-273-8300 for regular communications and for After Final communications. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either the PAIR or Public PAIR. Status information for unpublished applications is available through the Private PAIR only. For more information about the pair system, see http://pair- direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll- free). Information regarding Patent Application Information Retrieval (PAIR) system can be found at 866-217-9197 (toll-free). Any inquiry of a general nature or relating to the status of this application or proceeding should be directed to the TC 2600's customer service number is 703-306-0377. /Angelica M. Perez/ Patent Examiner AU 2649
Read full office action

Prosecution Timeline

Sep 26, 2024
Application Filed
Jun 10, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
75%
Grant Probability
99%
With Interview (+27.9%)
2y 11m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 780 resolved cases by this examiner. Grant probability derived from career allowance rate.

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