Detailed Action
This is a Non-final Office action in response to communications received on 10/2/2024. Claims 1-10 are pending and are examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings, filed 10/2/2024, are acknowledged.
Foreign Priority
The foreign priority date of 5/18/2022 is acknowledged.
Preliminary Amendment
The preliminary amendment, filed 10/2/2024, is acknowledged.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claim 10 is also rejected under 35 U.S.C. 101 as not falling within one of the four statutory categories of invention because the claims are directed to software per se.
Under 35 U.S.C. 101, a claimed invention must fall within one of the four eligible categories of invention (i.e. process, machine, manufacture, or composition of matter) and must not be directed to subject matter encompassing a judicially recognized exception as interpreted by the courts. MPEP § 2106. The four eligible categories of invention include: (1) process which is an act, or a series of acts or steps, (2) machine which is an concrete thing, consisting of parts, or of certain devices and combination of devices, (3) manufacture which is an article produced from raw or prepared materials by giving to these materials new forms, qualities, properties, or combinations, whether by hand labor or by machinery, and (4) composition of matter which is all compositions of two or more substances and all composite articles, whether they be the results of chemical union, or of mechanical mixture, or whether they be gases, fluids, powders or solids. MPEP 2106(I).
Claim 10 is directed to a program for a computer that controls a data processing apparatus including. The Specification does not explicitly limit the program to hardware. It is not sufficient to specify that the system is designed to perform a function – the claim must recite what hardware the system itself comprises which performs the claimed functions. The claim does not disclose the system as comprising any sort of physical device or machine to perform the steps of the claim. As such, the claim is interpreted as being directed to software per se.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4 and 7-10 are rejected under 35 U.S.C. 103 as being unpatentable over Mishra (US 20190163649 A1), in view of Pekny (US 20090276561 A1).
Regarding claim 1, Mishra teaches the limitations of claim 1 substantially as follows:
A data processing apparatus comprising:
a register including, as an address region, a setting region that stores setting information transmitted from a host, (Mishra; [0057]: The configuration register may be located within a user defined register space: 0x01 to 0x1C in hexadecimal. For example, register location 0x18 may be used as the configuration register)
a communication information region that stores communication information with the host; and (Mishra; [0056]: the configuration register may be defined at location 0x18 and the page-address register may be defined at location 0x19 in the register space (i.e., communication information))
a communication unit that performs register communication between the host and the register, (Mishra; [0056]: FIG. 6 is a diagram of an RFFE register space 600 having a configuration register and a page-address register (i.e., communication with register))
wherein the data processing apparatus writes communication mode information indicating at least one communication mode of the register communication in the communication information region in a case where the communication mode information is received from the host, and (Mishra; [0051]: In an aspect, a Register-0 Write command may be modified by way of an additional configuration register. The configuration register may be set ahead of time. In an example, the configuration register may be set to indicate that the Register-0 Write command will be used in a legacy manner (legacy mode) (i.e., communication mode))
sets a register definition for a same space of the register for each of the communication modes based on the communication mode information written in the communication information region. (Mishra; [0051]: In an aspect, a Register-0 Write command may be modified by way of an additional configuration register. The configuration register may be set ahead of time. In an example, the configuration register may be set to indicate that the Register-0 Write command will be used in a legacy manner (legacy mode) (i.e., sets a register definition for a same space of the register for each of the communication modes ))
Mishra does not teach the limitations of claim 1 as follows:
a security data region that stores security data for the setting information, and
However, in the same field of endeavor, Pekny discloses the limitations of claim 1 as follows:
a security data region that stores security data for the setting information, and (Pekny; [0030]: the protected mode access register 28 is essentially a hidden register in the NAND memory device (i.e. security data region))
Pekny is combinable with Mishra because all are from the same field of endeavor of controlling information on registers, Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system of Mishra to incorporate a register portion for secured information as in Pekny in order to improve the security of the system by provisioning a portion of the register for protected information.
Regarding claim 2, Mishra and Pekny teach the limitations of claim 1.
Mishra and Pekny teach the limitations of claim 2 as follows:
The data processing apparatus according to claim 1, wherein the communication mode is any one of a mode in which encrypted data including the setting information is exchanged, a mode in which an error detection code related to the setting information is exchanged, a mode in which a message authentication code related to the setting information is exchanged, and a mode in which authentication data is exchanged. (Mishra; [0053]: the additional command codes may indicate more than 16 bytes of register reads and writes using only one datagram (Register-0 Write command) Moreover, the additional command codes may indicate electrical signaling beyond what is currently defined in the RFFE/SPMI protocol. The signaling may include interrupt signaling, error signaling, flow control signaling, etc (i.e., a mode in which an error detection code related to the setting information is exchanged))
Regarding claim 4, Mishra and Pekny teach the limitations of claim 2.
Mishra and Pekny teach the limitations of claim 4 as follows:
The data processing apparatus according to claim 2, wherein in a case where the mode in which an error detection code related to the setting information is exchanged is written in the communication information region, the error detection code is stored in the security data, and the setting information targeted for the error detection code is stored in the setting region. (Mishra; [0053]: the additional command codes may indicate more than 16 bytes of register reads and writes using only one datagram (Register-0 Write command) Moreover, the additional command codes may indicate electrical signaling beyond what is currently defined in the RFFE/SPMI protocol. The signaling may include interrupt signaling, error signaling, flow control signaling, etc (i.e., error detection code))
Regarding claim 7, Mishra and Pekny teach the limitations of claim 1.
Mishra and Pekny teach the limitations of claim 7 as follows:
The data processing apparatus according to claim 1, wherein the set register definition is not changed until a command indicating end of the communication mode is received from the host. (Mishra; [0051]: a Register-0 Write command may be modified by way of an additional configuration register. The configuration register may be set ahead of time (i.e., set register definition is not changed))
Regarding claim 8, Mishra and Pekny teach the limitations of claim 1.
Mishra and Pekny teach the limitations of claim 8 as follows:
The data processing apparatus according to claim 1, further comprising: a setting unit in which whether or not the communication mode is supported is set, wherein the register definition is not changed in a case where a command in a communication mode other than the communication mode set in the setting unit is received. (Mishra; [0051]: a Register-0 Write command may be modified by way of an additional configuration register. The configuration register may be set ahead of time (i.e., set register definition is not changed))
Regarding claim 9, Mishra teaches the limitations of claim 9 substantially as follows:
A data processing method executed by a data processing apparatus including:
a register including, as an address region, a setting region that stores setting information transmitted from a host, (Mishra; [0057]: The configuration register may be located within a user defined register space: 0x01 to 0x1C in hexadecimal. For example, register location 0x18 may be used as the configuration register)
a communication information region that stores communication information with the host; and (Mishra; [0056]: the configuration register may be defined at location 0x18 and the page-address register may be defined at location 0x19 in the register space (i.e., communication information))
a communication unit that performs register communication between the host and the register, (Mishra; [0056]: FIG. 6 is a diagram of an RFFE register space 600 having a configuration register and a page-address register (i.e., communication with register))
the data processing method comprising: writing communication mode information indicating at least one communication mode of the register communication in the communication information region in a case where the communication mode information is received from the host; and (Mishra; [0051]: In an aspect, a Register-0 Write command may be modified by way of an additional configuration register. The configuration register may be set ahead of time. In an example, the configuration register may be set to indicate that the Register-0 Write command will be used in a legacy manner (legacy mode) (i.e., communication mode))
setting a register definition for a same space of the register for each of the communication modes based on the communication mode information written in the communication information region. (Mishra; [0051]: In an aspect, a Register-0 Write command may be modified by way of an additional configuration register. The configuration register may be set ahead of time. In an example, the configuration register may be set to indicate that the Register-0 Write command will be used in a legacy manner (legacy mode) (i.e., sets a register definition for a same space of the register for each of the communication modes ))
Mishra does not teach the limitations of claim 9 as follows:
a security data region that stores security data for the setting information, and
However, in the same field of endeavor, Pekny discloses the limitations of claim 9 as follows:
a security data region that stores security data for the setting information, and (Pekny; [0030]: the protected mode access register 28 is essentially a hidden register in the NAND memory device (i.e. security data region))
Pekny is combinable with Mishra because all are from the same field of endeavor of controlling information on registers, Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system of Mishra to incorporate a register portion for secured information as in Pekny in order to improve the security of the system by provisioning a portion of the register for protected information.
Regarding claim 10, Mishra teaches the limitations of claim 10 substantially as follows:
A program for a computer that controls a data processing apparatus including: a register including, as an address region, a setting region that stores setting information transmitted from a host, (Mishra; [0057]: The configuration register may be located within a user defined register space: 0x01 to 0x1C in hexadecimal. For example, register location 0x18 may be used as the configuration register)
a communication information region that stores communication information with the host; and (Mishra; [0056]: the configuration register may be defined at location 0x18 and the page-address register may be defined at location 0x19 in the register space (i.e., communication information))
a communication unit that performs register communication between the host and the register, (Mishra; [0056]: FIG. 6 is a diagram of an RFFE register space 600 having a configuration register and a page-address register (i.e., communication with register))
the program causing the computer to execute processing comprising: writing communication mode information indicating at least one communication mode of the register communication in the communication information region in a case where the communication mode information is received from the host; and (Mishra; [0051]: In an aspect, a Register-0 Write command may be modified by way of an additional configuration register. The configuration register may be set ahead of time. In an example, the configuration register may be set to indicate that the Register-0 Write command will be used in a legacy manner (legacy mode) (i.e., communication mode))
setting a register definition for a same space of the register for each of the communication modes based on the communication mode information written in the communication information region. (Mishra; [0051]: In an aspect, a Register-0 Write command may be modified by way of an additional configuration register. The configuration register may be set ahead of time. In an example, the configuration register may be set to indicate that the Register-0 Write command will be used in a legacy manner (legacy mode) (i.e., sets a register definition for a same space of the register for each of the communication modes ))
Mishra does not teach the limitations of claim 10 as follows:
a security data region that stores security data for the setting information, and
However, in the same field of endeavor, Pekny discloses the limitations of claim 10 as follows:
a security data region that stores security data for the setting information, and (Pekny; [0030]: the protected mode access register 28 is essentially a hidden register in the NAND memory device (i.e. security data region))
Pekny is combinable with Mishra because all are from the same field of endeavor of controlling information on registers, Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the system of Mishra to incorporate a register portion for secured information as in Pekny in order to improve the security of the system by provisioning a portion of the register for protected information.
Claims 3 are rejected under 35 U.S.C. 103 as being unpatentable over Mishra (US 20190163649 A1), in view of Pekny (US 20090276561 A1), as applied to claim 1, further in view of Fan (US 9372956 B1).
Regarding claim 3, Mishra and Pekny teach the limitations of claim 2.
Mishra and Pekny do not teach the limitations of claim 3 as follows:
The data processing apparatus according to claim 2, wherein in a case where a mode for exchanging encrypted data including the setting information is written in the communication information region, the encrypted data is stored in the security data region.
However, in the same field of endeavor, Fan discloses the limitations of claim 3 as follows:
The data processing apparatus according to claim 2, wherein in a case where a mode for exchanging encrypted data including the setting information is written in the communication information region, the encrypted data is stored in the security data region. (Fan; Col. 8, line 34-39: The register 305 may store a unique identifier for the programmable device 302 (e.g., programmed when the device was manufactured), as well as bitstream encryption information, a user-defined code, and information about the read/write status of the register (i.e., store encrypted information))
Fan is combinable with Mishra and Pekny because all are from the same field of endeavor of controlling information on registers. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified system of Mishra and Pekny to incorporate storage of encrypted data as in Fan in order to improve the security of the system by providing a means by which encrypted or secured data may be stored in a designated register.
Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Mishra (US 20190163649 A1), in view of Pekny (US 20090276561 A1), as applied to claim 1, further in view of Chhabra (US 20240193263 A1).
Regarding claim 5, Mishra and Pekny teach the limitations of claim 2.
Mishra and Pekny do not teach the limitations of claim 5 as follows:
The data processing apparatus according to claim 2, wherein in a case where the mode in which a message authentication code related to the setting information is exchanged is written in the communication information region, the message authentication code is stored in the security data region, and the setting information targeted for the message authentication code is stored in the setting region.
However, in the same field of endeavor, Chhabra discloses the limitations of claim 5 as follows:
The data processing apparatus according to claim 2, wherein in a case where the mode in which a message authentication code related to the setting information is exchanged is written in the communication information region, the message authentication code is stored in the security data region, and the setting information targeted for the message authentication code is stored in the setting region. (Chhabra; [0073]: in the integrity based metadata organization region of memory a dataline is to be stored with a set of metadata that includes a message authentication code and a first proper subset of an error correction code and a second, different proper subset of an error correction code associated with the dataline is to be stored in memory that is sequestered from the dataline and the set of metadata)
Chhabra is combinable with Mishra and Pekny because all are from the same field of endeavor of controlling information on registers. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified system of Mishra and Pekny to incorporate message authentication data as in Chhabra in order to improve the security of the system by including a means by which transmitted information may be authenticated.
Regarding claim 6, Mishra and Pekny teach the limitations of claim 2.
Mishra and Pekny do not teach the limitations of claim 6 as follows:
The data processing apparatus according to claim 2, wherein in a case where the mode in which authentication data is exchanged is written in the communication information region, the authentication data is stored in the security data region.
However, in the same field of endeavor, Chhabra discloses the limitations of claim 6 as follows:
The data processing apparatus according to claim 2, wherein in a case where the mode in which authentication data is exchanged is written in the communication information region, the authentication data is stored in the security data region. (Chhabra; [0073]: in the integrity based metadata organization region of memory a dataline is to be stored with a set of metadata that includes a message authentication code and a first proper subset of an error correction code and a second, different proper subset of an error correction code associated with the dataline is to be stored in memory that is sequestered from the dataline and the set of metadata)
Chhabra is combinable with Mishra and Pekny because all are from the same field of endeavor of controlling information on registers. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified system of Mishra and Pekny to incorporate message authentication data as in Chhabra in order to improve the security of the system by including a means by which transmitted information may be authenticated.
Prior Art Considered But Not Relied Upon
Merino (US 20200401549 A1) which teaches a multi-I/O SPI which includes registers divided into a primary region that is accessed only in default mode at power-up for write and/or read operations, and a secondary region that is accessed by any mode enabled in the control register.
Zhong (US 20230080111 A1) which teaches camera authentication method and a control apparatus applicable to an identity authentication of an on-board camera in the autonomous driving field.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BLAKE ISAAC NARRAMORE whose telephone number is (303)297-4357. The examiner can normally be reached on Monday - Friday 0700-1700 MT.
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/BLAKE I NARRAMORE/Primary Examiner, Art Unit 2438
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