Prosecution Insights
Last updated: July 17, 2026
Application No. 18/854,582

INTEGRATED SOLID-STATE CIRCUIT BREAKER WITH SUPERCONDUCTING FAULT CURRENT LIMITER

Non-Final OA §102§103
Filed
Oct 07, 2024
Priority
Apr 05, 2022 — provisional 63/327,548 +2 more
Examiner
FAUBERT, SAMANTHA LYNETTE
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
University Of Nebraska
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
82%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
44 granted / 52 resolved
+16.6% vs TC avg
Minimal -3% lift
Without
With
+-2.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
15 currently pending
Career history
66
Total Applications
across all art units

Statute-Specific Performance

§103
94.3%
+54.3% vs TC avg
§102
4.1%
-35.9% vs TC avg
§112
1.6%
-38.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 52 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-2, 4-6, & 11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Schacherer et al., US20140005053 (hereinafter referred to as Schacherer). In regards to claim 1, Schacherer teaches a superconducting solid-state circuit breaker (S3CB) (current rise limiter; [Abstract]) in a direct current (DC) power system (high voltage DC system; [Abstract]), wherein the DC power system includes a line impedance (DC voltage source 3; [Fig. 1]) and a load impedance (load 4; [Fig. 1]), and wherein the S3CB includes: a solid-state circuit breaker (SSCB) (assembly 1; [Fig. 1]) operable to: sense a DC current (winding sense; [0044]); and isolate current faults (ground fault 5; [0030] & [Fig. 1]) based at least in part on the sensed DC current during an occurrence of tripping in the DC power system (switch off the current I; [0030]); and an intelligent-superconducting fault current limiter (i-SFCL) positioned in series with the SSCB (current rise limiter 2; [Fig. 1]), and operable to limit fault currents associated with the sensed DC current (the inductance experienced by first coil 12 is low; [0046]). In regards to claim 2, Schacherer teaches wherein the SSCB includes three branches of elements connected in parallel with one another, and wherein the three branches include: a main branch (lower branch; [Fig. 1]) including solid-state switches (switch 6; [Fig. 1]), wherein the main branch is operable to function as a path for load currents associated with the load impedance; a snubber branch (middle branch with inductor 9 and capacitor 8; [Fig. 1]) operable to slow down a voltage rising rate (implicit of a capacitor and inductor) on the main branch during current interruptions in the DC power system; and a branch including energy absorbing elements (upper branch with arrestor (varistor) 10; [Fig. 1]) operable to dissipate inductive energy stored in a line inductance of the line impedance in the DC power system (implicit of an arrestor). In regards to claim 4, Schacherer teaches wherein the snubber branch includes one or more of: a capacitor (capacitor; [Fig. 1]), resistor-capacitor (RC), and resistor-capacitor-diode (RCD), based at least in part on voltage and current ratings of the SSCB. In regards to claim 5, Schacherer teaches wherein the branch including the energy absorbing elements include metal-oxide-varistors (MOVs) (varistor; [Fig. 1]) or active MOVs, wherein solid-state switches are connected in series with the MOVs or the active MOVs to extend the maximum allowable voltage on the SSCB during the OFF state of one or more of the solid-state switches. In regards to claim 6, Schacherer teaches wherein the i-SFCL includes a branch including superconductor elements (inductance of current rise limiter; [0046]) in a path of load currents associated with the load impedance. In regards to claim 11, Schacherer teaches wherein the SSCB is operable to isolate the current faults in response to a determination that the sensed DC current is higher than a short circuit instantaneous threshold value (exceeds a certain threshold; [0026]) associated with the DC power system, and wherein the i-SFCL is in an inactive state (inductance that increases with a current, change of the inductance; [0026]) during a time interval when the sensed DC current is higher than the short circuit instantaneous threshold value. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Schacherer et al., US20140005053 (hereinafter referred to as Schacherer) in view of Qi et al., US20220085600 (hereinafter referred to as Qi). In regards to claim 3, Schacherer does not teach wherein the main branch includes one or more of: metal oxide silicon field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), and integrated gate commutated thyristors (IGCTs), based at least in part on an operating voltage of the DC power system and the maximum fault current aimed to be interrupted in the DC power system. Qi teaches wherein the main branch includes one or more of: metal oxide silicon field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), and integrated gate commutated thyristors (IGCTs) (IGCT; 0013]), based at least in part on an operating voltage of the DC power system and the maximum fault current aimed to be interrupted in the DC power system. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Schacherer in order to incorporate wherein the main branch includes one or more of: metal oxide silicon field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), and integrated gate commutated thyristors (IGCTs), based at least in part on an operating voltage of the DC power system and the maximum fault current aimed to be interrupted in the DC power system as taught by Qi. The motivation for doing so would be improve the switch to be remotely controlled. Allowable Subject Matter Claim 7 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The prior art of record, either singularly or in combination, does not disclose or suggest the combination or limitations including “wherein the i-SFCL further includes a quench accelerator connected in parallel to the branch including the superconductor elements of the i-SFCL.” Claim 8 would be allowed based on dependence of claim 7. Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The prior art of record, either singularly or in combination, does not disclose or suggest the combination or limitations including “wherein the i-SFCL further includes a quench protection branch connected in parallel to the branch including the superconductor elements of the i-SFCL, wherein the quench protection branch is operable to protect the superconductor elements in the branch from localized damages and speed up a recovery time of the superconductor elements in the branch after a current limiting process.” Claim 10 would be allowed based on dependence of claim 9. Claim 12 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The prior art of record, either singularly or in combination, does not disclose or suggest the combination or limitations including “wherein the i-SFCL includes a branch including superconductor elements and a quench accelerator, wherein the quench accelerator of the i-SFCL is operable to speed up a response time of the superconductor elements in limiting the sensed DC current in the DC power system, in response to a determination that the sensed DC current is lower than or equal to the short circuit instantaneous threshold value and further in response to a determination that the sensed DC current is higher than a current limiting threshold value associated with the DC power system.” Claims 13 & 14 would be allowed based on dependence on claim 12. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMANTHA L FAUBERT whose telephone number is (703)756-1311. The examiner can normally be reached Monday - Friday 8AM - 5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal Hammond can be reached at 5712701682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. SAMANTHA LYNETTE FAUBERT Examiner Art Unit 2836 /CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Oct 07, 2024
Application Filed
Jun 17, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
82%
With Interview (-2.8%)
2y 8m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 52 resolved cases by this examiner. Grant probability derived from career allowance rate.

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