Prosecution Insights
Last updated: October 02, 2026
Application No. 18/854,761

SOLENOID CONTROLLER

Final Rejection §102§103
Filed
Oct 07, 2024
Priority
Apr 08, 2022 — RE 10-2022-0043967 +1 more
Examiner
AL-TAWEEL, MUAAMAR QAHTAN
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Innotek Co., Ltd.
OA Round
2 (Final)
81%
Grant Probability
Favorable
3-4
OA Rounds
6m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
58 granted / 72 resolved
+12.6% vs TC avg
Strong +20% interview lift
Without
With
+19.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
59 currently pending
Career history
129
Total Applications
across all art units

Statute-Specific Performance

§103
61.2%
+21.2% vs TC avg
§102
36.6%
-3.4% vs TC avg
§112
2.3%
-37.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 72 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed on 07/29/2026 have been fully considered but they are not persuasive because the Applicant’s amendments do not overcome the prior art. However, the previous drawing objection, specification objection and the rejection under 35 U.S.C 112(b) have been withdrawn because the Applicant’s arguments are persuasive. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-10 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Czimmek (US Publication No. 20120268222). Regarding claim 1, Czimmek discloses a solenoid controller (i.e., such as solenoid L3 controller; see for example fig. 2B, para. [0027]- [0048]) comprising: a switching unit (i.e., such as switching unit H-Bridge Q3-Q6; see for example fig. 2B, para. [0027]- [0048]) configured to output a voltage (i.e., such as input voltage Vin; for instance, the embodiments of the invention provide for detecting excessive current and concurrently detecting oscillation status for starting, or restarting, the oscillator. Additionally, embodiments of the invention compensate the detection of the excessive current for any change in supply voltage to the induction heater driver as supply voltage variation would affect the level of excessive current. Additionally, embodiments of the invention cause the power oscillator to synchronize with the excessive current such that this current may aid in the oscillation function; see for example fig. 2B, para. [0022]) inputted from a power supply unit (i.e., such as power supply unit V-supply; for instance, V-supply feeds the circuit via power line L2; see for example fig. 1, para. [0027]- [0048]) to a solenoid (i.e., such as solenoid L3; see for example fig. 2B, para. [0027]- [0048]); a first clamping element (i.e., such as first clamping element Zener diode D2; for instance, the cathode of Zener diode D2 is directly coupled to the H-Bridge end terminal 3, and the anode of Zener diode D2 is indirectly coupled to the solenoid end terminal 2 via the butterfly diode D4; see for example fig. 2B, para. [0027]- [0048]) connecting (i.e., such as connecting via the butterfly diode D4; see for example fig. 2B, para. [0027]- [0048]) one end (i.e., such as one end terminal 2 of the solenoid L3; see for example fig. 2B, para. [0027]- [0048]) of the solenoid (i.e., such as solenoid L3; see for example fig. 2B, para. [0027]- [0048]) and the power supply unit (i.e., such as power supply unit V-supply; for instance, V-supply feeds the circuit via power line L2; see for example fig. 1, para. [0027]- [0048]); and a second clamping element (i.e., such as second clamping element Zener diode D11; for instance, the cathode of Zener diode D11 is directly coupled to the anode of Zener diode D2 and indirectly coupled to the solenoid end terminal 2 via the butterfly diode D4, and the anode of Zener diode D11 is directly coupled to the H-Bridge end terminal 3 and indirectly coupled to the ground GND via the resistor R8; see for example fig. 2B, para. [0027]- [0048]) connecting (i.e., such as connecting via the butterfly diode D4; see for example fig. 2B, para. [0027]- [0048]) one end (i.e., such as one end terminal 2 of the solenoid L3; see for example fig. 2B, para. [0027]- [0048]) of the solenoid (i.e., such as solenoid L3; see for example fig. 2B, para. [0027]- [0048]) and a ground (i.e., such as ground GND; see for example fig. 2B, para. [0027]- [0048]), wherein a clamping voltage (i.e., such as clamping voltage Vout = pi * Vin; for instance, C tank and L3 are the tank resonator capacitor and tank resonator inductor, respectively, of a resonant tank circuit. The resonant frequency of the tank circuit is fr=1/(2.pi. {square root over (LC)}), where L is the heater coil inductance L3 and C is the capacitance of tank capacitor C tank. The peak voltage in the tank circuit is set by V.sub.out=.pi.*V.sub.in where V.sub.in is the supply voltage; see for example fig. 2B, para. [0031]) of the first clamping element (i.e., such as first clamping element Zener diode D2; for instance, the cathode of Zener diode D2 is directly coupled to the H-Bridge end terminal 3, and the anode of Zener diode D2 is indirectly coupled to the solenoid end terminal 2 via the butterfly diode D4; see for example fig. 2B, para. [0027]- [0048]) is higher (i.e., such as Vout is higher than Vin by a factor pi; for instance, Vout = pi * Vin; see for example fig. 2B, para. [0031]) than the voltage (i.e., such as input voltage Vin; for instance, the embodiments of the invention provide for detecting excessive current and concurrently detecting oscillation status for starting, or restarting, the oscillator. Additionally, embodiments of the invention compensate the detection of the excessive current for any change in supply voltage to the induction heater driver as supply voltage variation would affect the level of excessive current. Additionally, embodiments of the invention cause the power oscillator to synchronize with the excessive current such that this current may aid in the oscillation function; see for example fig. 2B, para. [0022]) of the power supply unit (i.e., such as power supply unit V-supply; for instance, V-supply feeds the circuit via power line L2; see for example fig. 1, para. [0027]- [0048]), a predetermined voltage (i.e., such as to create a pulse of pre-determined width with a voltage pre-determined by logic voltage that generates a packet of charge through R30 which charges C20 to a voltage that is now a function of tank frequency; para. [0041]), a voltage (i.e., such as the voltage across Zener diode D2; fig. 2B). Regarding claim 2, Czimmek discloses the solenoid controller (i.e., such as solenoid L3 controller; see for example fig. 2B, para. [0027]- [0048]); wherein when power (i.e., such as power in equation Energy-supply = 1/2 * C * V^2; for instance, C tank and L3 are the tank resonator capacitor and tank resonator inductor, respectively, of a resonant tank circuit. The resonant frequency of the tank circuit is fr=1/(2.pi. {square root over (LC)}), where L is the heater coil inductance L3 and C is the capacitance of tank capacitor C tank. The peak voltage in the tank circuit is set by V.sub.out=.pi.*V.sub.in where V.sub.in is the supply voltage. The current level in the tank circuit is determined from the energy balance of 1/2 * L * I^2 = 1/2 * C * V^2; see for example fig. 2B, para. [0027]- [0048]) of the power supply unit (i.e., such as power supply unit V-supply; for instance, V-supply feeds the circuit via power line L2; see for example fig. 1, para. [0027]- [0048]) is not applied (i.e., such as the H-Bridge/Switch is OFF; for instance, ideally, energy should be replenished to the tank circuit when either the voltage or the current in the switching device is zero. The electromagnetic noise is lower during zero-voltage or zero-current switching and is lowest during zero-voltage switching. The switching device dissipates the least power under zero switching. That ideal switching point occurs twice per cycle when the sine wave crosses zero and reverses polarity; i.e., when the sine wave crosses zero in a first direction from positive to negative, and when the sine wave crosses zero in a second direction from negative to positive. The energy replenishment is enabled by semiconductor switches and the zero-voltage switching is synchronized with the resonance of the oscillator tank circuit; see for example fig. 2B, para. [0027]- [0048]) to the solenoid (i.e., such as solenoid L3; see for example fig. 2B, para. [0027]- [0048]) by the switching unit (i.e., such as switching unit H-Bridge Q3-Q6; see for example fig. 2B, para. [0027]- [0048]), and when a magnitude of an induced voltage (i.e., such as magnitude of induced voltage derived from the energy stored in the solenoid L3 in equation Energy-solenoid = 1/2 * L * I^2; for instance, C tank and L3 are the tank resonator capacitor and tank resonator inductor, respectively, of a resonant tank circuit. The resonant frequency of the tank circuit is fr=1/ (2.pi. {square root over (LC)}), where L is the heater coil inductance L3 and C is the capacitance of tank capacitor C tank. The peak voltage in the tank circuit is set by V.sub.out=.pi.*V.sub.in where V.sub.in is the supply voltage. The current level in the tank circuit is determined from the energy balance of 1/2 * L * I^2 = 1/2 * C * V^2; see for example fig. 2B, para. [0027]- [0048]) that occurs in the solenoid (i.e., such as solenoid L3; see for example fig. 2B, para. [0027]- [0048]) corresponds (i.e., such as corresponds as equals; for instance, in case of the ideal scenario as zero power loss in the power switches of the H-Bridge in its OFF state the energy is balanced as expressed in the equation: 1/2 * L * I^2 = 1/2 * C * V^2; see for example fig. 2B, para. [0027]- [0048]) to between the clamping voltage (i.e., such as clamping voltage Vout = pi * Vin; for instance, C tank and L3 are the tank resonator capacitor and tank resonator inductor, respectively, of a resonant tank circuit. The resonant frequency of the tank circuit is fr=1/(2.pi. {square root over (LC)}), where L is the heater coil inductance L3 and C is the capacitance of tank capacitor C tank. The peak voltage in the tank circuit is set by V.sub.out=.pi.*V.sub.in where V.sub.in is the supply voltage; see for example fig. 2B, para. [0031]) and the voltage (i.e., such as input voltage Vin; for instance, the embodiments of the invention provide for detecting excessive current and concurrently detecting oscillation status for starting, or restarting, the oscillator. Additionally, embodiments of the invention compensate the detection of the excessive current for any change in supply voltage to the induction heater driver as supply voltage variation would affect the level of excessive current. Additionally, embodiments of the invention cause the power oscillator to synchronize with the excessive current such that this current may aid in the oscillation function; see for example fig. 2B, para. [0022]) of the power supply unit (i.e., such as power supply unit V-supply; for instance, V-supply feeds the circuit via power line L2; see for example fig. 1, para. [0027]- [0048]), current is discharged (i.e., such as current derived from equation Energy-solenoid = 1/2 * L * I^2 is discharged via Zener diode D2 to the power line L2; for instance, the loading caused by the resistive and hysteretic loss of the heated component reflects back as a loss in the resonant tank circuit. That loss is replenished by current flowing from a current source inductor L2 to the top bridge transistors, Q5 and Q6. Depending on the state of reversal of the H-bridge in which the current flows, the current will flow either through Q5 or Q6 and then through induction heater coil L3. L2 supplies current to the tank circuit from the energy stored in its magnetic field. That energy is replenished from the supply voltage as a current that constantly flows into L2 during operation of the synchronous full-bridge power oscillator. L2 also provides transient separation of tank circuit from voltage source such that the tank voltage may be instantaneously higher than the source voltage during oscillation. That process repeats as the sine wave alternates polarity, crossing zero in a first direction from negative to positive, and then in a second direction from positive to negative. This generates full-reversal of current in L3, the induction heater coil. Current continues to be replenished in the tank circuit from L2; see for example fig. 2B, para. [0027]- [0048]) toward the power supply unit (i.e., such as power supply unit V-supply; for instance, V-supply feeds the circuit via power line L2; see for example fig. 1, para. [0027]- [0048]) through the first clamping element (i.e., such as first clamping element Zener diode D2; for instance, the cathode of Zener diode D2 is directly coupled to the H-Bridge end terminal 3, and the anode of Zener diode D2 is indirectly coupled to the solenoid end terminal 2 via the butterfly diode D4; see for example fig. 2B, para. [0027]- [0048]). Regarding claim 3, Czimmek discloses the solenoid controller (i.e., such as solenoid L3 controller; see for example fig. 2B, para. [0027]- [0048]); wherein when power (i.e., such as power in equation Energy-supply = 1/2 * C * V^2; for instance, C tank and L3 are the tank resonator capacitor and tank resonator inductor, respectively, of a resonant tank circuit. The resonant frequency of the tank circuit is fr=1/ (2.pi. {square root over (LC)}), where L is the heater coil inductance L3 and C is the capacitance of tank capacitor C tank. The peak voltage in the tank circuit is set by V.sub.out=.pi.*V.sub.in where V.sub.in is the supply voltage. The current level in the tank circuit is determined from the energy balance of 1/2 * L * I^2 = 1/2 * C * V^2; see for example fig. 2B, para. [0027]- [0048]) of the power supply unit (i.e., such as power supply unit V-supply; for instance, V-supply feeds the circuit via power line L2; see for example fig. 1, para. [0027]- [0048]) is not applied (i.e., such as the H-Bridge/Switch is OFF; for instance, ideally, energy should be replenished to the tank circuit when either the voltage or the current in the switching device is zero. The electromagnetic noise is lower during zero-voltage or zero-current switching and is lowest during zero-voltage switching. The switching device dissipates the least power under zero switching. That ideal switching point occurs twice per cycle when the sine wave crosses zero and reverses polarity; i.e., when the sine wave crosses zero in a first direction from positive to negative, and when the sine wave crosses zero in a second direction from negative to positive. The energy replenishment is enabled by semiconductor switches and the zero-voltage switching is synchronized with the resonance of the oscillator tank circuit; see for example fig. 2B, para. [0027]- [0048]) to the solenoid (i.e., such as solenoid L3; see for example fig. 2B, para. [0027]- [0048]) by the switching unit (i.e., such as switching unit H-Bridge Q3-Q6; see for example fig. 2B, para. [0027]- [0048]), and when a magnitude of an induced voltage (i.e., such as magnitude of induced voltage derived from the energy stored in the solenoid L3 in equation Energy-solenoid = 1/2 * L * I^2; for instance, C tank and L3 are the tank resonator capacitor and tank resonator inductor, respectively, of a resonant tank circuit. The resonant frequency of the tank circuit is fr=1/ (2.pi. {square root over (LC)}), where L is the heater coil inductance L3 and C is the capacitance of tank capacitor C tank. The peak voltage in the tank circuit is set by V.sub.out=.pi.*V.sub.in where V.sub.in is the supply voltage. The current level in the tank circuit is determined from the energy balance of 1/2 * L * I^2 = 1/2 * C * V^2; see for example fig. 2B, para. [0027]- [0048]) that occurs in the solenoid (i.e., such as solenoid L3; see for example fig. 2B, para. [0027]- [0048]) is larger (i.e., such as energy in terms of current/voltage is above a threshold value, as a consequence, the controller triggers the pull-down cycle via the low-side/bottom switches Q3-Q4; for instance, if current is flowing through Q5, as determined by the polarity of the sine wave half-cycle at that time, then the conduction to ground from Q4 drain-to-source is pulling charge out of the gate of Q5 and Q3 through forward biased D4. Q3 is also now not conducting and does not pull the gate charge out of Q6 and Q4 to ground through D5. Meanwhile R10 draws current from the supply voltage. But the IxR voltage drop across R10 cannot charge the gate of Q5 and Q3 with the gate shunted to ground by conduction through Q4. If an excessive current condition persists for numerous cycles, the logic state at inverting Schmidt-trigger U2, pin-set 12, 13, remains `HI` for a duty-cycle sufficient to charge C14, through R18 and D10, greater than the discharge rate through R19. This results in the voltage on C14 reaching the logic threshold `HI` input state on inverting Schmidt-trigger U3, pin-set 10, 11. The inverting state now presents a logic `LOW` to the input of inverting Schmidt-trigger U3, pin-set 8, 9, which results in a logic `HI` at reset pin of flip-flop U5, pin-set 1, 2, 3, 4, 5, 6, which serves as a resettable fault latch. Additionally, as determined by a NTC, or `Negative Temperature Coefficient` device, R21, forming a divider with R20, an over-temperature condition would also set a logic `LOW` at inverting Schmidt-trigger U3, pin-set 8, 9. Reset of fault is provided at J3, through R6. Fault condition logic state is presented to J2 through R3. Fault latch provides appropriate logic state, combined with logic state of J1 "Heater Enable" at AND gate U1, pin-set 5, 6, 7, to satisfy logic condition at AND gate U4, pin-set 1, 2, 3, such that PWM signal from U1, pin-set 5, 6, 7, passes to control switch Q9. FIG. 3 is a flow chart showing steps of a power-oscillator-starting method in accordance with embodiments of the invention. The power-oscillator-starting method of FIG. 3 includes: controlling at least one power switch of the power oscillator, as shown at 302; detecting a current level related to a state of the at least one power switch, as shown at 304; comparing the current level to a threshold level, as shown at 306; and decreasing the current level when the current level crosses the threshold level, as shown at 308; see for example fig. 3, para. [0049]) than the voltage (i.e., such as input voltage Vin; for instance, the embodiments of the invention provide for detecting excessive current and concurrently detecting oscillation status for starting, or restarting, the oscillator. Additionally, embodiments of the invention compensate the detection of the excessive current for any change in supply voltage to the induction heater driver as supply voltage variation would affect the level of excessive current. Additionally, embodiments of the invention cause the power oscillator to synchronize with the excessive current such that this current may aid in the oscillation function; see for example fig. 2B, para. [0022]) of the power supply unit (i.e., such as power supply unit V-supply; for instance, V-supply feeds the circuit via power line L2; see for example fig. 1, para. [0027]- [0048]), current is discharged (i.e., such as current derived from equation Energy-solenoid = 1/2 * L * I^2 is discharged via Zener diode D11 to the ground GND; for instance, the loading caused by the resistive and hysteretic loss of the heated component reflects back as a loss in the resonant tank circuit. That loss is replenished by current flowing from a current source inductor L2 to the top bridge transistors, Q5 and Q6. Depending on the state of reversal of the H-bridge in which the current flows, the current will flow either through Q5 or Q6 and then through induction heater coil L3. L2 supplies current to the tank circuit from the energy stored in its magnetic field. That energy is replenished from the supply voltage as a current that constantly flows into L2 during operation of the synchronous full-bridge power oscillator. L2 also provides transient separation of tank circuit from voltage source such that the tank voltage may be instantaneously higher than the source voltage during oscillation. That process repeats as the sine wave alternates polarity, crossing zero in a first direction from negative to positive, and then in a second direction from positive to negative. This generates full-reversal of current in L3, the induction heater coil. Current continues to be replenished in the tank circuit from L2; see for example fig. 2B, para. [0027]- [0048]) toward the ground (i.e., such as ground GND; see for example fig. 2B, para. [0027]- [0048]) through the second clamping element (i.e., such as second clamping element Zener diode D11; for instance, the cathode of Zener diode D11 is directly coupled to the anode of Zener diode D2 and indirectly coupled to the solenoid end terminal 2 via the butterfly diode D4, and the anode of Zener diode D11 is directly coupled to the H-Bridge end terminal 3 and indirectly coupled to the ground GND via the resistor R8; see for example fig. 2B, para. [0027]- [0048]). Regarding claim 4, Czimmek discloses the solenoid controller (i.e., such as solenoid L3 controller; see for example fig. 2B, para. [0027]- [0048]); wherein when power (i.e., such as power in equation Energy-supply = 1/2 * C * V^2; for instance, C tank and L3 are the tank resonator capacitor and tank resonator inductor, respectively, of a resonant tank circuit. The resonant frequency of the tank circuit is fr=1/(2.pi. {square root over (LC)}), where L is the heater coil inductance L3 and C is the capacitance of tank capacitor C tank. The peak voltage in the tank circuit is set by V.sub.out=.pi.*V.sub.in where V.sub.in is the supply voltage. The current level in the tank circuit is determined from the energy balance of 1/2 * L * I^2 = 1/2 * C * V^2; see for example fig. 2B, para. [0027]- [0048]) of the power supply unit (i.e., such as power supply unit V-supply; for instance, V-supply feeds the circuit via power line L2; see for example fig. 1, para. [0027]- [0048]) is not applied (i.e., such as the H-Bridge/Switch is OFF; for instance, ideally, energy should be replenished to the tank circuit when either the voltage or the current in the switching device is zero. The electromagnetic noise is lower during zero-voltage or zero-current switching and is lowest during zero-voltage switching. The switching device dissipates the least power under zero switching. That ideal switching point occurs twice per cycle when the sine wave crosses zero and reverses polarity; i.e., when the sine wave crosses zero in a first direction from positive to negative, and when the sine wave crosses zero in a second direction from negative to positive. The energy replenishment is enabled by semiconductor switches and the zero-voltage switching is synchronized with the resonance of the oscillator tank circuit; see for example fig. 2B, para. [0027]- [0048]) to the solenoid (i.e., such as solenoid L3; see for example fig. 2B, para. [0027]- [0048]) by the switching unit (i.e., such as switching unit H-Bridge Q3-Q6; see for example fig. 2B, para. [0027]- [0048]), and when a magnitude of an induced voltage (i.e., such as magnitude of induced voltage derived from the energy stored in the solenoid L3 in equation Energy-solenoid = 1/2 * L * I^2; for instance, C tank and L3 are the tank resonator capacitor and tank resonator inductor, respectively, of a resonant tank circuit. The resonant frequency of the tank circuit is fr=1/ (2.pi. {square root over (LC)}), where L is the heater coil inductance L3 and C is the capacitance of tank capacitor C tank. The peak voltage in the tank circuit is set by V.sub.out=.pi.*V.sub.in where V.sub.in is the supply voltage. The current level in the tank circuit is determined from the energy balance of 1/2 * L * I^2 = 1/2 * C * V^2; see for example fig. 2B, para. [0027]- [0048]) that occurs in the solenoid (i.e., such as solenoid L3; see for example fig. 2B, para. [0027]- [0048]) is smaller (i.e., such as energy in terms of current/voltage is under a threshold value, as a consequence, the controller triggers the pull-up cycle via the high-side/top switches Q5-Q6; for instance, when the sine wave crosses zero, then Q4 becomes reverse biased across the switching junction and forward biased across the internal intrinsic diode and therefore conducts current through the internal intrinsic diode to reverse-bias D4. D4 stops conducting current away from the Q5 and Q3 gate, and R10 can charge the gate of Q5 and Q3, which then stops conduction in Q5 and starts conduction in Q3 to begin conducting current for the continuing sine half-cycle. Q3 also pulls the gate charge out of Q6 and Q4 to ground through the now forward biased D5 and holds Q4 in a non-conducting state which continues to allow R10 to enhance Q3. And Q6 conducts. Control switch Q9, in the configuration of `high-side` power regulation of the example embodiment, disclosed separately, ultimately determines the average voltage at L2 and thereby controls the power to the power oscillator as a function of power oscillator frequency. Q9 pulls charge out of P-MOSFET Q8 through D16 to allow current to flow between source and drain of Q8 to L2. To minimize switching losses of Q8 during turn-off, Q7 bipolar transistor with Baker circuit comprised of D17, D18 and D19, enable faster charging of Q8 from supply voltage. Q9 also turns off Q7 through Baker circuit and D15. Q7 is turned on by current through R44 and Baker circuit. R45 allows gate of Q8 to reach substantially full supply voltage and avoid diode drop voltage differential across junction of Q7. FIG. 3 is a flow chart showing steps of a power-oscillator-starting method in accordance with embodiments of the invention. The power-oscillator-starting method of FIG. 3 includes: controlling at least one power switch of the power oscillator, as shown at 302; detecting a current level related to a state of the at least one power switch, as shown at 304; comparing the current level to a threshold level, as shown at 306; and decreasing the current level when the current level crosses the threshold level, as shown at 308; see for example fig. 3, para. [0049]) than the voltage (i.e., such as input voltage Vin; for instance, the embodiments of the invention provide for detecting excessive current and concurrently detecting oscillation status for starting, or restarting, the oscillator. Additionally, embodiments of the invention compensate the detection of the excessive current for any change in supply voltage to the induction heater driver as supply voltage variation would affect the level of excessive current. Additionally, embodiments of the invention cause the power oscillator to synchronize with the excessive current such that this current may aid in the oscillation function; see for example fig. 2B, para. [0022]) of the power supply unit (i.e., such as power supply unit V-supply; for instance, V-supply feeds the circuit via power line L2; see for example fig. 1, para. [0027]- [0048]), current is discharged (i.e., such as current derived from equation Energy-solenoid = 1/2 * L * I^2 is discharged via H-Bridge switch/Q3 to the ground GND; for instance, the loading caused by the resistive and hysteretic loss of the heated component reflects back as a loss in the resonant tank circuit. That loss is replenished by current flowing from a current source inductor L2 to the top bridge transistors, Q5 and Q6. Depending on the state of reversal of the H-bridge in which the current flows, the current will flow either through Q5 or Q6 and then through induction heater coil L3. L2 supplies current to the tank circuit from the energy stored in its magnetic field. That energy is replenished from the supply voltage as a current that constantly flows into L2 during operation of the synchronous full-bridge power oscillator. L2 also provides transient separation of tank circuit from voltage source such that the tank voltage may be instantaneously higher than the source voltage during oscillation. That process repeats as the sine wave alternates polarity, crossing zero in a first direction from negative to positive, and then in a second direction from positive to negative. This generates full-reversal of current in L3, the induction heater coil. Current continues to be replenished in the tank circuit from L2; see for example fig. 2B, para. [0027]- [0048]) to the ground (i.e., such as ground GND; see for example fig. 2B, para. [0027]- [0048]) through the switching unit (i.e., such as switching unit H-Bridge Q3-Q6; see for example fig. 2B, para. [0027]- [0048]). Regarding claim 5, Czimmek discloses the solenoid controller (i.e., such as solenoid L3 controller; see for example fig. 2B, para. [0027]- [0048]); wherein the first clamping element (i.e., such as first clamping element Zener diode D2; for instance, the cathode of Zener diode D2 is directly coupled to the H-Bridge end terminal 3, and the anode of Zener diode D2 is indirectly coupled to the solenoid end terminal 2 via the butterfly diode D4; see for example fig. 2B, para. [0027]- [0048]) and the second clamping element (i.e., such as second clamping element Zener diode D11; for instance, the cathode of Zener diode D11 is directly coupled to the anode of Zener diode D2 and indirectly coupled to the solenoid end terminal 2 via the butterfly diode D4, and the anode of Zener diode D11 is directly coupled to the H-Bridge end terminal 3 and indirectly coupled to the ground GND via the resistor R8; see for example fig. 2B, para. [0027]- [0048]) comprise at least one of a Zener diode or a TVS diode (i.e., such as Zener diode D2 and Zener diode D11; for instance, Zener or avalanche diodes D2, D3, D6, D7, D11, D12, and additionally on incoming supply voltage, D14, provide for overvoltage protection and voltage limiting for the protection of the gate structures of the power switching devices and also the control electronics; see for example fig. 2B, para. [0027]- [0048]). Regarding claim 6, Czimmek discloses the solenoid controller (i.e., such as solenoid L3 controller; see for example fig. 2B, para. [0027]- [0048]); wherein the first clamping element (i.e., such as first clamping element Zener diode D2; for instance, the cathode of Zener diode D2 is directly coupled to the H-Bridge end terminal 3, and the anode of Zener diode D2 is indirectly coupled to the solenoid end terminal 2 via the butterfly diode D4; see for example fig. 2B, para. [0027]- [0048]) has an anode (i.e., such as anode/first clamping element Zener diode D2; for instance, the cathode of Zener diode D2 is directly coupled to the H-Bridge end terminal 3, and the anode of Zener diode D2 is indirectly coupled to the solenoid end terminal 2 via the butterfly diode D4; see for example fig. 2B, para. [0027]- [0048]) connected to one end (i.e., such as one end terminal 2 of the solenoid L3; see for example fig. 2B, para. [0027]- [0048]) of the solenoid (i.e., such as solenoid L3; see for example fig. 2B, para. [0027]- [0048]) and a cathode (i.e., such as cathode/first clamping element Zener diode D2; for instance, the cathode of Zener diode D2 is directly coupled to the H-Bridge end terminal 3/supply line L3, and the anode of Zener diode D2 is indirectly coupled to the solenoid end terminal 2 via the butterfly diode D4; see for example fig. 2B, para. [0027]- [0048]) connected to the power supply unit (i.e., such as power supply unit V-supply; for instance, V-supply feeds the circuit via power line L2; see for example fig. 1, para. [0027]- [0048]), and wherein the second clamping element (i.e., such as second clamping element Zener diode D11; for instance, the cathode of Zener diode D11 is directly coupled to the anode of Zener diode D2 and indirectly coupled to the solenoid end terminal 2 via the butterfly diode D4, and the anode of Zener diode D11 is directly coupled to the H-Bridge end terminal 3 and indirectly coupled to the ground GND via the resistor R8; see for example fig. 2B, para. [0027]- [0048]) has a cathode (i.e., such as cathode/second clamping element Zener diode D11; for instance, the cathode of Zener diode D11 is directly coupled to the anode of Zener diode D2 and indirectly coupled to the solenoid end terminal 2 via the butterfly diode D4, and the anode of Zener diode D11 is directly coupled to the H-Bridge end terminal 3 and indirectly coupled to the ground GND via the resistor R8; see for example fig. 2B, para. [0027]- [0048]) connected to one end (i.e., such as one end terminal 2 of the solenoid L3; see for example fig. 2B, para. [0027]- [0048]) of the solenoid (i.e., such as solenoid L3; see for example fig. 2B, para. [0027]- [0048]) and an anode (i.e., such as anode/second clamping element Zener diode D11; for instance, the cathode of Zener diode D11 is directly coupled to the anode of Zener diode D2 and indirectly coupled to the solenoid end terminal 2 via the butterfly diode D4, and the anode of Zener diode D11 is directly coupled to the H-Bridge end terminal 3 and indirectly coupled to the ground GND via the resistor R8; see for example fig. 2B, para. [0027]- [0048]) connected to the ground (i.e., such as ground GND; see for example fig. 2B, para. [0027]- [0048]). Regarding claim 7, Czimmek discloses the solenoid controller (i.e., such as solenoid L3 controller; see for example fig. 2B, para. [0027]- [0048]); wherein the power supply unit (i.e., such as power supply unit V-supply; for instance, V-supply feeds the circuit via power line L2; see for example fig. 1, para. [0027]- [0048]) comprises a battery (i.e., such as battery; for instance, the voltage supply may be a power supply, or in the case of a vehicle, a battery or an alternator, and is a source of potential energy to replenish energy lost in the oscillator; see for example fig. 1, para. [0027]- [0048]). Regarding claim 8, Czimmek discloses the solenoid controller (i.e., such as solenoid L3 controller; see for example fig. 2B, para. [0027]- [0048]); wherein the switching unit (i.e., such as switching unit H-Bridge Q3-Q6; see for example fig. 2B, para. [0027]- [0048]) comprises: a plurality of high-side switches (i.e., such as plurality of high-side/top switches Q5-Q6; see for example fig. 2B, para. [0027]- [0048]) and a plurality of low-side switches (i.e., such as plurality of low-side/bottom switches Q3-Q4; see for example fig. 2B, para. [0027]- [0048]) that are complementarily conducting to one another (i.e., such as complementarily conducting to one another; for instance, the zero-switching power oscillator circuit should be self-starting in oscillation, but may be forced into oscillation by selectively sequencing the switching of Q3-Q6 in a full-reversing H-bridge strategy. The embodiment of this invention takes advantage of this for this type of oscillator. The complimentary pairs, or here, the pairs of transistors that are flowing current between the MOSFET `drain` and `source` at the same time are Q6 and Q3 or Q5 and Q4. Embodiments of the invention are described with reference to implementation on a previously disclosed power oscillator, Continental Reference Number: 2011E00365US, whose topology uses two pairs of complimentary pairs of power switching transistors in a modified full-bridge, or H-bridge, configuration. Deviations from a full-bridge driver include that: (1) the bridge is fed from a constant-current source inductor, and (2) the load section of the conventional full bridge is replaced with the resonant tank circuit. The oscillator-synchronous inherent zero-switching topology that drives the gates of the complimentary pairs of transistors in alternating sequence of diagonal pairs is a further deviation from a conventional full-bridge; see for example fig. 2B, para. [0027]- [0048]). Regarding claim 9, Czimmek discloses the solenoid controller (i.e., such as solenoid L3 controller; see for example fig. 2B, para. [0027]- [0048]); wherein the switching unit (i.e., such as switching unit H-Bridge Q3-Q6; see for example fig. 2B, para. [0027]- [0048]) comprises: a first high-side switch (i.e., such as first high-side/top switch Q5; see for example fig. 2B, para. [0027]- [0048]) and a first low-side switch (i.e., such as first low-side/bottom switch Q3; see for example fig. 2B, para. [0027]- [0048]) connected to the power supply unit (i.e., such as power supply unit V-supply; for instance, V-supply feeds the circuit via power line L2; see for example fig. 1, para. [0027]- [0048]); and a second high-side switch (i.e., such as second high-side/top switch Q6; see for example fig. 2B, para. [0027]- [0048]) and a second low-side switch (i.e., such as second low-side/bottom switch Q4; see for example fig. 2B, para. [0027]- [0048]) connected to the power supply unit (i.e., such as power supply unit V-supply; for instance, V-supply feeds the circuit via power line L2; see for example fig. 1, para. [0027]- [0048]), wherein a node (i.e., such as node terminal 2; see for example fig. 2B, para. [0027]- [0048]) between the first high-side switch (i.e., such as first high-side/top switch Q5; see for example fig. 2B, para. [0027]- [0048]) and the first low-side switch (i.e., such as first low-side/bottom switch Q3; see for example fig. 2B, para. [0027]- [0048]) is connected to one end (i.e., such as one end terminal 2 of the solenoid L3; see for example fig. 2B, para. [0027]- [0048]) of the solenoid (i.e., such as solenoid L3; see for example fig. 2B, para. [0027]- [0048]), and wherein a node (i.e., such as node terminal 2; see for example fig. 2B, para. [0027]- [0048]) between the second high-side switch (i.e., such as second high-side/top switch Q6; see for example fig. 2B, para. [0027]- [0048]) and the second low-side switch (i.e., such as second low-side/bottom switch Q4; see for example fig. 2B, para. [0027]- [0048]) is connected to the other end (i.e., such as the other end terminal 2 of the solenoid L3; see for example fig. 2B, para. [0027]- [0048]) of the solenoid (i.e., such as solenoid L3; see for example fig. 2B, para. [0027]- [0048]). Regarding claim 10, Czimmek discloses the solenoid controller (i.e., such as solenoid L3 controller; see for example fig. 2B, para. [0027]- [0048]); wherein when the solenoid (i.e., such as solenoid L3; see for example fig. 2B, para. [0027]- [0048]) is turned off (i.e., such as solenoid L3 is turned off as of zero-current in terminals 2; see for example fig. 2B, para. [0027]- [0048]), the first high-side switch (i.e., such as first high-side/top switch Q5; see for example fig. 2B, para. [0027]- [0048]) and the second low-side switch (i.e., such as second low-side/bottom switch Q4; see for example fig. 2B, para. [0027]- [0048]) are turned off (i.e., such as the H-Bridge is turned off in a diagonal scheme as of switching off either diagonal Q5-Q4 or diagonal Q6-Q3; for instance, the oscillator-synchronous inherent zero-switching topology that drives the gates of the complimentary pairs of transistors in alternating sequence of diagonal pairs is a further deviation from a conventional full-bridge; see for example fig. 2B, para. [0027]- [0048]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 11-20 are rejected under 35 U.S.C. 103 as being unpatentable over Czimmek (US Publication No. 20120268222) in view of Zannis (US Patent No. 5028856). Regarding claim 11, Czimmek discloses the solenoid controller (i.e., such as solenoid L3 controller; see for example fig. 2B, para. [0027]- [0048]). Czimmek does not explicitly disclose a solenoid motor comprising: a solenoid driven according to a voltage input. Zannis discloses a solenoid motor (i.e., such as solenoid motor L1; for instance, the linear drive motor is based around a proportional solenoid L1; see for example fig. 3, Col. 2 lines 34+) comprising: a solenoid (i.e., such as solenoid L1; see for example fig. 3, Col. 2 lines 34+) driven (i.e., such as driven; for instance, for higher efficiency, it is possible to use a bridge arrangement as shown in FIG. 3. The solenoid L1 and velocity transducer F1 are arranged mechanically in the same way as shown in FIG. 1. Electrically, however, the solenoid L1 is connected in series between the respective outputs of two drivers D2, D3; see for example fig. 3, Col. 2 lines 34+) according to a voltage input (i.e., such as voltage input V1; see for example fig. 3, Col. 2 lines 34+). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the solenoid motor in Czimmek, as taught by Zannis, as it provides the advantage of optimizing the circuit design towards converting electrical energy into precise, fast, and linear mechanical motion, acting as highly reliable, compact, and cost-effective actuators in automated systems. And, as for the rest of the limitations/features in claim 11 is rejected for the same reasons that have already been stated/discussed above in rejected claim 1. {See rejection of claim 1} Regarding claim 12, is rejected for the same reasons that have already been stated/discussed above in rejected claim 2. {See rejection of claim 2} Regarding claim 13, is rejected for the same reasons that have already been stated/discussed above in rejected claim 3. {See rejection of claim 3} Regarding claim 14, is rejected for the same reasons that have already been stated/discussed above in rejected claim 4. {See rejection of claim 4} Regarding claim 15, is rejected for the same reasons that have already been stated/discussed above in rejected claim 5. {See rejection of claim 5} Regarding claim 16, is rejected for the same reasons that have already been stated/discussed above in rejected claim 6. {See rejection of claim 6} Regarding claim 17, is rejected for the same reasons that have already been stated/discussed above in rejected claim 7. {See rejection of claim 7} Regarding claim 18, is rejected for the same reasons that have already been stated/discussed above in rejected claim 8. {See rejection of claim 8} Regarding claim 19, is rejected for the same reasons that have already been stated/discussed above in rejected claim 9. {See rejection of claim 9} Regarding claim 20, is rejected for the same reasons that have already been stated/discussed above in rejected claim 10. {See rejection of claim 10} Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MUAAMAR Q AL-TAWEEL whose telephone number is (571)270-0339. The examiner can normally be reached 0730-1700. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu V Tran can be reached at (571) 270- 1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MUAAMAR QAHTAN AL-TAWEEL/Examiner, Art Unit 2838 /THIENVU V TRAN/Supervisory Patent Examiner, Art Unit 2838
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Prosecution Timeline

Oct 07, 2024
Application Filed
Apr 29, 2026
Non-Final Rejection mailed — §102, §103
Jul 29, 2026
Response Filed
Aug 20, 2026
Final Rejection mailed — §102, §103 (current)

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