Prosecution Insights
Last updated: May 29, 2026
Application No. 18/854,907

ANTENNA APPARATUS, COMMUNICATION APPARATUS, AND IMAGE CAPTURING SYSTEM

Non-Final OA §102
Filed
Oct 07, 2024
Priority
Apr 15, 2022 — JP 2022-067824 +1 more
Examiner
CHANG, JOSEPH
Art Unit
2849
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Canon Kabushiki Kaisha
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
3m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
1047 granted / 1168 resolved
+21.6% vs TC avg
Minimal +4% lift
Without
With
+4.0%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
20 currently pending
Career history
1185
Total Applications
across all art units

Statute-Specific Performance

§101
1.6%
-38.4% vs TC avg
§103
48.4%
+8.4% vs TC avg
§102
26.6%
-13.4% vs TC avg
§112
9.6%
-30.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1168 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1,7 and 13 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by EP4203027. Regarding claims 1, EP4203027 an antenna apparatus (Figures 4, 5A, 5B, 6A, 7 and 12) comprising: a first substrate (FIG. 6A, 104) including an antenna array (102) in which a plurality of active antennas each including an antenna and a semiconductor structure (101, ¶[0030],[0069]) configured to generate or detect an electromagnetic wave are provided, and a wiring (FIG 5 and 12, 117) electrically connected to the plurality of active antennas; and a second substrate (112) stacked on the first substrate and including a control circuit (FIG 6A, 6B, 7, bias circuit 180) of the antenna array, wherein the first substrate and the second substrate are bonded at a bonding surface (FIG 5 and 6A), the control circuit (FIG 4 and 7 bias circuit 180 is connected to the antenna to 105 through the bondwire 117) is electrically connected to the antenna array via the wiring, the control circuit of the second substrate controls oscillations of the plurality of active antennas of the first substrate (implied from controlling the bias voltage), the antenna includes a first conductor (FIG. 6A, the conductor layer comprising the antenna 102) formed in a first layer, and a second conductor (ground 103) formed in a second layer, and in a sectional view, the semiconductor structure (FIG. 6A, 101) is arranged between the first layer and the second layer (FIG. 6A). Regarding claim 7, EP4203027 an antenna apparatus (Figures 4, 5A, 5B, 6A, 7 and 12) comprising: a first substrate (FIG. 6A, 104) including an antenna array (102) in which a plurality of active antennas each including an antenna and a semiconductor structure (101, ¶[0030],[0069]) configured to generate or detect an electromagnetic wave are provided, and a wiring (FIG 5 and 12, 117) electrically connected to the plurality of active antennas; and a second substrate (112) stacked on the first substrate and including a control circuit (FIG 6A, 6B, 7, bias circuit 180) of the antenna array, wherein the first substrate and the second substrate are bonded at a bonding surface(FIG 5 and 6A), the control circuit (FIG 4 and 7 bias circuit 180 is connected to the antenna to 105 through the bondwire 117) is electrically connected to the antenna array via the wiring, the control circuit of the second substrate controls the emission and detection of the electromagnetic wave via the plurality of active antennas of the first substrate (implied from controlling the bias voltage), the antenna includes a first conductor (FIG. 6A, the conductor layer comprising the antenna 102) formed in a first layer, and a second conductor (ground 103) formed in a second layer, and in a sectional view, the semiconductor structure (FIG. 6A, 101) is arranged between the first layer and the second layer (FIG. 6A). Regarding claim 13, EP4203027 an antenna apparatus (Figures 4, 5A, 5B, 6A, 7 and 12) comprising: a first substrate (FIG. 6A, 104) including an antenna array (102) in which a plurality of active antennas each including an antenna and a semiconductor structure (101, ¶[0030],[0069]) configured to generate or detect an electromagnetic wave are provided, and a wiring (FIG 5 and 12, 117) electrically connected to the plurality of active antennas; and a second substrate (112) stacked on the first substrate and including a control circuit (FIG 6A, 6B, 7, bias circuit 180) of the antenna array, wherein the first substrate and the second substrate are bonded at a first bonding surface (FIG 5 and 6A), the control circuit (FIG 4 and 7 bias circuit 180 is connected to the antenna to 105 through the bondwire 117) is electrically connected to the antenna array via the wiring, the control circuit of the second substrate controls operations of the plurality of active antennas of the first substrate, the first substrate contains a compound semiconductor (FIG 9, substrate 109 ¶[0030]) to which a different compound (FIG 6A, chip ground 107) is bonded by a second bonding surface (implied from controlling the bias voltage), the antenna includes a first conductor (FIG. 6A, the conductor layer comprising the antenna 102) formed in a first layer, and a second conductor (ground 103) formed in a second layer, and in a sectional view, the semiconductor structure (FIG. 6A, 101) is arranged between the first layer and the second layer (FIG. 6A). Regarding claims 2 and 8, EP4203027 discloses the apparatus wherein the control circuit includes a plurality of control elements (bias lines), and the plurality of control elements are connected to the plurality of active antennas in one-to-one correspondence. Regarding claim 14, EP4203027 discloses the apparatus wherein the first bonding surface (bottom) and the second bonding surface (top) are parallel to each other (FIG 6A). Regarding claims 3,9 and 15, EP4203027 discloses the apparatus wherein the second conductor (103) is arranged between the first layer (layer comprising the antennas) and the bonding surface (bottom surface of the layer 111) and has an area larger than an area of the first conductor. Regarding claims 4,10 and 16, EP4203027 discloses the apparatus wherein the wiring includes a first via (120) configured to connect the first conductor (102) and a third layer (105) provided between the first layer (102) and the second layer (103). Regarding claims 5,11 and 18, EP4203027 discloses a communication apparatus comprising: the antenna apparatus; a transmission unit configured to emit an electromagnetic wave; and a reception unit configured to detect the electromagnetic wave. Regarding claims 6,12 and 19, EP4203027 discloses an image capturing system comprising: the antenna apparatus; a transmission unit configured to emit an electromagnetic wave to an object; and a detection unit configured to detect the electromagnetic wave reflected by the object (¶[0096]). Regarding claims 17, EP4203027 discloses the apparatus wherein the compound semiconductor (FIG 9, substrate 109 ¶[0030]) includes a first electrode electrically connected to the first conductor (102), and a second electrode electrically connected to the second conductor (103), and the first conductor and the second conductor face each other (FIG 6A). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Smith (US 2002/0093396) discloses an active antenna showing semiconductor amplifiers, CMOS control circuitry, micro-switches a strip of substrate material having an antenna on one side, signal and power busses on the other side. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Joseph Chang whose telephone number is (571)272-1759. The examiner can normally be reached M-F 7:00- 17:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah M Youssef can be reached at 571-270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOSEPH CHANG/Primary Examiner, Art Unit 2849
Read full office action

Prosecution Timeline

Oct 07, 2024
Application Filed
Apr 29, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
94%
With Interview (+4.0%)
1y 11m (~3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1168 resolved cases by this examiner. Grant probability derived from career allowance rate.

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