DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 and 6 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Khlat (US2020/0259456)
Consider claim 1, where Khlat discloses a transceiver circuit (See Khlat ¶46) comprising: a signal processing circuit configured to generate a radio frequency (RF) signal having a time-variant input power; (See Khlat Fig. 3 and ¶35 where the signal processing circuit 32 is configured to convert the digital signal 38 into an RF signal 44 having a time-variant signal envelope 46 formed based on the time-variant digital signal envelope 42. In this regard, the time-variant digital signal envelope 42, which is defined by the time-variant digital signal amplitudes 40, can be seen as a digital representation of the time-variant signal envelope 46. Therefore, the time-variant signal envelope 46 represents a time-variant input power P.sub.IN of the RF signal 44, which is related to the time-variant digital signal amplitudes 40. ) and a target voltage circuit configured to: determine a power range of the RF signal based on the time-variant input power; (See Khlat Fig. 2, 3 and ¶36-37 where each of the time-variant digital signal amplitudes 40 of the digital signal 38 can be expressed as √{square root over (I.sup.2+Q.sup.2)}. The existing ET amplifier apparatus 30 includes a mixer 50 that combines the time-variant digital signal amplitudes 40 with a digital voltage reference signal 52 to generate a digital target voltage reference signal 54. In this regard, the digital target voltage reference signal 54 is associated with the time-variant digital signal envelope 42 and, therefore, the time-variant digital signal amplitudes 40.) and generate a target voltage having a time-variant change across the determined power range. (See Khlat Fig. 3 and ¶40 where the ETIC 34 receives the target voltage signal 64 having the time-variant target voltage envelope 66. The time-variant target voltage envelope 66 may represent an ET target voltage V.sub.TARGET for the ETIC 34. Given that the ET target voltage V.sub.TARGET is generated based on the digital target voltage signal 60, which is further related to the time-variant digital signal amplitudes 40, the ET target voltage V.sub.TARGET may also be related to the time-variant digital signal amplitudes 40)
Consider claim 6, where a power management circuit comprising: a power amplifier circuit configured to amplify a radio frequency (RF) signal from a time-variant input power to a time-variant output power based on a modulated voltage; (See Khlat Fig. 3 and ¶41 where the power amplifier circuit 36 is coupled to the signal processing circuit 32 to receive the RF signal 44 having the time-variant signal envelope 46. The power amplifier circuit 36 is also coupled to the ETIC 34 to receive the ET voltage V.sub.CC corresponding to the time-variant ET voltage envelope 68. The power amplifier circuit 36 is configured to amplify the RF signal 44 based on the ET voltage V.sub.CC.) a power management integrated circuit (PMIC) configured to generate the modulated voltage based on a target voltage; (See Khlat Fig. 3 and ¶45, 50 where The dual-input ETIC 76 can include an ET voltage circuit 78, a target voltage processing circuit 80, and a control circuit 82. The ET voltage circuit 78 is configured to generate an ET voltage V.sub.CC based on an ET target voltage V.sub.TARGET and a first set of parameters 84. The first set of parameters 84 and the second set of parameters 86 can be predetermined based on predefined granularities of the modulation bandwidth and the ET power range) and a transceiver circuit comprising: a signal processing circuit configured to generate the RF signal having the time-variant input power; (See Khlat Fig. 3 and ¶35 where the signal processing circuit 32 is configured to convert the digital signal 38 into an RF signal 44 having a time-variant signal envelope 46 formed based on the time-variant digital signal envelope 42. In this regard, the time-variant digital signal envelope 42, which is defined by the time-variant digital signal amplitudes 40, can be seen as a digital representation of the time-variant signal envelope 46. Therefore, the time-variant signal envelope 46 represents a time-variant input power P.sub.IN of the RF signal 44, which is related to the time-variant digital signal amplitudes 40. ) and a target voltage circuit configured to: determine a power range of the RF signal based on the time-variant input power; (See Khlat Fig. 2, 3 and ¶36-37 where each of the time-variant digital signal amplitudes 40 of the digital signal 38 can be expressed as √{square root over (I.sup.2+Q.sup.2)}. The existing ET amplifier apparatus 30 includes a mixer 50 that combines the time-variant digital signal amplitudes 40 with a digital voltage reference signal 52 to generate a digital target voltage reference signal 54. In this regard, the digital target voltage reference signal 54 is associated with the time-variant digital signal envelope 42 and, therefore, the time-variant digital signal amplitudes 40.) and generate the target voltage having a time-variant change across the determined power range. (See Khlat Fig. 3 and ¶40 where the ETIC 34 receives the target voltage signal 64 having the time-variant target voltage envelope 66. The time-variant target voltage envelope 66 may represent an ET target voltage V.sub.TARGET for the ETIC 34. Given that the ET target voltage V.sub.TARGET is generated based on the digital target voltage signal 60, which is further related to the time-variant digital signal amplitudes 40, the ET target voltage V.sub.TARGET may also be related to the time-variant digital signal amplitudes 40)
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2 and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Khlat as applied to claim 1 above, in further view of Yu et al. (US2012/0106600)
Consider claim 2, where Khalt teaches the transceiver circuit of claim 1, further comprising receiving a digital signal having a time-variant amplitude wherein the signal processing circuit is further configured to convert the digital signal into the RF signal having the time-variant input power tracking the time-variant amplitude of the digital signal. (See Khlat ¶35 where the signal processing circuit 32 is configured to convert the digital signal 38 into an RF signal 44 having a time-variant signal envelope 46 formed based on the time-variant digital signal envelope 42)
Khlat teaches a digital signal 38, however Khlat does not explicitly teach a digital baseband circuit configured to generate an input vector having a time-variant amplitude. However, in an analogous field of endeavor Yu teaches a digital baseband circuit configured to generate an input vector having a time-variant amplitude. (See Yu ¶6, 41-42 where Various pre-distortion techniques have been described in the prior art. A predistortion technique is known as "polynomial-based" digital predistortion (DPD), which entails digitally predistorting a signal at baseband using polynomial basis functions. With the appropriate feedback, time-varying PA characteristics can be optimally adjusted using DPD. In the general case, the time-varying signal, V(t), can be expressed and implemented according to the following equation:
V
t
=
a
1
r
t
+
∑
j
=
1
N
a
2
r
2
j
t
where r(t) is the envelop signal, N is a predetermined integer greater than or equal to 2, r.sup.2j(t) are exponentials of the envelop signal, and a.sub.2j are weights from the coefficient vector input signal.) Therefore, it would have been obvious to one of ordinary skill in the art that the digital signal 38 of Khlat would originate from baseband as taught by Yu. One of ordinary skill in the art would have been motivated to perform the modification for the advantage of/ benefit of using known digital representations of time varying input signals to yield the intended results.
Consider claim 11, where Khlat discloses the power management circuit of claim 6, further comprising further comprising receiving a digital signal having a time-variant amplitude wherein the signal processing circuit is further configured to convert the digital signal into the RF signal having the time-variant input power tracking the time-variant amplitude of the digital signal. (See Khlat ¶35 where the signal processing circuit 32 is configured to convert the digital signal 38 into an RF signal 44 having a time-variant signal envelope 46 formed based on the time-variant digital signal envelope 42)
Khlat teaches a digital signal 38, however Khlat does not explicitly teach a digital baseband circuit configured to generate an input vector having a time-variant amplitude. However, in an analogous field of endeavor Yu teaches a digital baseband circuit configured to generate an input vector having a time-variant amplitude. (See Yu ¶6, 41-42 where Various pre-distortion techniques have been described in the prior art. A predistortion technique is known as "polynomial-based" digital predistortion (DPD), which entails digitally predistorting a signal at baseband using polynomial basis functions. With the appropriate feedback, time-varying PA characteristics can be optimally adjusted using DPD. In the general case, the time-varying signal, V(t), can be expressed and implemented according to the following equation:
V
t
=
a
1
r
t
+
∑
j
=
1
N
a
2
r
2
j
t
where r(t) is the envelop signal, N is a predetermined integer greater than or equal to 2, r.sup.2j(t) are exponentials of the envelop signal, and a.sub.2j are weights from the coefficient vector input signal.) Therefore, it would have been obvious to one of ordinary skill in the art that the digital signal 38 of Khlat would originate from baseband as taught by Yu. One of ordinary skill in the art would have been motivated to perform the modification for the advantage of/ benefit of using known digital representations of time varying input signals to yield the intended results.
Claim(s) 7-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Khlat as applied to claim 1 above, in further view of Hawley (US2017/0019017)
Consider claim 7, where Khlat discloses the power management circuit of claim 6, however, Khlat does not explicitly teach wherein: the power amplifier circuit causes a modulated current that interacts with the modulated voltage to create a ripple voltage in the modulated voltage across the power range of the RF signal; and the target voltage circuit is further configured to generate the target voltage to thereby cause the ripple voltage to be cancelled across the power range of the RF signal. However, in an analogous field of endeavor Hawley teaches wherein: the power amplifier circuit causes a modulated current that interacts with the modulated voltage to create a ripple voltage in the modulated voltage across the power range of the RF signal; and the target voltage circuit is further configured to generate the target voltage to thereby cause the ripple voltage to be cancelled across the power range of the RF signal. (See Hawley Figs. 4, 9 and ¶57, 64 where In step 904 the converter adjusts the first input voltage to provide a desired voltage output. This first output voltage also contains a first output ripple voltage. Concurrently, in step 906 a second adjustment is used to produce a second desired output voltage having a second ripple voltage. The first and second desired voltage outputs are then filtered in step 908. The second output ripple voltage is then filtered in step 910. This filtering may be performed by a DC blocking filter. In step 912 the first and second desired output voltages are then summed, Because the second output ripple voltage is equal and opposite to the first output ripple voltage the summing performed in step 910 cancels the ripple from the desired output voltage that will be used by the components of the wireless device.) Therefore, it would have been obvious for one of ordinary skill in the art to modify power amplifier of Khlat with the noise cancelling circuit for power converters taught by Hawley. One of ordinary skill in the art would have been motivated to perform the modification for the advantage of/ benefit of using a known method to deliver a cleaner voltage. (See Hawley’s abstract)
Consider claim 8, where Khlat in view of Hawley teaches the power management circuit of claim 7, wherein the PMIC comprises: an equalizer circuit configured to apply an equalization filter to the target voltage to thereby create an equalized target voltage; (See Hawley Figs. 4, 9 and ¶64 where In step 904 the converter adjusts the first input voltage to provide a desired voltage output. This first output voltage also contains a first output ripple voltage) and a voltage modulation circuit configured to generate the modulated voltage based on the equalized target voltage. (See Hawley Figs. 6, 9 and ¶61-64 where the ripple current is cancelled by the operation of the cancellation circuit. The second graph shows the ripple and cancellation current for a buck mode converter operated in pulse frequency modulation mode, producing a discontinuous signal.) Therefore, it would have been obvious for one of ordinary skill in the art to modify power amplifier of Khlat with the noise cancelling circuit for power converters taught by Hawley. One of ordinary skill in the art would have been motivated to perform the modification for the advantage of/ benefit of using a known method to deliver a cleaner voltage. (See Hawley’s abstract)
Consider claim 9, where Khlat in view of Hawley teaches the power management circuit of claim 8, wherein: the equalizer circuit is further configured to apply the equalization filter to the target voltage to thereby add an opposite ripple voltage in the equalized target voltage; (See Hawley Figs. 4, 9 and ¶64 In step 912 the first and second desired output voltages are then summed, Because the second output ripple voltage is equal and opposite to the first output ripple voltage the summing performed in step 910 cancels the ripple from the desired output voltage that will be used by the components of the wireless device.) and the voltage modulation circuit is configured to generate the modulated voltage comprising the opposite ripple voltage to thereby cancel the ripple voltage in the modulated voltage. (See Hawley Figs. 6, 9 and ¶61-64 where the ripple current is cancelled by the operation of the cancellation circuit. The second graph shows the ripple and cancellation current for a buck mode converter operated in pulse frequency modulation mode, producing a discontinuous signal.) Therefore, it would have been obvious for one of ordinary skill in the art to modify power amplifier of Khlat with the noise cancelling circuit for power converters taught by Hawley. One of ordinary skill in the art would have been motivated to perform the modification for the advantage of/ benefit of using a known method to deliver a cleaner voltage. (See Hawley’s abstract)
Consider claim 10, where Khlat in view of Hawley teaches the power management circuit of claim 9, wherein: the equalization filter is configured to add the opposite ripple voltage in the equalized target voltage in response to the time-variant change of the target voltage; (See Hawley Figs. 4, 9 and ¶64 In step 912 the first and second desired output voltages are then summed, Because the second output ripple voltage is equal and opposite to the first output ripple voltage the summing performed in step 910 cancels the ripple from the desired output voltage that will be used by the components of the wireless device.) and the target voltage circuit is further configured to generate the target voltage having the time-variant change across the power range of the RF signal. (See Khlat Fig. 3 and ¶40 where the ETIC 34 receives the target voltage signal 64 having the time-variant target voltage envelope 66. The time-variant target voltage envelope 66 may represent an ET target voltage V.sub.TARGET for the ETIC 34. Given that the ET target voltage V.sub.TARGET is generated based on the digital target voltage signal 60, which is further related to the time-variant digital signal amplitudes 40, the ET target voltage V.sub.TARGET may also be related to the time-variant digital signal amplitudes 40) Therefore, it would have been obvious for one of ordinary skill in the art to modify power amplifier of Khlat with the noise cancelling circuit for power converters taught by Hawley. One of ordinary skill in the art would have been motivated to perform the modification for the advantage of/ benefit of using a known method to deliver a cleaner voltage. (See Hawley’s abstract)
Allowable Subject Matter
Claim 3-5 and 12-15 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 3 recites: “The transceiver circuit of claim 1, wherein the target voltage circuit comprises: a high power-range (HPR) lookup table (LUT) configured to correlate the time-variant input power with the time-variant change in the target voltage when the determined power range is higher than a defined clipping threshold; and a low power-range (LPR) LUT configured to correlate the time-variant input power with the time-variant change in the target voltage when the determined power range is lower than or equal to the defined clipping threshold.” While Khlat provides suggestion for different parameter LUTs for bandwidth threshold (See Khlat ¶50), there is insufficient suggestion for a clipping threshold. The prior art Matsubara et al. US2011/0221524 teaches providing correction for different power ranges. However, this separation is directed towards a linear and non-linear area. (See Matsubara Fig. 9 and ¶5).
It may be possible to combine the teachings to arrive at the claimed limitation, however, such an undertaking would require some trial and error without guarantee that the combination would yield the intended result. Thus, claim 3 is objected to as allowable. Claims 4-5 are objected to based upon their dependence from claim 3. Claim 12 recites a similar limitation to claim 3 and is objected to for similar reasons. Claims 13-15 are objected to based upon their dependence from claim 12.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM LU whose telephone number is (571)270-1809. The examiner can normally be reached 10am-6:30pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Eason can be reached at 571-270-7230. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
WILLIAM LU
Primary Examiner
Art Unit 2624
/WILLIAM LU/Primary Examiner, Art Unit 2624
Prosecution Insights