DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
The claims make a lot of use of the “configured to” language when attempting to broadly define a function that a broadly recited structural element is capable of doing. These types of recitation are going to be given the broadest most reasonable interpretation and absent any particular structure which specifically allows for the functions claimed, as long as the prior art has some structure that meets the plain meaning of the structural element it will be deemed as reading on the claim language. If Applicants intend a more narrow scope then it is recommended to accurately and precisely claim the particular structural details of the structural element that allow for said functionality being claimed.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-4, 7-9, 17, 18 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Mori et al. (WO 2019188518 A1).
Regarding claim 1, Mori et al. discloses a wafer processing apparatus comprising:
a wafer storage (35) configured to store a wafer structure including a wafer (10) on which a plurality of semiconductor chips have been formed and a sheet member (14) to which the wafer has been attached;
a dicer (100) configured to perform dicing to divide the wafer of the wafer structure supplied from the wafer storage into individual semiconductor chips; and
a wafer transporter (58) configured to transport the wafer structure between the wafer storage and the dicer; wherein
the wafer transporter includes an inversion mechanism (translation discusses a vacuum suction and inversion system included in 58) configured to invert a posture of the wafer structure.
Regarding claim 2, Mori et al. discloses the wafer processing apparatus according to claim 1, wherein the wafer transporter further includes a suction unit (mentioned in translation) configured to suction the wafer structure; and the inversion mechanism is configured to invert the posture of the wafer structure by rotating the suction unit that is suctioning the wafer structure about a rotation axis extending in a horizontal direction (translation says the substrate is flipped upside down which reads on this).
Regarding claim 3, Mori et al. discloses the wafer processing apparatus according to claim 1, wherein the wafer storage (absent any particular structure recited, the wafer storage in the prior art is capable of performing the storing capability) is configured to store the wafer structure that does not include a ring-shaped member surrounding the wafer; and the wafer transporter (absent any particular structure recited, the transporter is capable of the function) is configured to invert the wafer structure using the inversion mechanism and supply the wafer structure to the dicer.
Regarding claim 4, Mori et al. discloses the wafer processing apparatus according to claim 3, further comprising: a temporary placement unit (alignment unit 60 reads on this) provided between the wafer storage and the dicer and configured to allow the wafer structure to be placed thereon (it is capable); wherein the wafer transporter (it is capable of doing this) is configured to invert the wafer structure using the inversion mechanism and place the wafer structure on the temporary placement unit before supplying the wafer structure to the dicer.
Regarding claim 7, Mori et al. discloses the wafer processing apparatus according to claim 1, wherein the wafer storage (absent particular structure, the storage is capable of providing this function) is configured to store the wafer structure including a ring-shaped member surrounding the wafer; and the wafer transporter is configured to invert the wafer structure using the inversion mechanism and supply the wafer structure to the dicer (the transporter is capable as evidenced in the figures).
Regarding claim 8, Mori et al. discloses the wafer processing apparatus according to claim 1, wherein the wafer transporter includes a taking-out unit (58) configured to take out the wafer structure from the wafer storage, and a transport mechanism (51) configured to transport a taken-out wafer structure; and the inversion mechanism is provided in the transport mechanism (since 58 is mounted to 51 it is provided thereto given BRI).
Regarding claim 9, Mori et al. discloses the wafer processing apparatus according to claim 1, wherein the wafer transporter includes a take-out transporter (58; it reads on this functionality) configured to take out the wafer structure from the wafer storage and transport a taken-out wafer structure; and the inversion mechanism is provided in the take-out transporter (evident in figures and disclosure).
Regarding claims 17 and 18, these limitations have already been addressed by the rejection of claim 1 and dependent claims above. Please see those rejections.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 5 and 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mori et al. (WO 2019188518 A1) in view of Matsuda et al. (JP 2018181921 A).
Regarding claims 5 and 6, Mori et al. fails to disclose an expander configured to expand the sheet member to which the wafer diced by the dicer has been attached; wherein the expander includes a cooler configured to cool the sheet member when expanding the sheet member.
Matsuda et al. teaches the concept of providing an expander which includes a cooler (seen in figures 1-2 and described in the translation) so as to obtain an optimum dividing efficiency (see translation).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified the processing apparatus in Mori et al. to include the use of an expander with a cooler, as taught by Matsuda et al., so as to obtain an optimum dividing efficiency (see translation).
It follows that the transporter in Mori et al. is capable of providing all the rest of the functionality claimed by the configured language since there is no further particular structure required.
Allowable Subject Matter
Claims 10-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
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/THOMAS C DIAZ/Primary Examiner, Art Unit 3617
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