Prosecution Insights
Last updated: July 17, 2026
Application No. 18/856,451

IMAGE PROCESSING METHOD AND APPARATUS, SYSTEM, AND STORAGE MEDIUM

Non-Final OA §101§102§103§112
Filed
Oct 11, 2024
Priority
Apr 11, 2022 — CN 202210373968.3 +1 more
Examiner
BEUTEL, WILLIAM A
Art Unit
2616
Tech Center
2600 — Communications
Assignee
Beijing Zitiao Network Technology Co., Ltd.
OA Round
1 (Non-Final)
70%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 70% — above average
70%
Career Allowance Rate
340 granted / 486 resolved
+8.0% vs TC avg
Strong +22% interview lift
Without
With
+21.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
17 currently pending
Career history
501
Total Applications
across all art units

Statute-Specific Performance

§101
1.8%
-38.2% vs TC avg
§103
88.1%
+48.1% vs TC avg
§102
2.4%
-37.6% vs TC avg
§112
4.7%
-35.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 486 resolved cases

Office Action

§101 §102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-8, 10-20 and 23 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e. law of nature, natural phenomenon, or abstract idea) without significantly more. Regarding claim 1, the claim is reproduced below with bracketed paragraph designators added for clarity and emphasis added to the claim language that recites an abstract idea: 1. An image processing method, comprising: [(A)] acquiring an image to be processed; [(B)] inputting the image to be processed into an algorithm rendering composite system to obtain a processed image, [(C)] wherein the algorithm rendering composite system is obtained by adding a rendering node to an algorithm system, and [(D)] the rendering node is configured to render an image input to the rendering node; and [(E)] sending the processed image to a rendering system to render the processed image by the rendering system. In determining whether a claim falls within an excluded category, the office is guided by the Court’s two-step framework, described in Mayo Collaborative Services v. Prometheus Laboratories, Inc., 566 U.S. 66 (2012), and Alice, 573 U.S. at 217–18 (citing Mayo, 566 U.S. at 75–77). In accordance with that framework, the Office first determines what concept the claim is “directed to.” See Alice, 573 U.S. at 219 (“On their face, the claims before us are drawn to the concept of intermediated settlement, i.e., the user of a third party to mitigate settlement risk.”); see also Bilski v. Kappos, 561 U.S. 593, 611 (2010) (“Claims 1 and 4 in petitioners’ application explain the basic concept of hedging, or protecting against risk.”) Concepts determined to be abstract ideas, and thus patent ineligible, include certain methods of organizing human activity, such as fundamental economic practices (Alice, 573 U.S. at 219–20; Bilski, 561 U.S. at 611); mathematical formulas (Parker v. Flook, 437 U.S. 584, 594–95 (1978)); and mental processes (Gottschalk v. Benson, 409 U.S. 63, 67 (1972)). Concepts determined to patent eligible include physical and chemical processes, such as “molding rubber products” (Diamond v. Diehr, 450 U.S. 175, 191 (1981)); “tanning, dyeing, making water-proof cloth, vulcanizing India rubber, smelting ores” (id. At 182 n. 7 (quoting Corning v. Burden, 56 U.S. 252, 267–68 (1854))); and manufacturing flour (Benson, 409 U.S. at 69 (citing Cochrane v. Deener, 94 U.S. 780, 785 (1876))). Step 1: The claimed subject matter falls within the four statutory categories of patentable subject matter identified by 35 U.S.C. § 101: process, machine, manufacture, or composition of matter. Accordingly, we turn to step 2A of the 2019 Guidance. STEP 2A, PRONG 1: Under step 2A, prong 1, of the 2019 Guidance, we first look to whether the claim recites any judicial exceptions, including certain groupings of abstract ideas (i.e., mathematical concepts, certain methods of organizing human activity such as a fundamental economic practice, or mental processes). MPEP § 2106.04(a). Limitation (C) recites, “wherein the algorithm rendering composite system is obtained by adding a rendering node to an algorithm system.” In other words, the limitation merely recites adding software instructions to an existing software instruction, or merely rearrangement of instructions. Allowing a claim that functionally describes a mere concept without disclosing how to implement that concept risks defeating the very purpose of the patent system. Recentive Analytics, Inc. v. Fox Corp., Fed. Cir., April 18, 2025, p. 13. Merely collecting information, including when limited to particular content (which does not change its character as information), is within the realm of abstract ideas.” (Id. 14, citing Internet Pats. Corp. v. Active Network, Inc., 790 F.3d 1343, 1349 (Fed. Cir. 2015); Patents may be directed to abstract ideas where they disclose the use of an “already available [technology], with [its] already available basic functions, to use as [a] tool[] in executing the claimed process.” (Id. at 15, citing SAP Am., 898 F.3d at 1169–70). Moreover, the claim merely rearranges data which falls into certain methods of organizing human activity. The claim does not perform any rendering functions or other processes that are directed to an improvement of computer technology itself. Instead, the claim is drafted in such a manner that it at most inserts or adds instructions to a list of existing instructions, like a teacher adding an additional instruction to students in a classroom. Without more, the claim limitation is therefore directed to an abstract concept. STEP 2A, PRONG 2: Under step 2A, prong 2, of the 2019 Guidance, we next analyze whether the claim recites additional elements that individually or in combination integrate the judicial exception into a practical application. 2019 Guidance, 84 Fed. Reg. at 53–55. The 2019 Guidance identifies considerations indicative of whether an additional element or combination of elements integrate the judicial exception into a practical application, such as an additional element reflecting an improvement in the functioning of a computer or an improvement to other technology or technical field. Id. at 55; MPEP § 2106.05(a). Limitations (A), (B), and (D) are directed to merely pre-solution or post-solution activity in the form of conventional data-gathering or data-outputting. Limitation (A) recites “acquiring an image to be processed”, which is merely a step of gathering data. Limitation (B) is further specifying that the image is input for intended processing, or “inputting the image to be processed into an algorithm rendering composite system to obtain a processed image.” This is another pre-solution step of gathering data for a particular purpose, but does not actually recite performing any processing or other technical operations on the data It is instead merely the inputting of data to a system. Limitation (E) recites “sending the processed image to a rendering system to render the processed image by the rendering system” which is merely post-solution activity of outputting data from one element to another. The claim does not require any other processing (rendering or otherwise) on the data, but is merely taking data from somewhere and sending it to another system, which is intended to be rendered, but does not recite rendering anything. Accordingly, the limitation is merely post-solution activity. Merely providing additional pre-solution or post-solution activities to an otherwise abstract concept does not integrate the judicial exception into a practical application. See MPEP 2106.05. For these reasons, claim 1 is not directed to an improvement in the function of a computer or to any other technology or technical field. MPEP § 2106.05(a). Nor is claim 1 directed to a particular machine or transformation. MPEP § § 2106.05(b), (c). Nor does claim 1 add any other meaningful limitations for the purposes of the analysis under Section 101. MPEP §§ 2106.05(e). Accordingly, claim 1 does not integrate the recited abstract ideas into a practical application within the meaning of the 2019 Guidance. See 2019 Guidance, 84 Fed. Reg. at 52-55. STEP 2B: Under step 2B of the 2019 Guidance, we next analyze whether the claim adds any specific limitations beyond the judicial exception that, either alone or as an ordered combination, amount to more than “well-understood, routine, conventional” activity in the field. 2019 Guidance, 84 Fed. Reg. at 56; MPEP § 2106.05(d). Claim 1 at most merely recites automating the otherwise generic steps on a generic computer, without more. Merely implementing the steps on a computer, as recited in the amended claims, does not provide any particular technological advance to the operation of the computer or to a particular field of technology, other than the recited abstract ideas themselves. As such, the claim does not recite additional elements that, either individually or as an ordered combination , amount to significantly more than the judicial exception within the meaning of the 2019 Guidance. 2019 Guidance, 84 Fed. Reg. at 52-55; MPEP § 2106.05(d). Regarding claim 2, the claim merely recites the operations are executed by a GPU, but does not provide any details as to technological improvement or operation. Accordingly, the claim merely tacks on an additional generic computer component to an otherwise abstract concept, which is not significantly more than the abstract idea itself, and is rejected for the same reasons as claim 1 set forth above. Regarding claim 3, the claim recites “wherein the algorithm rendering composite system includes an algorithm node and the rendering node connected according to a set relationship, and the set relationship is a sequential dependency relationship between the algorithm node and the rendering node determined by a graph configuration.” The claim merely states an ordering of parts, or at most an arrangement of instructions. Merely claiming arranging elements in an order is at most directed to an abstract concept of organizing human behavior (e.g. organizing a list of instructions, e.g. Do A, and when that is complete, Do B) or merely ordering elements. Accordingly, the claim is directed to ineligible subject matter for substantially the same reasons as claim 1 set forth above. Regarding claim 4, the claim recites, “wherein the algorithm node is configured to run an algorithm on the image input to the algorithm node, and the operation of the algorithm node running an algorithm on the image input to the algorithm node is executed by a Central Processing Unit (CPU).” The claim merely recites a configuration of a node without performing any operations, and further that it is run on a CPU. At most, this is merely an “apply it” (or an equivalent) type claimed operation with the judicial exception, or mere instructions to implement abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea. See MPEP 2106.05(f). Moreover, use of a generic CPU is at most tacking on an additional generic computer component to an otherwise abstract concept, which is not significantly more than the abstract idea itself. As such the claim is rejected for the same reasons as claim 1 set forth above. Regarding claim 5, the claim recites, “wherein the rendering node is configured to, after rendering the image input to the rendering node, convert a rendered image texture into an algorithm representation, and send the algorithm representation to an algorithm node connected with the rendering node or to a rendering node.” This is merely a conversion of computer data from one format to another, which is merely an abstract mathematical concept of using a mathematical formula to convert data formats. Courts have held that such type of limitation does not make the claim patent eligible. Use of a machine that contributes only nominally or insignificantly to the execution of the claimed method (e.g., in a data gathering step or in a field-of-use limitation) would not integrate a judicial exception or provide significantly more. See Bilski, 561 U.S. at 610, 95 USPQ2d at 1009 (citing Parker v. Flook, 437 U.S. 584, 590, 198 USPQ 193, 197 (1978)). Parker v. Flook further states "if a claim is directed essentially to a method of calculating, using a mathematical formula, even if the solution is for a specific purpose, the claimed method is nonstatutory" citing In re Richman, 563 F.2d 1026, 1030 (1977)). Merely transforming computer data to another type of algorithmic computer data contributes only nominally or insignificantly to the execution of the claimed invention, as the claim does not incorporate the transformation into any meaningful computer technology application or otherwise. Instead, the claim is analogous to Gottschalk v. Benson, 409 U.S. 63, 70, 175 USPQ 673, 676 (1972), where the claim recited a process for converting binary-coded-decimal (BCD) numerals into pure binary numbers. The Court found that the claimed process had no meaningful practical application except in connection with a computer. Benson, 409 U.S. at 71-72, 175 USPQ at 676. The claim simply stated a judicial exception (e.g., law of nature or abstract idea) while effectively adding words that "apply it" in a computer. Id. See MPEP 2106.05(f). Accordingly, the claim is directed to ineligible subject matter for substantially the same reasons as claim 1 set forth above. Regarding claim 6, the claim merely recites configuration of the rendering node as an algorithm (i.e. wherein the rendering node is a node that defines an algorithm type for rendering, and the rendering node is configured for instantiating a plurality of subclasses), but not performing any meaningful steps. At most, this is merely an “apply it” (or an equivalent) type claimed operation with the judicial exception, or mere instructions to implement abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea. See MPEP 2106.05(f). Accordingly, the claim is directed to ineligible subject matter for substantially the same reasons as claim 1 set forth above. Regarding claim 7, the claim merely recites “the rendering node is dynamically registered into the algorithm system as an independent algorithm to form the algorithm rendering composite system.” At most, this is merely an “apply it” (or an equivalent) type claimed operation with the judicial exception, or mere instructions to implement abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea. See MPEP 2106.05(f). Accordingly, the claim is directed to ineligible subject matter for substantially the same reasons as claim 1 set forth above. Regarding claim 8, the claim merely recites “wherein a specific process of rendering processing executed by the GPU is determined by a configured rendering engine.” This is merely tacked on as an additional limitation that otherwise has no connection to the remaining claim limitations. Instead, it merely states that a GPU performs rendering based on a rendering engine as an additional, unconnected limitation. At most, this is merely an “apply it” (or an equivalent) type claimed operation with the judicial exception, or mere instructions to implement abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea. See MPEP 2106.05(f). Moreover, using a configured rendering engine to specify the processing executed by a GPU is at most well-understood, routine, conventional activity, which is insignificant extra-solution activity. (See MPEP 2106.05(d); also see Cooly et al. US 9,786,027 B1, [6:33-37] stating, “Playing system 111 can include a 3D CG rendering engine that can use one or more CPUs and/or GPUs to render the interactive 3D simulation using 3D CG rendering techniques, such as by using conventional 3D CG rendering techniques.”; Toader US 2012/0313954 A1, ¶22: “A video rendering engine module 116 that receives video data supplied by the operating system module, for example, and provides the data to a hardware scaler module 118 and/or a general purpose graphical processing unit 120 […] An important aspect of the methods and systems described herein is to dynamically process the video data for a video session on a surface-by-surface basis, using the hardware scaler module for those surfaces that it can render and using the GPU only for those surfaces for which it is required. It will also be appreciated that the video rendering engine 116 and the GPU 120 are of conventional construction and configuration, and that no further description thereof will be necessary for one skilled in the art to implement them in accordance with the description herein.”) Accordingly, the claim is directed to ineligible subject matter for substantially the same reasons as claim 1 set forth above. Regarding claim 10, the claim is directed to generic computer components that otherwise perform the same method operations of claim 1 discussed above. As such, the claimed method operations are merely directed to ineligible subject matter under 35 U.S.C. 101 as set forth above for claim 1. The only remaining question is whether the addition of generic computer components (i.e. a memory, and at least one processor coupled to the memory, the processor configured to, based on instructions stored in the memory, perform the image processing method) is significantly more than the abstract idea itself. The courts have held it is not. A broad recitation of "computing" only entails a description of a generic computer component that amounts to mere instructions to implement the abstract idea on a computer, and therefore is not sufficient to make the claim patent eligible. See Alice, 573 U.S. at 226 (determining that the claim limitations "data processing system," "communications controller," and "data storage unit" were generic computer components that amounted to mere instructions to implement the abstract idea on a computer); October 2019 Guidance Update at 11-12 (recitation of generic computer limitations for implementing the abstract idea "would not be sufficient to demonstrate integration of a judicial exception into a practical application"). Moreover, merely implementing the steps on a computer, as recited in the claim, does not provide any particular technological advance to the operation of the computer or to a particular field of technology, other than the recited abstract ideas themselves. As such, the claim does not recite additional elements that, either individually or as an ordered combination, amount to significantly more than the judicial exception within the meaning of the 2019 Guidance. 2019 Guidance, 84 Fed. Reg. at 52-55; MPEP § 2106.05(d). Regarding claim 11, the claim is directed to an image processing system comprising the image processing apparatus of claim 10. As such, the rationale for why claim 10 is directed to ineligible subject matter applies to claim 11. The only remaining question is whether tacking on “an algorithm rendering composite system including an algorithm node and a rendering node” is enough to make the claim significantly more than the abstract idea itself. The claimed additional components, however, do not perform any functions and are recited at such a high level of generality that they amount to nothing more than additional generic components tacked onto an existing system, without providing any additional functionality to the remaining claim. A broad recitation of "computing" only entails a description of a generic computer component that amounts to mere instructions to implement the abstract idea on a computer, and therefore is not sufficient to make the claim patent eligible. See Alice, 573 U.S. at 226 (determining that the claim limitations "data processing system," "communications controller," and "data storage unit" were generic computer components that amounted to mere instructions to implement the abstract idea on a computer); October 2019 Guidance Update at 11-12 (recitation of generic computer limitations for implementing the abstract idea "would not be sufficient to demonstrate integration of a judicial exception into a practical application"). Moreover, merely implementing the steps on a computer, as recited in the claim, does not provide any particular technological advance to the operation of the computer or to a particular field of technology, other than the recited abstract ideas themselves. As such, the claim does not recite additional elements that, either individually or as an ordered combination, amount to significantly more than the judicial exception within the meaning of the 2019 Guidance. 2019 Guidance, 84 Fed. Reg. at 52-55; MPEP § 2106.05(d). Regarding claim 12, the claim merely recites the operations are executed by a GPU, but does not provide any details as to technological improvement or operation. Accordingly, the claim merely tacks on an additional generic computer component to an otherwise abstract concept, which is not significantly more than the abstract idea itself, and is rejected for the same reasons as claim 11 set forth above. Regarding claim 13, the claim recites “wherein the algorithm rendering composite system includes an algorithm node and the rendering node connected according to a set relationship, and the set relationship is a sequential dependency relationship between the algorithm node and the rendering node determined by a graph configuration.” The claim merely states an ordering of parts, or at most an arrangement of instructions. Merely claiming arranging elements in an order is at most directed to an abstract concept of organizing human behavior (e.g. organizing a list of instructions, e.g. Do A, and when that is complete, Do B) or merely ordering elements. Accordingly, the claim is directed to ineligible subject matter for substantially the same reasons as claim 11 set forth above. Regarding claim 14, the claim recites, “wherein the algorithm node is configured to run an algorithm on the image input to the algorithm node, and the operation of the algorithm node running an algorithm on the image input to the algorithm node is executed by a Central Processing Unit (CPU).” The claim merely recites a configuration of a node without performing any operations, and further that it is run on a CPU. At most, this is merely an “apply it” (or an equivalent) type claimed operation with the judicial exception, or mere instructions to implement abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea. See MPEP 2106.05(f). Moreover, use of a generic CPU is at most tacking on an additional generic computer component to an otherwise abstract concept, which is not significantly more than the abstract idea itself. As such the claim is rejected for the same reasons as claim 11 set forth above. Regarding claim 15, the claim recites, “wherein the rendering node is configured to, after rendering the image input to the rendering node, convert a rendered image texture into an algorithm representation, and send the algorithm representation to an algorithm node connected with the rendering node or to a rendering node.” This is merely a conversion of computer data from one format to another, which is merely an abstract mathematical concept of using a mathematical formula to convert data formats. Courts have held that such type of limitation does not make the claim patent eligible. Use of a machine that contributes only nominally or insignificantly to the execution of the claimed method (e.g., in a data gathering step or in a field-of-use limitation) would not integrate a judicial exception or provide significantly more. See Bilski, 561 U.S. at 610, 95 USPQ2d at 1009 (citing Parker v. Flook, 437 U.S. 584, 590, 198 USPQ 193, 197 (1978)). Parker v. Flook further states "if a claim is directed essentially to a method of calculating, using a mathematical formula, even if the solution is for a specific purpose, the claimed method is nonstatutory" citing In re Richman, 563 F.2d 1026, 1030 (1977)). Merely transforming computer data to another type of algorithmic computer data contributes only nominally or insignificantly to the execution of the claimed invention, as the claim does not incorporate the transformation into any meaningful computer technology application or otherwise. Instead, the claim is analogous to Gottschalk v. Benson, 409 U.S. 63, 70, 175 USPQ 673, 676 (1972), where the claim recited a process for converting binary-coded-decimal (BCD) numerals into pure binary numbers. The Court found that the claimed process had no meaningful practical application except in connection with a computer. Benson, 409 U.S. at 71-72, 175 USPQ at 676. The claim simply stated a judicial exception (e.g., law of nature or abstract idea) while effectively adding words that "apply it" in a computer. Id. See MPEP 2106.05(f). Accordingly, the claim is directed to ineligible subject matter for substantially the same reasons as claim 11 set forth above. Regarding claim 16, the claim merely recites configuration of the rendering node as an algorithm (i.e. wherein the rendering node is a node that defines an algorithm type for rendering, and the rendering node is configured for instantiating a plurality of subclasses), but not performing any meaningful steps. At most, this is merely an “apply it” (or an equivalent) type claimed operation with the judicial exception, or mere instructions to implement abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea. See MPEP 2106.05(f). Accordingly, the claim is directed to ineligible subject matter for substantially the same reasons as claim 11 set forth above. Regarding claim 17, the claim merely recites “the rendering node is dynamically registered into the algorithm system as an independent algorithm to form the algorithm rendering composite system.” At most, this is merely an “apply it” (or an equivalent) type claimed operation with the judicial exception, or mere instructions to implement abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea. See MPEP 2106.05(f). Accordingly, the claim is directed to ineligible subject matter for substantially the same reasons as claim 11 set forth above. Regarding claim 18, the claim merely recites “wherein a specific process of rendering processing executed by the GPU is determined by a configured rendering engine.” This is merely tacked on as an additional limitation that otherwise has no connection to the remaining claim limitations. Instead, it merely states that a GPU performs rendering based on a rendering engine as an additional, unconnected limitation. At most, this is merely an “apply it” (or an equivalent) type claimed operation with the judicial exception, or mere instructions to implement abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea. See MPEP 2106.05(f). Moreover, using a configured rendering engine to specify the processing executed by a GPU is at most well-understood, routine, conventional activity, which is insignificant extra-solution activity. See MPEP 2106.05(d), also see discussion in claim 8 set forth above. Accordingly, the claim is directed to ineligible subject matter for substantially the same reasons as claim 11 set forth above. Regarding claim 19, the claim merely tacks on a “a rendering system” to the image processing system of claim 11 without adding any claimed functionality or improvement to particular technology. Instead, this merely tacks on a generic computer component to an otherwise abstract idea. Merely implementing the steps on a computer, as recited in the claim, does not provide any particular technological advance to the operation of the computer or to a particular field of technology, other than the recited abstract ideas themselves. At most, this is merely an “apply it” (or an equivalent) type claimed operation with the judicial exception, or mere instructions to implement abstract idea on a computer, or merely using a computer as a tool to perform an abstract idea. See MPEP 2106.05(f). Accordingly, the claim is directed to ineligible subject matter for substantially the same reasons as claim 11 set forth above. Regarding claim 20, the claim is directed to generic computer components that otherwise perform the same method operations of claim 1 discussed above. As such, the claimed method operations are merely directed to ineligible subject matter under 35 U.S.C. 101 as set forth above for claim 1. The only remaining question is whether the addition of generic computer components (i.e. a non-transitory computer readable storage medium having a computer program stored thereon, wherein the program, when executed by at least one processor, implements an image processing method) is significantly more than the abstract idea itself. The courts have held it is not. A broad recitation of "computing" only entails a description of a generic computer component that amounts to mere instructions to implement the abstract idea on a computer, and therefore is not sufficient to make the claim patent eligible. See Alice, 573 U.S. at 226 (determining that the claim limitations "data processing system," "communications controller," and "data storage unit" were generic computer components that amounted to mere instructions to implement the abstract idea on a computer); October 2019 Guidance Update at 11-12 (recitation of generic computer limitations for implementing the abstract idea "would not be sufficient to demonstrate integration of a judicial exception into a practical application"). Moreover, merely implementing the steps on a computer, as recited in the claim, does not provide any particular technological advance to the operation of the computer or to a particular field of technology, other than the recited abstract ideas themselves. As such, the claim does not recite additional elements that, either individually or as an ordered combination, amount to significantly more than the judicial exception within the meaning of the 2019 Guidance. 2019 Guidance, 84 Fed. Reg. at 52-55; MPEP § 2106.05(d). Regarding claim 23, the claim merely recites the operations are executed by a GPU, but does not provide any details as to technological improvement or operation. Accordingly, the claim merely tacks on an additional generic computer component to an otherwise abstract concept, which is not significantly more than the abstract idea itself, and is rejected for the same reasons as claim 23 set forth above. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 5 and 15 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 5 recites “wherein the rendering node is configured to, after rendering the image input to the rendering node, convert a rendered image texture into an algorithm representation, and send the algorithm representation to an algorithm node connected with the rendering node or to a rendering node.” There is nothing in the claim that specifies what conversion is being performed, but instead the claim merely recites the “convert a rendered image texture into an algorithm representation” as functional language that specifies a desired result, namely the conversion of rendered image texture to an algorithm representation, but fails to sufficiently identify how the conversion function is performed or the result is achieved. In other words, the claim merely states that the system has a result of a specific conversion of data representations, but does not include any details of what or how the conversion is performed. Applicant’s specification discloses the following related sections (reference made to US PG-Pub 2025/0200694 A1): [0056] Further, the rendering node is used to render the image input to the rendering node, and then convert a rendered image texture into an algorithm representation, and send the algorithm representation to an algorithm node connected with the rendering node or to a rendering node. [0057] Specifically, the output content of the rendering node is usually an image texture. In some embodiments, the image texture is encapsulated in the form of an algorithm result and sent to a subsequent algorithm node or a rendering node, so as to perform the corresponding operation, realize the conversion of GPU images to CPU data, and improve the adaptability of the device. The Specification, however, does not disclose what a conversion of a texture to an algorithm representation means, or the manner in which it is performed. Instead, the reader is left to fill in the missing elements on their own. Original claims may lack written description when the claims define the invention in functional language specifying a desired result but the specification does not sufficiently describe how the function is performed or the result is achieved. For software, this can occur when the algorithm or steps/procedure for performing the computer function are not explained at all or are not explained in sufficient detail (simply restating the function recited in the claim is not necessarily sufficient). In other words, the algorithm or steps/procedure taken to perform the function must be described with sufficient detail so that one of ordinary skill in the art would understand how the inventor intended the function to be performed. See MPEP 2161.01(I). Under the requirements of 35 U.S.C. 112, the applicant must tell us how their invention achieves the claimed convert function, either in the specification or in the claims themselves. In this case, applicant fails to do either. Accordingly, claim 5 recites limitations which fail to satisfy the written description requirements of 35 U.S.C. 112(a). Regarding claim 15, the claim contains substantially the same language as claim 5, and is therefore rejected under 35 U.S.C. 112(a) for the same reasons as set forth above for claim 5. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 5 and 11-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 11, the claim recites “an algorithm rendering composite system including an algorithm node and a rendering node” (emphasis added) in lines 3-4. First, the claim incorporates the limitations of claim 10, which already introduces “an algorithm rendering composite system” in line 10, and as such the claim is unclear whether the additional instance of “an algorithm rendering composite system” is intended to be the same system as previously introduced, or merely stating an additional system is included in the image processing system. Second, claim incorporates the processing apparatus of claim 10, which already recites “adding a rendering node to an algorithm system” in line 9. Accordingly, by reciting an additional “rendering node”, the use of the same term is unclear whether the same rendering node is added to the algorithm system that is already in the algorithm rendering composite system, or is intended to introduce a different type and/or instance of a rendering node. As such, the claim is indefinite. Claims 12-19 depend from claim 11 and therefore incorporate the same indefinite language. Regarding claim 13, the claim depends from claim 11, which already states that the algorithm rendering composite system includes “an algorithm node”, and as such it is unclear as to the meaning of line 2 of claim 13 which states “the algorithm rendering composite system includes an algorithm node.” In other words, the meaning is unclear as to what “an algorithm node” is introduced a second time. As such, the claim is indefinite. Furthermore, claim 13 recites “the rendering node” in lines 2 and 4, which is unclear whether the referenced node is the one introduced in claim 11 or incorporated from claim 10. As such, the claim is indefinite. Furthermore, the claim recites “the algorithm node” in line 4 which is unclear whether the referenced node is referencing the algorithm node from line 2 of claim 13, or line 3 of claim 11. As such, the claim is indefinite. Regarding claim 14, the claim depends from claim 13 and is therefore indefinite for the same reasons as claim 13. Furthermore, claim 14 refers to “the algorithm node” multiple times, but as the claim depends from claim 13, the claim is indefinite as it is unclear which algorithm node is referenced (i.e. the node from line 2 of claim 13, or line 3 of claim 11). As such, the claim is indefinite. Regarding claim 15, the claim recites “the rendering node” in line 2, which is unclear whether the referenced node is the one introduced in claim 11 or incorporated from claim 10. Furthermore, claim 15 recites “an algorithm node” in line 4 which is the second instance of “an algorithm node”, as the claim depends from claim 11 which already introduces a first instance of “an algorithm node.” As such it is unclear whether the same or a new node is intended., and the claim is indefinite. Further regarding claim 15, the claim recites “wherein the rendering node is configured to […] send the algorithm representation to an algorithm node connected with the rendering node or to the rendering node”, which is unclear as to the meaning of “to the rendering node.” The claim can be read in two different ways, namely that the rendering node is configured to send the algorithm representation to the rendering node or that the rendering node is configured to send the algorithm representation to an algorithm node connected to the rendering node. As such the claim is indefinite as to which is intended. Furthermore, if the rendering node sends the algorithm to the rendering node, the claim is indefinite as to how something is sent to itself when it already originates at itself. Alternatively, it is unclear as to what is intended by connected with vs. connected to. As the applicant uses different terms, under claim construction, the presumption is that there is some difference. As such, “connected with” seems to imply that the two nodes are connected together to something else, but there is no indication of what is connected to both of them. As such, the claim is indefinite. Claim 5 recites substantially the same language as claim 15, “wherein the rendering node is configured to […] send the algorithm representation to an algorithm node connected with the rendering node or to the rendering node”, which is unclear as to the meaning of “to the rendering node.” Accordingly, claim 5 is indefinite for the same reasons as claim 15 set forth above. Regarding claim 16, the claim recites “the rendering node” in lines 2 and 3, which is unclear whether the referenced nodes are the one introduced in claim 11 or incorporated from claim 10. As such, the claim is indefinite. Regarding claim 17, the claim recites “the rendering node” in line 2, which is unclear whether the referenced node is the one introduced in claim 11 or incorporated from claim 10. As such, the claim is indefinite. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4, 7-8, 10-14, 17-20, and 23 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Virolainen et al. (US 2019/0139180 A1). Regarding claim 10, Virolainen discloses: An image processing apparatus, comprising: a memory; and at least one processor coupled to the memory, the processor configured to, based on instructions stored in memory, perform an image processing method (Virolainen, ¶20: system resources including GPU/CPU memory and processing capacity; ¶55: there can be an electronic device including a graphics processing unit (GPU), an electronic display associated with the GPU, an embedded graphics engine having a set of rendering algorithms for being carried out on the GPU to produce an image on the electronic display, and a non-transitory computer readable medium having stored thereon a set of predefined system resource barriers capable of being assigned to the GPU and a predefined scheduled order of the rendering algorithms for processing; Also see ¶56) comprising: Acquiring an image to be processed (Virolainen, ¶17: “Resources can be the required inputs and outputs of a render node or rendering algorithm. These can include data, data sets, scenes, parameters etc. that go into a rendering process of a render node.”); Inputting the image to be processed into an algorithm rendering composite system to obtain a processed image, wherein the algorithm rendering composite system is obtained by adding a rendering node to an algorithm system (Virolainen, ¶15: A high level rendering pipeline can define a chain of rendering algorithms and/or render nodes which produces a final image; ¶54: render node added to an existing render pipeline, or set of render nodes), and the rendering node is configured to render an image input to the rendering node (Note this limitation does not perform rendering, but is merely stating that a rendering node is configured to render; Virolainen, ¶16: the linked chain can have a combination of parallel and series links so that certain render nodes and/or rendering algorithms can be carried out at the same time; ¶19: rendering node is a rendering pass); and Sending the processed image to a rendering system to render the processed image by the rendering system (Examiner notes that this is not claiming any rendering, but merely sending the processed image to a rendering system, which is further not claimed in any specificity and therefore reads on anything that is a “rendering system”, such as merely code or an algorithm or programmed circuitry, etc.; Virolainen, ¶24: acyclic graph created of nodes, where edges/links between the nodes of the can be respective inputs and outputs of the rendering nodes – see Fig. 1; ¶35 discloses “A render node can be one pass of a rendering algorithm [… or] several linked passes of one or more rendering algorithms”, ¶¶40-41 further discloses that a rendering node can be executed to generate render data, such as an opaque pass render node, after which a transparent objects rendering algorithm that depends on the output of the opaque pass render node as input is executed, after the required opaque pas render node is finished and using its output as input – the CPU/GPU performing the algorithm can be considered the “rendering system” as the claim does not include any further details as to the meaning of the terms and what is being performed, etc.) Regarding claim 1, the apparatus of claim 10 performs the method of claim 1 and as such claim 1 is rejected based on the same rationale as claim 10 set forth above. Regarding claim 20, Virolainen discloses: A non-transitory computer-readable storage medium having a computer program stored thereon, wherein the program, when executed by at least one processor, implements an image processing method. (Virolainen, ¶55: there can be an electronic device including a graphics processing unit (GPU), an electronic display associated with the GPU, an embedded graphics engine having a set of rendering algorithms for being carried out on the GPU to produce an image on the electronic display, and a non-transitory computer readable medium having stored thereon a set of predefined system resource barriers capable of being assigned to the GPU and a predefined scheduled order of the rendering algorithms for processing; Also see ¶56) Further regarding claim 20, the implemented method is the same method as claim 1, and as such claim 20 is further rejected based on the same rationale as claim 1 set forth above. Regarding claim 11, Virolainen discloses: An image processing system comprising: (Virolainen, ¶20: system resources including GPU/CPU memory and processing capacity; ¶55: there can be an electronic device including a graphics processing unit (GPU), an electronic display associated with the GPU, an embedded graphics engine having a set of rendering algorithms for being carried out on the GPU to produce an image on the electronic display, and a non-transitory computer readable medium having stored thereon a set of predefined system resource barriers capable of being assigned to the GPU and a predefined scheduled order of the rendering algorithms for processing; Also see ¶56 The image processing apparatus of claim 10 (The apparatus incorporates by reference the apparatus of claim 10, which is rejected based on the same rationale as claim 10 set froth above); and An algorithm rendering composite system including an algorithm node and a rendering node (Note this can be the same algorithm rendering composite system of claim 10, but merely specifies that the system includes multiple nodes, including an algorithm node and a rendering node, where under broadest reasonable interpretation, an algorithm node is merely a node having an algorithm of some sorts, and rendering node can be an algorithm node, but merely a sub-type; Virolainen, ¶15: A high level rendering pipeline can define a chain of rendering algorithms and/or render nodes which produces a final image; ¶54: render node added to an existing render pipeline, or set of render nodes) Regarding claim 12, Virolainen further discloses: Wherein the operations of the rendering node rendering the image input to the rendering node is executed by a Graphics Processing Unit (GPU) (Virolainen, ¶40 discusses running render nodes in parallel, and render nodes having associated CPU/GPU requirements for each) Regarding claim 2, Virolainen further discloses: wherein the operation of the rendering node rendering the image input to the rendering node is executed by a Graphics Processing Unit (GPU) (Virolainen, ¶40 discusses running render nodes in parallel, and render nodes having associated CPU/GPU requirements for each) Regarding claim 23, the limitations included from claim 20 are rejected based on the same rationale as claim 20 set forth above and incorporated herein. Further regarding claim 23, the implemented method is the same method as claim 2, and as such claim 23 is further rejected based on the same rationale as claim 2 set forth above. Regarding claim 13, Virolainen further discloses: Wherein the algorithm rendering composite system includes an algorithm node and the rendering node connected according to a set relationship, and the set relationship is a sequential dependency relationship between the algorithm node and the rendering node determined by a graph configuration (Virolainen, Fig. 1 and ¶25: acyclic graph 10, including plurality of nodes and sub-nodes – note that the claim does not clarify any difference between algorithm nodes and render nodes other than the labels, where a render node can be considered to have an algorithm as it performs processing) Regarding claim 3, Virolainen further discloses: Wherein the algorithm rendering composite system includes an algorithm node and the rendering node connected according to a set relationship, and the set relationship is a sequential dependency relationship between the algorithm node and the rendering node determined by a graph configuration (Virolainen, Fig. 1 and ¶25: acyclic graph 10, including plurality of nodes and sub-nodes – note that the claim does not clarify any difference between algorithm nodes and render nodes other than the labels, where a render node can be considered to have an algorithm as it performs processing) Regarding claim 14, Virolainen further discloses: Wherein the algorithm node is configured to run an algorithm on the image input to the algorithm node, and the operation of the algorithm node running an algorithm on the image input to the algorithm node is executed by a Central Processing Unit (CPU) (Virolainen, ¶40 discusses running render nodes in parallel, and render nodes having associated CPU/GPU requirements for each) Regarding claim 4, Virolainen further discloses: Wherein the algorithm node is configured to run an algorithm on the image input to the algorithm node, and the operation of the algorithm node running an algorithm on the image input to the algorithm node is executed by a Central Processing Unit (CPU) (Virolainen, ¶40 discusses running render nodes in parallel, and render nodes having associated CPU/GPU requirements for each) Regarding claim 17, Virolainen further discloses: Wherein the rendering node is dynamically registered into the algorithm system as an independent algorithm to form the algorithm rendering composite system (Note ¶59 of applicant’s specification filed 10/11/2025 states “Specifically, the algorithm rendering composite system and the rendering system are independent of each other, and the business can use only the algorithm rendering composite system or mix it with other rendering systems. The algorithm rendering composite system and the rendering system can be executed in series in order or in parallel by multiple threads. Inside the algorithm rendering composite system is an independent scheduling sequence.” In other words, the independence is directed to the ability for parallel processing of threads; Virolainen: Virolainen, ¶16: the linked chain can have a combination of parallel and series links so that certain render nodes and/or rendering algorithms can be carried out at the same time; ¶40: since light data and shadow map generation do not depend on each other, the two render nodes can be scheduled to run in parallel, e.g. at the same time; ¶54: render node added to an existing render pipeline, or set of render nodes) Regarding claim 7, Virolainen further discloses: Wherein the rendering node is dynamically registered into the algorithm system as an independent algorithm to form the algorithm rendering composite system (Note ¶59 of applicant’s specification filed 10/11/2025 states “Specifically, the algorithm rendering composite system and the rendering system are independent of each other, and the business can use only the algorithm rendering composite system or mix it with other rendering systems. The algorithm rendering composite system and the rendering system can be executed in series in order or in parallel by multiple threads. Inside the algorithm rendering composite system is an independent scheduling sequence.” In other words, the independence is directed to the ability for parallel processing of threads; Virolainen: Virolainen, ¶16: the linked chain can have a combination of parallel and series links so that certain render nodes and/or rendering algorithms can be carried out at the same time; ¶40: since light data and shadow map generation do not depend on each other, the two render nodes can be scheduled to run in parallel, e.g. at the same time; ¶54: render node added to an existing render pipeline, or set of render nodes) Regarding claim 18, Virolainen further discloses: Wherein a specific process of rendering processing executed by the GPU is determined by a configured rendering engine (Virolainen, ¶6 discloses invention directed to managing a graphics engine for rendering; ¶40: graphics engine schedules work to make sure render nodes are completed before other ndoes are scheduled, executed by their associated CPU/GPU requirements; also ¶55: embedded graphics engine having a set of rendering algorithms for being carried out on the GPU to produce an image on the electronic display) Regarding claim 8, Virolainen further discloses: Wherein a specific process of rendering processing executed by the GPU is determined by a configured rendering engine (Virolainen, ¶6 discloses invention directed to managing a graphics engine for rendering; ¶40: graphics engine schedules work to make sure render nodes are completed before other ndoes are scheduled, executed by their associated CPU/GPU requirements; also ¶55: embedded graphics engine having a set of rendering algorithms for being carried out on the GPU to produce an image on the electronic display) Regarding claim 19, Virolainen further discloses: Further comprising a rendering system (Virolainen, ¶24: acyclic graph created of nodes, where edges/links between the nodes of the can be respective inputs and outputs of the rendering nodes – see Fig. 1; ¶35 discloses “A render node can be one pass of a rendering algorithm [… or] several linked passes of one or more rendering algorithms”, ¶¶40-41 further discloses that a rendering node can be executed to generate render data, such as an opaque pass render node, after which a transparent objects rendering algorithm that depends on the output of the opaque pass render node as input is executed, after the required opaque pas render node is finished and using its output as input – the CPU/GPU performing the algorithm can be considered the “rendering system” as the claim does not include any further details as to the meaning of the terms and what is being performed, etc.) Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 5 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over: Virolainen et al. (US 2019/0139180 A1) in view of Marison et al. (US 2013/0063472 A1). Regarding claim 15, the limitations included from claim 11 are rejected based on the same rationale as claim 11 set forth above. Further regarding claim 15, Virolainen further discloses: Wherein the rendering node is configured to, after rendering the image input to the render node,(Virolainen, ¶16: the linked chain can have a combination of parallel and series links so that certain render nodes and/or rendering algorithms can be carried out at the same time; ¶19: rendering node is a rendering pass; Fig. 1 and ¶24: Within an acyclic graph, the edges/links between the nodes of the acyclic graph can be the respective inputs and outputs of the rendering algorithms and/or render nodes; ¶33: render nodes can ) The only limitation not explicitly taught by Virolainen is that a texture is converted into an algorithm representation as a stage of rendering and sending for further processing. Marison discloses: Wherein the rendering node is configured to, convert a rendered image texture into an algorithm representation, and send the algorithm representation to an algorithm node connected with the rendering node or to the rendering node (Marison, ¶28-29 discloses technology directed to rendering capability as a result of node operation in a directed acyclic graph; Fig. 8 and ¶87: Node 720E is a multiply node, that computes a product, x*y, of its two inputs, 724E-1, 724E-2, which will convert the texture coordinate into an angular value, in radians, that is then used as an input to the sine node, 720G; ¶96: node 720G takes converted texture coordinate specified in radians for processing) In other words, Marison teaches that it was known before the effective filing date of the claimed invention that texture data by one node in a nodal rendering system can convert data to a different representation, i.e. “algorithm representation”, and send the converted data to a connected rendering node for further processing. Both Virolainen and Marison are directed to nodal rendering systems for generating an image. It would have been obvious to one of ordinary skill in the art before the effective filing date for the claimed invention and with a reasonable expectation of success, to modify the rendering system and technique implementing software algorithms for performing different rendering tasks using rendering nodes as provided by Virolainen, by converting texture data for use by another node in the system as provided by Marison, using known electronic interfacing and programming techniques. The modification results in an improved node rendering system by ensuring texture is prepared for another node in a manner that is accessible for that particular node processing, and also improving the system by allowing more encapsulation of data processing and splitting up processing for faster processing. Regarding claim 5, the limitations included from claim 1 are rejected based on the same rationale as claim 1 set forth above. Further regarding claim 5, Virolainen further discloses: Wherein the rendering node is configured to, after rendering the image input to the render node,(Virolainen, ¶16: the linked chain can have a combination of parallel and series links so that certain render nodes and/or rendering algorithms can be carried out at the same time; ¶19: rendering node is a rendering pass; Fig. 1 and ¶24: Within an acyclic graph, the edges/links between the nodes of the acyclic graph can be the respective inputs and outputs of the rendering algorithms and/or render nodes; ¶33: render nodes can ) The only limitation not explicitly taught by Virolainen is that a texture is converted into an algorithm representation as a stage of rendering and sending for further processing. Marison discloses: Wherein the rendering node is configured to, convert a rendered image texture into an algorithm representation, and send the algorithm representation to an algorithm node connected with the rendering node or to the rendering node (Marison, ¶28-29 discloses technology directed to rendering capability as a result of node operation in a directed acyclic graph; Fig. 8 and ¶87: Node 720E is a multiply node, that computes a product, x*y, of its two inputs, 724E-1, 724E-2, which will convert the texture coordinate into an angular value, in radians, that is then used as an input to the sine node, 720G; ¶96: node 720G takes converted texture coordinate specified in radians for processing) In other words, Marison teaches that it was known before the effective filing date of the claimed invention that texture data by one node in a nodal rendering system can convert data to a different representation, i.e. “algorithm representation”, and send the converted data to a connected rendering node for further processing. Both Virolainen and Marison are directed to nodal rendering systems for generating an image. It would have been obvious to one of ordinary skill in the art before the effective filing date for the claimed invention and with a reasonable expectation of success, to modify the rendering system and technique implementing software algorithms for performing different rendering tasks using rendering nodes as provided by Virolainen, by converting texture data for use by another node in the system as provided by Marison, using known electronic interfacing and programming techniques. The modification results in an improved node rendering system by ensuring texture is prepared for another node in a manner that is accessible for that particular node processing, and also improving the system by allowing more encapsulation of data processing and splitting up processing for faster processing. Claim(s) 6 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over: Virolainen et al. (US 2019/0139180 A1) in view of CMU (“15-462 Project 4: Raytracing”, CMU School of Computer Science, published at https://www.cs.cmu.edu/afs/cs/academic/class/15462-s13/www/project/p4.pdf, March 21, 2013, pp. 1-13, archived at archive.org as of October 24, 2015) Regarding claim 16, the limitations included from claim 11 are rejected based on the same rationale as claim 11 set forth above. Virolainen further discloses: Wherein the rendering node is a node that defines an algorithm type for rendering, and the rendering node is configured for instantiating a plurality of subclasses (Virolainen, ¶19: A rendering node as described herein can be a process, routine, rendering pass or work unit which has dependencies. e.g. one pass of a shadow rendering algorithm or an orb glow rendering node for an object type. A sub-unit, e.g. a single work unit, of a larger rendering algorithm (e.g. a circle of confusion work unit within a depth of field rendering algorithm); ¶35: “A render node can also be or include a rendering routine. For example, the sub-work unit takes a set of inputs, runs it through a routine, and produces an output. The routine can be simple or complex and can be predetermined or dynamic.”) Virolainen does not clearly specify an “initiation for a plurality of subclasses”, but this is a well-known, conventional and routine core concept of computer software programming an implementation, i.e. object orientated programming. It is also noted that the claim does not actually require the instantiating of subclasses, but merely requires a node configured as such. Furthermore, CMU discloses: rendering node is configured for instantiating a plurality of subclasses (CMU, p. 1, Overview discloses implementation of a basic ray tracer to handle shadows, reflections and refractions; p. 5, Section 7.3 Geometries discloses ray tracing using base geometry class that contains multiple kinds of geometry, wherein “Each specific kind of geometry is represented as a subclass”; p. 6 discloses section 9.3 Instancing, which discloses “handling intersection of simple spheres, triangles, and models” for a plurality of geometries.) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention and with a reasonable expectation of success to modify the rendering system and technique implementing software algorithms for performing different rendering tasks as provided by Virolainen, by utilizing object oriented programming languages that use subclasses as taught by CMU, using known electronic interfacing and programming techniques. The modification would have been obvious to try as it merely utilizes one known software implementation technique from a finite number of identified, predictable solutions for software implementation with a reasonable expectation of success. Furthermore, use of object oriented programming classes results in improved software implementation by better organizing code for implementation and updates, easier understanding, and allowing for encapsulation, inheritance, polymorphism, and abstraction, offering several advantages for software development including eliminating redundant code and improving the maintainability and scalability of the software implementations. Regarding claim 6, the limitations included from claim 1 are rejected based on the same rationale as claim 1 set forth above. Virolainen further discloses: Wherein the rendering node is a node that defines an algorithm type for rendering, and the rendering node is configured for instantiating a plurality of subclasses (Virolainen, ¶19: A rendering node as described herein can be a process, routine, rendering pass or work unit which has dependencies. e.g. one pass of a shadow rendering algorithm or an orb glow rendering node for an object type. A sub-unit, e.g. a single work unit, of a larger rendering algorithm (e.g. a circle of confusion work unit within a depth of field rendering algorithm); ¶35: “A render node can also be or include a rendering routine. For example, the sub-work unit takes a set of inputs, runs it through a routine, and produces an output. The routine can be simple or complex and can be predetermined or dynamic.”) Virolainen does not clearly specify an “initiation for a plurality of subclasses”, but this is a well-known, conventional and routine core concept of computer software programming an implementation, i.e. object orientated programming. It is also noted that the claim does not actually require the instantiating of subclasses, but merely requires a node configured as such. Furthermore, CMU discloses: rendering node is configured for instantiating a plurality of subclasses (CMU, p. 1, Overview discloses implementation of a basic ray tracer to handle shadows, reflections and refractions; p. 5, Section 7.3 Geometries discloses ray tracing using base geometry class that contains multiple kinds of geometry, wherein “Each specific kind of geometry is represented as a subclass”; p. 6 discloses section 9.3 Instancing, which discloses “handling intersection of simple spheres, triangles, and models” for a plurality of geometries.) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention and with a reasonable expectation of success to modify the rendering system and technique implementing software algorithms for performing different rendering tasks as provided by Virolainen, by utilizing object oriented programming languages that use subclasses as taught by CMU, using known electronic interfacing and programming techniques. The modification would have been obvious to try as it merely utilizes one known software implementation technique from a finite number of identified, predictable solutions for software implementation with a reasonable expectation of success. Furthermore, use of object oriented programming classes results in improved software implementation by better organizing code for implementation and updates, easier understanding, and allowing for encapsulation, inheritance, polymorphism, and abstraction, offering several advantages for software development including eliminating redundant code and improving the maintainability and scalability of the software implementations. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM A BEUTEL whose telephone number is (571)272-3132. The examiner can normally be reached Monday-Friday 9:00 AM - 5:00 PM (EST). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, DANIEL HAJNIK can be reached at 571-272-7642. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WILLIAM A BEUTEL/Primary Examiner, Art Unit 2616
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Prosecution Timeline

Oct 11, 2024
Application Filed
Jun 08, 2026
Non-Final Rejection mailed — §101, §102, §103 (current)

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