DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 1 and 22 are objected to because of the following informalities: The claims recite the abbreviation “SSB” in lines 3 of claim 1 and line 7 of claim 22 without providing the definition of the abbreviation. Appropriate correction is required.
Claims 8, 13, and 17 recite the terms “S-Primary Synchronization Signal”, “S-Secondary Synchronization Signal” and “S-Physical Broadcast Channel” without providing the definition of the “S”. Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4, 6-9, 13-20, 22, 24-26 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Talarico et al (US PGPUB US2025/0227737).
(Claim 1 discloses) one or more processors configured to perform operations comprising: identifying, based on information associated with a number of additional candidate SSB transmission opportunities, a plurality of sidelink synchronization signal block (S-SSB) transmission opportunities comprising an initial S-SSB transmission opportunity and one or more additional S-SSB transmission opportunities (Talarico et al shows multiple S-SSB occasions or opportunities in a window, (figure 11 and paragraph 114).); and causing a plurality of S-SSBs to be transmitted on a sidelink channel during the plurality of S-SSB transmission opportunities, the plurality of S-SSBs comprising an initial S-SSB and one or more additional S-SSBs (Talarico et al shows the ability to transmit multiple SSBs in a single window until success (paragraph 114)).
(Claim 2 discloses) the one or more processors of claim 1, wherein identifying the plurality of S-SSB transmission opportunities comprises: determining a number of the plurality of S-S SB transmission opportunities based on a subcarrier spacing of the sidelink channel (Talarico et al shows determining based on SCS (paragraph 120).
(Claim 3 discloses) the one or more processors of claim 1, wherein the information associated with a number of the additional candidate SSB transmission opportunities is a number of the plurality of S-SSB transmission opportunities based on a predetermined number of candidate transmission opportunities (Talarico et al shows the window can be preconfigured (paragraph 114)).
(Claim 4 discloses) the one or more processors of claim 1, wherein causing the plurality of S-SSBs to be transmitted on the sidelink channel during the plurality of S-SSB transmission opportunities comprises: multiplexing, using frequency division multiplexing, the plurality of S-SSBs with one or more Physical Sidelink Shared Channel (PSSCH) transmissions to generate one or more multiplexed transmissions (Talarico et al shows FDM with PSSCH, paragraphs 85-86).); and causing the one or more multiplexed transmissions to be transmitted during the plurality of S-SSB transmission opportunities (Talarico et al shows data is transmitted in the S-SSB windows (paragraph 114)).
(Claim 6 discloses) the one or more processors of claim 1, wherein the one or more additional S-SSBs are frequency division multiplexed with one or more other S-SSBs from one or more other UEs (Talarico et al shows multiple UEs are connected to the same sidelink and the data transmitted is known to be multiplexed (paragraph 129)).
(Claim 7 discloses) the one or more processors of claim 6, wherein causing the plurality of S-SSBs to be transmitted on the sidelink channel during the plurality of S-SSB transmission opportunities comprises: aligning a transmission boundary of the plurality of S-SSBs with a transmission boundary of the one or more other S-SSBs (Talarico et al shows the S-SSB is aligned with the start of the window (paragraph 16)).
(Claim 8 discloses) the one or more processors of claim 1, wherein the plurality of S- SSBs comprise one or more S-Primary Synchronization Signal/S-Secondary Synchronization Signal (S-PSS/S-SSS) blocks and one or more S-Physical Broadcast Channel (S-PBCH) transmissions, and wherein causing the plurality of S-SSBs to be transmitted on the sidelink channel during the plurality of S-SSB transmission opportunities comprises: frequency domain multiplexing the one or more S-PSS/S-SSS blocks with the one or more S-PBCH transmissions to generate one or more multiplexed transmissions; and causing the one or more multiplexed transmissions to be transmitted during the plurality of S-SSB transmission opportunities (Talarico et al shows FDM of S-SSS, S-PSS, and PSBCH and transmitting (paragraph 95).)
(Claim 9 discloses) the one or more processors of claim 1, wherein a sensing gap separates the plurality of S-SSB transmission opportunities (Talarico et al shows the S-SSB has a gap between transmissions (paragraph 193)).
(Claim 13 discloses) the one or more processors of claim 1, wherein a first S-SSB of the plurality of comprises a S-Primary Synchronization Signal/S-Secondary Synchronization Signal (S-PSS/S-SSS) block and a S-Physical Broadcast Channel (S-PBCH) transmission, and wherein causing the plurality of S-SSBs to be transmitted on the sidelink channel during the plurality of S-SSB transmission opportunities comprises: causing: (i) the S-PBCH transmission to be transmitted as an interlaced waveform over a first plurality of physical resource blocks in a first S-SSB transmission opportunity, and (ii) the S-PSS/S-SSS block to be transmitted over a second plurality of physical resource blocks in the first S-SSB transmission opportunity (Talarico et al shows interlacing over the channel bandwidth (paragraph 192)).
(Claim 14 discloses) the one or more processors claim 1, wherein causing the plurality of S-SSBs to be transmitted on the sidelink channel during the plurality of S-SSB transmission opportunities comprises: performing a channel access procedure to access the sidelink channel to perform the transmission (Talarico et al shows LBT is done before transmission (paragraphs 104-107).
(Claim 15 discloses) the one or more processors of claim 14, wherein the channel access procedure is one of a Type 2A channel access procedure and a time duration of the plurality of transmission opportunities is at most 1 millisecond (1ms) (Talarico et al shows the use of Type2A and variable time duration (paragraphs 107 and 120-121)).
(Claim 16 discloses) one or more processors configured to perform operations comprising: generating a transmission comprising a plurality of sidelink synchronization signal block (S-SSB) repetitions multiplexed in frequency (Talarico et al shows multiple S-SSB occasions or opportunities in a window, (figure 11 and paragraph 114).); and causing the transmission on a sidelink channel during an S-SSB transmission opportunity (Talarico et al shows the ability to transmit multiple SSBs in a single window until success (paragraph 114)).
(Claim 17 discloses) the one or more processors of claim 16, wherein each S-SSB repetition comprises a S-Primary Synchronization Signal/S-Secondary Synchronization Signal (S-PSS/S- SSS) block and one or more S-Physical Broadcast Channel (S-PBCH) transmissions (Talarico et al shows FDM of S-SSS, S-PSS, and PSBCH and transmitting (paragraph 95)).
(Claim 18 discloses) the one or more processors of claim 16, wherein the transmission comprises respective gaps between the plurality of S-SSB repetitions (Talarico et al shows the S-SSB has a gap between transmissions (paragraph 193)).
Claim 19 discloses (the one or more processors of claim 18, wherein the respective gaps satisfy a regulatory Occupied Channel Bandwidth (OCB) requirement (Talarico et al shows meeting the OCB requirements (paragraph 85)).
(Claim 20 discloses) the one or more processors of claim 16, wherein a number of the plurality of S-SSB repetitions is preconfigured (Talarico et al shows the S-SSB is preconfigured (paragraph 104)).
(Claim 22 discloses) a user equipment (UE) comprising::a radio frequency transceiver; one or more processers; and memory storing instructions that, when executed by the one or more processers, cause the UE to perform operations comprising: identifying, based on information associated with a number of additional candidate SSB transmission opportunities, a plurality of sidelink synchronization signal block (S-SSB) transmission opportunities comprising an initial S-SSB transmission opportunity and one or more additional S-SSB transmission opportunities (Talarico et al shows multiple S-SSB occasions or opportunities in a window, (figure 11 and paragraph 114).); and transmitting a plurality of S-SSBs on a sidelink channel during the plurality of S- SSB transmission opportunities, the plurality of S-SSBs comprising an initial S-SSB and one or more additional S-SSBs (Talarico et al shows the ability to transmit multiple SSBs in a single window until success (paragraph 114)).
(Claim 24 discloses) the UE of claim 22, wherein identifying the plurality of S-SSB transmission opportunities comprises: determining a number of the plurality of S-SSB transmission opportunities based on a subcarrier spacing of the sidelink channel, wherein the information associated with a number of the additional candidate SSB transmission opportunities is a number of the plurality of S-SSB transmission opportunities based on a predetermined number of candidate transmission opportunities (Talarico et al shows the window can be preconfigured (paragraph 114)).
(Claim 25 discloses) the UE of claim 22, wherein causing the plurality of S-SSBs to be transmitted on the sidelink channel during the plurality of S-SSB transmission opportunities comprises: performing a channel access procedure to access the sidelink channel to perform the transmission (Talarico et al shows LBT is done before transmission (paragraphs 104-107)).
(Claim 26 discloses) the UE of claim 25, wherein the channel access procedure is one of a Type 2A channel access procedure and a time duration of the plurality of transmission opportunities is at most 1 millisecond (1ms) (Talarico et al shows the use of Type2A and variable time duration (paragraphs 107 and 120-121)).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Chen et al (US PGPUB US20250193904 teaches floating sidelink synchronization signal block for time domain repetition. Yoshioka et al (US PGPUB US20250176044) teaches establishing a connection in device to device direct communication.
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/BRIAN J. GILLIS/Primary Examiner, Art Unit 2472
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