CTFR 18/861,399 CTFR 84542 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Response to Amendment The amendment filed on March 23, 2026 in response to the previous Office Action (01/14/2026) is acknowledged and has been entered. Claims 1, 4 – 20 are currently pending. Claims 2 – 3 are cancelled. Applicant’s amendment overcomes the following objections/rejections in the last Office Action: Objection to Specification Response to Arguments 07-37 AIA Applicant's arguments filed March 23, 2026 have been fully considered but they are not persuasive. Applicant submits that the references fail to disclose the added limitations of “disclose an event detection circuit that includes a first circuit portion disposed on the first substrate and configured to process a signal derived from the luminance change detected by the corresponding second pixel, and a second circuit portion disposed on the second substrate and configured to determine occurrence of the event based on an output of the first circuit portion”. Examiner respectfully disagrees. Kondo teaches an event detecting pixel system where an amplifier 521, that amplifies an electric charge signal that is generated and output by the PD 12, is located on the first chip 11; and the AER circuit 526 is located on the second chip 12 (fig. 14; ¶182-189). Kondo also teaches plurality of event detection circuits 526 adjacent to each other (fig. 15) . Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15-03-aia AIA Claim (s) 1, 10 and 20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kondo (US 2018/0152644) . Regarding claim 1, Kondo discloses a photodetection device (fig. 1-2) comprising: a first substrate and a second substrate stacked on each other (figs. 1; ¶38: 11, 12 ), wherein the first substrate includes a plurality of pixel groups including first pixels ( 51 ) respectively generate pixel signals according to a light amount of incident light and second pixels ( 52 ) that respectively detects a luminance change of the incident light (figs. 3; ¶51-52), the second substrate includes a plurality of event detection circuits ( 526 ) disposed adjacent to each other, each of the event detection circuits is configured to detect an event based on a luminance change of a corresponding second pixel (figs. 15; ¶101-102), wherein each of the event detection circuits includes: a first circuit portion disposed on the first substrate, the first circuit portion ( 521 ) being configured to process a signal derived from the luminance change detected by the corresponding second pixel (fig. 14); and a second circuit portion ( 526 ) disposed on the second substrate (fig. 14), the second circuit portion being configured to determine occurrence of the event based on an output of the first circuit portion (¶182-185), and wherein at least a part of the plurality of event detection circuits is disposed in a first region of the second substrate outside a second region of the second substrate that faces and corresponds in size to the plurality of pixel groups (figs. 6-7; ¶98-99). Regarding claim 10, Kondo discloses the limitations of claim 1. Kondo also teaches wherein the second pixel has: a photoelectric conversion element; and a charge-voltage conversion unit that converts a charge photoelectrically converted by the second pixel into a voltage signal subjected to logarithmic conversion, and the charge-voltage conversion unit has: an amplifier ( 521 ) connected to a cathode of the photoelectric conversion element; and a bias circuit ( 522 ) that supplies a bias current to the amplifier (fig. 3; ¶32, 61 ) . Claim 20 is rejected for the same reasons as claim 1 . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 4 are rejected under 35 U.S.C. 103 as being unpatentable over Kondo in view of Kodama WO 2022/009664 (US 2023/0276141 used as translation) . Regarding claim 4, Kondo discloses the limitations of claim 4. Kondo fails to explicitly disclose wherein the event detection circuit detect the event in synchronization with a predetermined frame period. In a similar field of endeavor, Kodama teaches an imaging device with stacked substrates and image and event pixels that indicates that a timing control circuit 212d uses a frame synch signal for gradation to generate a frame synch signal for DVS having a cycle of 960fps (¶136-138). In light of the teaching of Kodama, it would have been obvious to one of ordinary skill in the art, before the effective filing date, to use Kodama’s teaching in Kondo’s system because an artisan of ordinarily skill would recognize that this would facilitate generation of the gradation image data and the DVS image data can be made faster . 07-21-aia AIA Claim (s) 5 – 7, 9 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Kondo in view of Gao . Regarding claim 5, Kondo discloses the limitations of claim 4. Kondo fails to explicitly disclose wherein the event detection circuit has a first differentiator and a second differentiator that respectively time-differentiate electric signals photoelectrically converted by two of the second pixels having different directions of the luminance change. In a similar field of endeavor, Gao teaches separate threshold detectors (352, 354) for asynchronously detecting Brightening Events 368 and Darkening Events 370 (fig. 3; ¶35, 37). In light of the teaching of Gao, it would have been obvious to one of ordinary skill in the art before the effective filing date to use teaching in Kondo’s system because an artisan of ordinarily skill would recognize that this would result improved image quality and high definition output. Regarding claim 6, Kondo in view of Gao discloses the limitations of claim 5. Gao also teaches wherein the event detection circuit detects the event, regardless of a frame period (fig. 3; ¶35, 37: separate threshold detectors (352, 354) for asynchronously detecting Brightening Events 368 and Darkening Events 370) . Regarding claim 7, Kondo discloses the limitations of claim 1. Kondo fails to explicitly disclose wherein at least a part of the second pixels are disposed on the second substrate. In a similar field of endeavor, Gao teaches the drain of a reset transistor 224 on the top die 202 is coupled via a hybrid bond 264 to a mode select circuit 230 on the second die 204, thereby splitting the pixels functional components across the substrates (fig. 2; ¶25-26). In light of the teaching of Gao, it would have been obvious to one of ordinary skill in the art before the effective filing date to use teaching in Kondo’s system because an artisan of ordinarily skill would recognize that this would result improved image quality and high definition output. Regarding claim 9, Kondo discloses the limitations of claim 1. Kondo fails to explicitly disclose wherein the second pixel has: a photoelectric conversion element; and a charge-voltage conversion unit that converts a charge photoelectrically converted by the second pixel into a voltage signal subjected to logarithmic conversion, and the charge-voltage conversion unit has a diode connected between a cathode of the photoelectric conversion element and a power supply voltage node. In a similar field of endeavor, Gao teaches photocurrent to voltage converter 340 performs logarithmic conversion, which is implemented with a transistor 346 in a feedback loop with amp 344 functions as a diode (fig. 3; ¶32). In light of the teaching of Gao, it would have been obvious to one of ordinary skill in the art before the effective filing date to use teaching in Kondo’s system because an artisan of ordinarily skill would recognize that this would result improved image quality and high definition output. Regarding claim 19, Kondo discloses the limitations of claim 1. Kondo fails to explicitly disclose wherein the event detection circuit are respectively provided for each of the plurality of second pixels, and the event detection circuits are proximately disposed in a partial region on the second substrate. In a similar field of endeavor, Gao teaches arranging event driven peripheral circuit 114 and logic blocks 124 collectively in a peripheral region PRE, which means they are disposed close to each other in a partial region (fig. 1, 4; ¶54). In light of the teaching of Gao, it would have been obvious to one of ordinary skill in the art before the effective filing date to use teaching in Kondo’s system because an artisan of ordinarily skill would recognize that this would result improved image quality and high definition output . 07-21-aia AIA Claim (s) 8 are rejected under 35 U.S.C. 103 as being unpatentable over Kondo in view of Gao in view of Niwa . Regarding claim 8, Kondo in view of Gao discloses the limitations of claim 7. Gao also teaches wherein the second pixel has: a photoelectric conversion element; a charge-voltage conversion unit that generates a voltage signal obtained by logarithmic conversion of a charge photoelectrically converted by the photoelectric conversion element (fig. 3; ¶32-33). Gao fails to explicitly disclose a buffer circuit that buffers the voltage signal, the photoelectric conversion element, the charge- voltage conversion unit, and a portion of the buffer circuit are disposed on the first substrate, and a portion other than the portion of the buffer circuit is disposed on the second substrate. In a similar field of endeavor, Niwa teaches an imaging device with stacked substrates and image and event pixels that indicates buffers on the detection chip and buffer (SF) on the pixel chip (fig. 6-7; ¶73-80). In light of the teaching of Niwa, it would have been obvious to one of ordinary skill in the art, before the effective filing date, to use Niwa’s teaching in Gao’s system because an artisan of ordinarily skill would recognize that this would facilitate counteracting interference . 07-21-aia AIA Claim (s) 11 – 15 are rejected under 35 U.S.C. 103 as being unpatentable over Kondo in view of Niwa . Regarding claim 11, Kondo discloses the limitations of claim 10. Kondo fails to explicitly disclose wherein the charge-voltage conversion circuit includes a plurality of transistors of a same conductivity type, including the bias circuit. In a similar field of endeavor, Niwa teaches an imaging device with stacked substrates and image and event pixels that indicates PMOS transistors and NMOS transistors in the pixel circuit (fig. 6-7; ¶73-75). In light of the teaching of Niwa, one of ordinary skill in the art would have recognized that applying the known technique of using PMOS and NMOS transistors, as taught by Niwa, with the invention of Kondo. would have yielded predictable results and resulted in an improved system. Regarding claim 12, Kondo discloses the limitations of claim 10. Kondo fails to explicitly disclose wherein a plurality of transistors of a first conductivity type is included other than the bias circuit in the charge-voltage conversion unit, and the bias circuit has a transistor of a second conductivity type. In a similar field of endeavor, Niwa teaches an imaging device with stacked substrates and image and event pixels that indicates PMOS transistors and NMOS transistors in the pixel circuit (fig. 6-7; ¶73-75). In light of the teaching of Niwa, one of ordinary skill in the art would have recognized that applying the known technique of using PMOS and NMOS transistors, as taught by Niwa, with the invention of Kondo. would have yielded predictable results and resulted in an improved system. Regarding claim 13, Kondo discloses the limitations of claim 1. Kondo fails to explicitly disclose wherein the event detection circuit has a first circuit portion disposed on the first substrate and a second circuit portion disposed on the second substrate. In a similar field of endeavor, Niwa teaches an imaging device with stacked substrates and image and event pixels that indicates buffers on the detection chip and buffer (SF) on the pixel chip (fig. 6-7; ¶73-80). In light of the teaching of Niwa, it would have been obvious to one of ordinary skill in the art, before the effective filing date, to use Niwa’s teaching in Kondo’s system because an artisan of ordinarily skill would recognize that this would facilitate counteracting interference. Regarding claim 14, Kondo discloses the limitations of claim 13. Kondo fails to explicitly disclose wherein the event detection circuit has: a differentiator that time-differentiates a voltage signal output from the second pixel; a source follower circuit that is connected to an output node of the differentiator; and a comparator that is connected to an output node of the source follower circuit and detects the event on a basis of a result of comparing an output signal of the source follower circuit with a predetermined reference signal, the first circuit portion has the differentiator and the source follower circuit, and the second circuit portion has the comparator. In a similar field of endeavor, Niwa teaches an wherein the event detection circuit has: a differentiator 340 that time-differentiates a voltage signal output from the second pixel; a source follower circuit 400 that is connected to an output node of the differentiator; and a comparator 500 that is connected to an output node of the source follower circuit and detects the event on a basis of a result of comparing an output signal of the source follower circuit with a predetermined reference signal, the first circuit portion has the differentiator and the source follower circuit, and the second circuit portion has the comparator…. elements up to the selection unit 400 may be disposed on the light receiving chip 201, and the comparison unit 500 and subsequent elements may be disposed on the detection chip 202 (fig. 6-7; ¶73-84, 120). In light of the teaching of Niwa, it would have been obvious to one of ordinary skill in the art, before the effective filing date, to use Niwa’s teaching in Kondo’s system because an artisan of ordinarily skill would recognize that this would facilitate counteracting interference. Regarding claim 15, Kondo discloses the limitations of claim 13. Kondo fails to explicitly disclose wherein the event detection circuit has: a differentiator that time-differentiates a voltage signal output from the second pixel; a source follower circuit that is connected to an output node of the differentiator; and a comparator that is connected to an output node of the source follower circuit and detects the event on a basis of a result of comparing an output signal of the source follower circuit with a predetermined reference signal, the first circuit portion has the differentiator ,the source follower circuit, and a portion of the comparator, and the second circuit portion has a portion other than the portion of the comparator. In a similar field of endeavor, Niwa teaches an wherein the event detection circuit has: a differentiator 340 that time-differentiates a voltage signal output from the second pixel; a source follower circuit 400 that is connected to an output node of the differentiator; and a comparator 500 that is connected to an output node of the source follower circuit and detects the event on a basis of a result of comparing an output signal of the source follower circuit with a predetermined reference signal, the first circuit portion has the differentiator and the source follower circuit, and the second circuit portion has the comparator…. elements up to the selection unit 400 may be disposed on the light receiving chip 201, and the comparison unit 500 and subsequent elements may be disposed on the detection chip 202 (fig. 6-7; ¶73-84, 120). In light of the teaching of Niwa, it would have been obvious to one of ordinary skill in the art, before the effective filing date, to use Niwa’s teaching in Kondo’s system because an artisan of ordinarily skill would recognize that this would facilitate counteracting interference . 07-21-aia AIA Claim (s) 16 – 18 are rejected under 35 U.S.C. 103 as being unpatentable over Kondo in view of Niwa in view of Gao . Regarding claim 16, Kondo in view of Niwa discloses the limitations of claim 13. The combination fails to explicitly disclose wherein two or more of the first circuit portions connected to two or more of the second pixels share one of the second circuit portions. In a similar field of endeavor, Gao teaches an NxN group of pixels are coupled to a single event driven circuit 366 via a mode select circuit 330 which functions as a switch (fig. 3; ¶39). In light of the teaching of Gao, it would have been obvious to one of ordinary skill in the art before the effective filing date to use teaching in Kondo’s system because an artisan of ordinarily skill would recognize that this would result improved image quality and high definition output. Regarding claim 17, Kondo in view of Niwa in view of Gao discloses the limitations of claim 16. Gao also teaches further comprising: a switch that is connected to output nodes of the two or more first circuit portions, wherein the switch connects any one output node of the two or more first circuit portions to an input node of the second circuit portion (fig. 3; ¶39: an NxN group of pixels are coupled to a single event driven circuit 366 via a mode select circuit 330 which functions as a switch) . Regarding claim 18, Kondo in view of Niwa in view of Gao discloses the limitations of claim 17. Gao also teaches wherein the switch is disposed on the first substrate or the second substrate (fig. 3; ¶39: an NxN group of pixels are coupled to a single event driven circuit 366 via a mode select circuit 330 which functions as a switch) . Conclusion 07-40 AIA Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL . See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Contact Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTOINETTE SPINKS whose telephone number is (571)270-3749. The examiner can normally be reached M-Th 7am - 5pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Twyler Haskins can be reached at 571-272-7406. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANTOINETTE T SPINKS/ Primary Examiner, Art Unit 2639 Application/Control Number: 18/861,399 Page 2 Art Unit: 2639 Application/Control Number: 18/861,399 Page 3 Art Unit: 2639 Application/Control Number: 18/861,399 Page 4 Art Unit: 2639 Application/Control Number: 18/861,399 Page 5 Art Unit: 2639 Application/Control Number: 18/861,399 Page 6 Art Unit: 2639 Application/Control Number: 18/861,399 Page 7 Art Unit: 2639 Application/Control Number: 18/861,399 Page 8 Art Unit: 2639 Application/Control Number: 18/861,399 Page 9 Art Unit: 2639 Application/Control Number: 18/861,399 Page 10 Art Unit: 2639 Application/Control Number: 18/861,399 Page 11 Art Unit: 2639 Application/Control Number: 18/861,399 Page 12 Art Unit: 2639 Application/Control Number: 18/861,399 Page 13 Art Unit: 2639 Application/Control Number: 18/861,399 Page 14 Art Unit: 2639
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