Prosecution Insights
Last updated: August 14, 2026
Application No. 18/861,966

X-RAY DETECTION PANEL, X-RAY DETECTOR COMPRISING THE SAME, AND UNIT PIXEL FOR THE SAME

Non-Final OA §102§103
Filed
Oct 31, 2024
Priority
Sep 13, 2023 — RE 10-2023-0121556 +1 more
Examiner
FAYE, MAMADOU
Art Unit
2884
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Duopix-Ray Inc.
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
85%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
673 granted / 857 resolved
+10.5% vs TC avg
Moderate +7% lift
Without
With
+6.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
42 currently pending
Career history
904
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
66.0%
+26.0% vs TC avg
§102
15.6%
-24.4% vs TC avg
§112
12.2%
-27.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 857 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Claims 1 – 20 are presented for examination. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 15, 17 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Tredwell et al. (US 2009/0194672 A1; pub. Aug. 6, 2009). Regarding claim 1, Tredwell et al. disclose: An X-ray detection panel comprising a plurality of unit pixels, wherein each unit pixel comprises: a photodiode (para. [0058]); a first readout thin-film transistor (para. [0058]); and a second readout thin-film transistor (para. [0058]), the first readout thin-film transistor and the second readout thin-film transistor being electrically connected to the photodiode and connected in series to each other (para. [0058]). Regarding claim 15, Tredwell et al. disclose: An X-ray detector comprising an X-ray detection panel, wherein the X-ray detection panel comprises a plurality of unit pixels each comprising: a photodiode (para. [0058]); a first readout thin-film transistor (para. [0058]); and a second readout thin-film transistor (para. [0058]), the first readout thin-film transistor and the second readout thin-film transistor being electrically connected to the photodiode and connected in series to each other (para. [0058]). Regarding claim 17, Tredwell et al. disclose: A unit pixel for an X-ray detection panel (para. [0058]), comprising: a photodiode (para. [0058]); a first readout thin-film transistor (para. [0058]); and a second readout thin-film transistor (para. [0058]), wherein the first readout thin-film transistor and the second readout thin-film transistor are electrically connected to the photodiode and are connected in series to each other (para. [0058]). Claims 1, 15, 17 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Nascetti et al. (US 2005/0285043 A1; pub. Dec. 29, 2005). Regarding claim 1, Nascetti et al. disclose: An X-ray detection panel comprising a plurality of unit pixels, wherein each unit pixel (para. [0014]-[0015]) comprises: a photodiode (fig.3 item 26); a first readout thin-film transistor (fig.3 item 52); and a second readout thin-film transistor (fig.3 item 54), the first readout thin-film transistor and the second readout thin-film transistor being electrically connected to the photodiode and connected in series to each other (fig.3 items 26, 52, 54). Regarding claim 15, Nascetti et al. disclose: An X-ray detector comprising an X-ray detection panel, wherein the X-ray detection panel comprises a plurality of unit pixels each comprising: a photodiode; a first readout thin-film transistor; and a second readout thin-film transistor, the first readout thin-film transistor and the second readout thin-film transistor being electrically connected to the photodiode and connected in series to each other (the claim contains the same substantive limitations as claim 1, therefore, the claim is rejected on the same basis). Regarding claim 17, Nascetti et al. disclose: A unit pixel for an X-ray detection panel, comprising: a photodiode; a first readout thin-film transistor; and a second readout thin-film transistor, wherein the first readout thin-film transistor and the second readout thin-film transistor are electrically connected to the photodiode and are connected in series to each other (the claim contains the same substantive limitations as claim 1, therefore, the claim is rejected on the same basis). Claims 1, 15, 17 is rejected under 35 U.S.C. 102(a)(2) as being anticipated by Mollov et al. (US 7,688,947 B2; pub. Mar. 30, 2010). Regarding claim 1, Mollov et al. disclose: An X-ray detection panel comprising a plurality of unit pixels (col.5 L2-7), wherein each unit pixel comprises: a photodiode (fig.10 item 1002); a first readout thin-film transistor (fig.10 item 1004); and a second readout thin-film transistor (fig.10 item 1006), the first readout thin-film transistor and the second readout thin-film transistor being electrically connected to the photodiode and connected in series to each other (fig.10 items 1002, 1004, 1006 are connected in series). Regarding claim 15, Mollov et al. disclose: An X-ray detector comprising an X-ray detection panel, wherein the X-ray detection panel comprises a plurality of unit pixels each comprising: a photodiode; a first readout thin-film transistor; and a second readout thin-film transistor, the first readout thin-film transistor and the second readout thin-film transistor being electrically connected to the photodiode and connected in series to each other (the claim contains the same substantive limitations as claim 1, therefore, the claim is rejected on the same basis). Regarding claim 17, Mollov et al. disclose: A unit pixel for an X-ray detection panel, comprising: a photodiode; a first readout thin-film transistor; and a second readout thin-film transistor, wherein the first readout thin-film transistor and the second readout thin-film transistor are electrically connected to the photodiode and are connected in series to each other (the claim contains the same substantive limitations as claim 1, therefore, the claim is rejected on the same basis). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Tredwell et al. (US 2009/0194672 A1; pub. Aug. 6, 2009) in view of Kiyota et al. (US 2011/0234830 A1; pub. Sep. 29, 2011). Regarding claim 2, Tredwell et al. disclose: a source of the first readout thin-film transistor and a source of the second readout thin- film transistor are connected in common to the photodiode (para. [0058]); a gate of the first readout thin-film transistor and a gate of the second readout thin-film transistor are connected to each other (fig.4B the gate of M1 & the gate of M2 are connected to each other). Tredwell et al. are silent about: a drain of the first readout thin-film transistor and a drain of the second readout thin-film transistor are connected to each other. In a similar field of endeavor Kiyota et al. disclose: a drain of the first readout thin-film transistor and a drain of the second readout thin-film transistor are connected to each other (para. [0066], [0077]) motivated by the benefits for improved signal to noise ratio (Kiyota et al. para. [0024]). In light of the benefits for improved signal to noise ratio as taught by Kiyota et al., it would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to use the TFT connection of Kiyota et al. in the detection panel of Tredwell et al. Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Tredwell et al. (US 2009/0194672 A1; pub. Aug. 6, 2009) in view of Kiyota et al. (US 2011/0234830 A1; pub. Sep. 29, 2011) and further in view of Liu et al. (US 6,037,609; pub. Mar. 14, 2000). Regarding claim 3, the combination of Tredwell et al. & Kiyota et al. disclose: the first readout transistor and the second readout transistor have their drain connected together, their source connected together, their gate connected together (see rejection of claim 2). The combination of Tredwell et al. & Kiyota et al. is however silent about: readout pads; readout gate pads; and a bias pad, wherein the readout pads are connected to the drains of the first and second readout thin- film transistors, the readout gate pads are connected to the gates of the first and second readout thin-film transistors the bias pad is connected to the photodiode. In a similar field of endeavor Liu et al. disclose: contact pads used to connect the source & drain, the scan & data lines (col.4 L1-10), the bias line (col.16 L11-39), the photodiode the bias line (col.16 L11-39) motivated by the benefits for an imager that is highly resistant to degradation due to moisture (Liu et al. col.10 L21-22). In light of the benefits for improved signal to noise ratio as taught by Liu et al., it would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to use the contact pads of Liu et al. in the detection panel of Tredwell et al. and Kiyota et al. to have: readout pads; readout gate pads; and a bias pad, wherein the readout pads are connected to the drains of the first and second readout thin- film transistors, the readout gate pads are connected to the gates of the first and second readout thin-film transistors the bias pad is connected to the photodiode. Claims 4 - 6 are rejected under 35 U.S.C. 103 as being unpatentable over Tredwell et al. (US 2009/0194672 A1; pub. Aug. 6, 2009) in view of Kiyota et al. (US 2011/0234830 A1; pub. Sep. 29, 2011) in view of Liu et al. (US 6,037,609; pub. Mar. 14, 2000) and further in view of Arakawa (US 2004/0051047 A1; pub. Mar. 18, 2004). Regarding claim 4, the combination of Tredwell et al., Kiyota et al. & Liu et al. disclose: the gates of the first and second readout thin-film transistors are connected to the readout gate pad through a readout gate line; the drains of the first and second readout thin-film transistors are connected to the readout pad through a readout drain line; the photodiode is connected to the sources of the first and second readout thin-film transistors (see rejection of claim 3). The combination of Tredwell et al., Kiyota et al. & Liu et al. are silent about: each unit pixel further comprises a capacitor disposed between the first readout thin-film transistor and the readout gate line. In a similar field of endeavor Arakawa discloses: each unit pixel (fig.2 item 33) further comprises a capacitor (para. [0030]) disposed between the first readout thin-film transistor (fig.2 item 31) and the readout gate line (fig.2 item 51) motivated by the benefits for a radiation detector layer can be more simply formed at lower cost (Arakawa para. [0017]). In light of the benefits for a radiation detector layer can be more simply formed at lower cost as taught by Arakawa, it would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to use the teachings of Arakawa to modify the detection panel of Tredwell et al., Kiyota et al. and Liu et al. Regarding claim 5, Arakawa discloses: each unit pixel further comprises a capacitor (para. [0030]) disposed between the second readout thin-film transistor (fig.2 item 31) and the readout gate line (fig.2 item 51) motivated by the benefits for a radiation detector layer can be more simply formed at lower cost (Arakawa para. [0017]). Regarding claim 6, the combination of Tredwell et al., Kiyota et al. & Liu et al. disclose: the gates of the first and second readout thin-film transistors are connected to the readout gate pad through a readout gate line; the drains of the first and second readout thin-film transistors are connected to the readout pad through a readout drain line (see rejection of claim 3). The combination of Tredwell et al., Kiyota et al. & Liu et al. are silent about: each unit pixel further comprises a capacitor disposed between the second readout thin-film transistor and the readout gate line. In a similar field of endeavor Arakawa discloses: each unit pixel (fig.2 item 33) further comprises a capacitor (para. [0030]) disposed between the second readout thin-film transistor (fig.2 item 31) and the readout gate line (fig.2 item 51) motivated by the benefits for a radiation detector layer can be more simply formed at lower cost (Arakawa para. [0017]). In light of the benefits for a radiation detector layer can be more simply formed at lower cost as taught by Arakawa, it would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to use the teachings of Arakawa to modify the detection panel of Tredwell et al., Kiyota et al. and Liu et al. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Tredwell et al. (US 2009/0194672 A1; pub. Aug. 6, 2009) in view of Roy (US 2018/0302582 A1; pub. Oct. 18, 2018). Regarding claim 7, Tredwell et al. are silent about: each unit pixel further comprises a reset thin-film transistor, and a source of the reset thin-film transistors is connected to the sources. In a similar field of endeavor Roy discloses: each unit pixel further comprises a reset thin-film transistor, and a source of the reset thin-film transistors is connected to the sources (para. [0034], [0036], fig.2) motivated by the benefits for improved signal to noise ratio. In light of the benefits for improved signal to noise ratio, it would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to modify the apparatus of Tredwell et al. using the circuitry of Roy. Claims 8 - 10 are rejected under 35 U.S.C. 103 as being unpatentable over Tredwell et al. (US 2009/0194672 A1; pub. Aug. 6, 2009) in view of Roy (US 2018/0302582 A1; pub. Oct. 18, 2018) and further in view of Mochizuki et al. (US 2006/0077308 A1; pub. Apr. 13, 2006). Regarding claim 8, the combined references are silent about: reset gate pads; and a reset drain pad, wherein the reset gate pad is connected to a gate of the reset thin-film transistor, and the reset drain pad is connected to a drain of the reset thin-film transistor. In a similar field of endeavor Mochizuki et al. disclose: reset gate pads; and a reset drain pad, wherein the reset gate pad is connected to a gate of the reset thin-film transistor, and the reset drain pad is connected to a drain of the reset thin-film transistor (fig.2, para. [0059]) motivated by the benefits for increased signal to noise ratio (Mochizuki et al. para. [0006]). In light of the benefits for increased signal to noise ratio as taught by Mochizuki et al., it would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to use the teachings of Mochizuki et al. to modify the detection panel of Tredwell et al. and Roy. Regarding claim 9, Tredwell et al. disclose: the sources of the first and second readout thin-film transistors are connected in common to the photodiode; the gates of the first and second readout thin-film transistors are connected to each other; and the drains of the first and second readout thin-film transistors are connected to each other (fig.4B). Regarding claim 10, Tredwell et al. disclose: readout pads; readout gate pads; and a bias pad, wherein the readout pads are connected to the drains of the first and second readout thin- film transistors, the readout gate pads are connected to the gates of the first and second readout thin-film transistors, and the bias pad is connected to the photodiode (para. [0046]-[0047]). Claims 11-13 are rejected under 35 U.S.C. 103 as being unpatentable over Tredwell et al. (US 2009/0194672 A1; pub. Aug. 6, 2009) in view of Roy (US 2018/0302582 A1; pub. Oct. 18, 2018) in view of Mochizuki et al. (US 2006/0077308 A1; pub. Apr. 13, 2006) and further in view of Arakawa (US 2004/0051047 A1; pub. Mar. 18, 2004). Regarding claim 11, the combined references disclose all the limitation of claim 11 (see rejection of claim 10) except for: each unit pixel further comprises a capacitor disposed between the first readout thin-film transistor and the readout gate line. In a similar field of endeavor Arakawa discloses: each unit pixel (fig.2 item 33) further comprises a capacitor (para. [0030]) disposed between the first readout thin-film transistor (fig.2 item 31) and the readout gate line (fig.2 item 51) motivated by the benefits for a radiation detector layer can be more simply formed at lower cost (Arakawa para. [0017]). In light of the benefits for a radiation detector layer can be more simply formed at lower cost as taught by Arakawa, it would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to use the teachings of Arakawa to modify the detection panel of Tredwell et al., Roy and Mochizuki et al. Regarding claim 12, Arakawa discloses: each unit pixel further comprises a capacitor (para. [0030]) disposed between the second readout thin-film transistor (fig.2 item 31) and the readout gate line (fig.2 item 51) motivated by the benefits for a radiation detector layer can be more simply formed at lower cost (Arakawa para. [0017]). Regarding claim 13, the combined references disclose all the limitation of claim 11 (see rejection of claim 10) except for: each unit pixel further comprises a capacitor disposed between the second readout thin-film transistor and the readout gate line. In a similar field of endeavor Arakawa discloses: each unit pixel (fig.2 item 33) further comprises a capacitor (para. [0030]) disposed between the second readout thin-film transistor (fig.2 item 31) and the readout gate line (fig.2 item 51) motivated by the benefits for a radiation detector layer can be more simply formed at lower cost (Arakawa para. [0017]). In light of the benefits for a radiation detector layer can be more simply formed at lower cost as taught by Arakawa, it would have been obvious to one of ordinary skill before the effective filing date of the claimed invention to use the teachings of Arakawa to modify the detection panel of Tredwell et al., Roy and Mochizuki et al. Claims 16, 18 – 20 are rejected under 35 U.S.C. 103 as being unpatentable over Mollov et al. (US 7,688,947 B2; pub. Mar. 30, 2010). Regarding claim 16, in the embodiment of fig.10 Mollov et al. are silent about: each unit pixel further comprises a reset thin-film transistor. In a further embodiment Mollov et al. disclose: each unit pixel further comprises a reset thin-film transistor (claim 1) motivated by the benefits for continuous x-ray exposure (Mollov et al. col.5 L52-55). In light of the benefits for continuous x-ray exposure as taught by Mollov et al., it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the two embodiments of Mollov et al. Regarding claim 18, in the embodiment of fig.10 Mollov et al. are silent about: at least one capacitor connected to the first readout thin-film transistor or the second readout thin-film transistor. In a further embodiment Mollov et al. disclose: at least one capacitor connected to the first readout thin-film transistor or the second readout thin-film transistor (col.3 L52-54) motivated by the benefits for increased signal to noise ratio. In light of the benefits for increased signal to noise ratio, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the two embodiments of Mollov et al. Regarding claim 19, Mollov et al. disclose: a reset thin-film transistor (the claim is rejected on the same basis as claim 16). Regarding claim 20, Mollov et al. disclose: at least one capacitor connected to one of the first readout thin-film transistor, the second readout thin-film transistor, and the reset thin-film transistor (the claim is rejected on the same basis as claim 16). Allowable Subject Matter Claim 14 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 14, the prior arts alone or in combination fail to teach, disclose, suggest or render obvious: the gate of the reset thin-film transistor is connected to the reset gate pad through a reset gate line; the source of the reset thin-film transistor is connected to the sources of the first and second readout thin-film transistors; and each unit pixel further comprises a capacitor disposed between the reset thin-film transistor and the reset gate line. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MAMADOU FAYE whose telephone number is (571)270-0371. The examiner can normally be reached Mon – Fri 9AM-6PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uzma Alam can be reached at 571-272-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MAMADOU FAYE/Examiner, Art Unit 2884 /UZMA ALAM/Supervisory Patent Examiner, Art Unit 2884
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Prosecution Timeline

Oct 31, 2024
Application Filed
Jul 22, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
78%
Grant Probability
85%
With Interview (+6.7%)
2y 4m (~7m remaining)
Median Time to Grant
Low
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