Prosecution Insights
Last updated: July 17, 2026
Application No. 18/862,214

WAFER DETERMINATION METHOD, DETERMINATION PROGRAM, DETERMINATION APPARATUS, WAFER PRODUCTION METHOD, AND WAFER

Non-Final OA §101§102§103
Filed
Nov 01, 2024
Priority
Jun 15, 2022 — JP 2022-096858 +1 more
Examiner
KOETH, MICHELLE M
Art Unit
Tech Center
Assignee
SUMCO Corporation
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
337 granted / 436 resolved
+17.3% vs TC avg
Strong +16% interview lift
Without
With
+16.4%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 2m
Avg Prosecution
30 currently pending
Career history
470
Total Applications
across all art units

Statute-Specific Performance

§101
1.5%
-38.5% vs TC avg
§103
91.4%
+51.4% vs TC avg
§102
1.2%
-38.8% vs TC avg
§112
4.7%
-35.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 436 resolved cases

Office Action

§101 §102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1–6 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without a practical application or significantly more. Regarding claim 1, this claim recites the following limitations which are found to be abstract ideas not reciting a practical application or significantly more: obtaining a captured image of at least a portion of a wafer as a determination image to be used to determine whether the wafer is acceptable or not, excluding the captured image from the determination image when the captured image corresponds to a misdetermination candidate image, and determining whether the wafer is acceptable or not based on the determination image (abstract idea as a mental process as a human mind is capable of taking a photo of a wafer, then deciding whether the photo itself is clear enough/in focus/showing the region of interest in order to make an assessment as to whether there are defects in the wafer, and retaking a photo when the photo is not clear enough (excluding) or otherwise using the clear photo to assess whether a wafer has defects). Further, the claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception because the claim only recites abstract ideas. Therefore, independent claim 1 is directed towards an abstract idea without a practical application or significantly more. Regarding claim 2, the limitations are merely directed towards additional abstract ideas, specifically mental processes as the human mind would practically additionally, in the course of looking at a photo of a wafer determine that the photo is unusable for detecting defects when the photo does not show a wafer at all (corresponding to the claimed when at least part of area in which the wafer is captured is missing in the captured image). Therefore, claim 2 is directed towards an abstract idea without a practical application or significantly more. Regarding claim 3, the claimed further including generating a model to determine whether the captured image corresponds to the misdetermination candidate image, using a teacher data including the misdetermination candidate image, is also merely directed towards an abstract idea as a mental process as the human mind is capable of putting together a model in their mind of what types of photos would not be adequate enough for detecting with certainty that a defect in a wafer is present. The human mind can develop such a model in their mind by way of past experience having evaluated various photos of varying quality and respectively failed or succeeded in actually recognizing a defect therefrom. Therefore, claim 3 is directed towards an abstract idea without a practical application or significantly more. Regarding claims 4–5, while these claims recite additional elements that are not abstract ideas: claim 4: a non-transitory computer readable storage medium; and claim 5: a determination apparatus comprising a control unit; these additional elements are not a practical application nor are they significantly more. The recited a non-transitory computer readable storage medium; and a determination apparatus comprising a control unit, which while not being abstract ideas, are insufficient to recite a practical application of the abstract ideas recited in claim 1 as they amount to mere generic computer elements and thus amount to no more than a recitation of the words "apply it" (or an equivalent) or are no more than mere instructions to implement an abstract idea or other exception on a computer. see MPEP §2106.05(f). Further, the claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception because when considered separately and in combination, the above recited additional elements from claims 4 and 5 do not add significantly more (also known as an “inventive concept”) to the exception. Rather, the additional elements disclosed above perform well-understood, routine, conventional computer functions as recognized by the court decisions listed in MPEP § 2106.05(d). Therefore, claims 4–5 are directed towards an abstract idea without a practical application or significantly more. Regarding claim 6, the limitations are merely directed towards additional abstract ideas, specifically mental processes as the human mind would practically perform a production method including sorting out whether a wafer is acceptable or not by evaluating photos as discussed above in the rejection rationale for claim 1. Therefore, claim 6 is directed towards an abstract idea without a practical application or significantly more. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1–2 and 4–6 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Pai et al., US Patent Application Publication No. US 2023/0054119 A1 (herein “Pai”). Regarding claim 1, Pai teaches a determination method including (Pai fig. 3, ¶102, process of identifying a defect in a semiconductor wafer): obtaining a captured image of at least a portion of a wafer as a determination image to be used to determine whether the wafer is acceptable or not (Pai ¶¶102, 109, and 111, electronic device receives candidate semiconductor wafer images, which will be used, if it is not discarded, to determine whether there are defects in the wafer), excluding the captured image from the determination image when the captured image corresponds to a misdetermination candidate image (Pai ¶¶102–108, the candidate wafer image is discarded, and not used to detect whether there is a defect in the wafter (excluding from the determination image) when a discarding condition is met such as lack of a feature or ROI in the image (corresponding to a midetermination candidate image that lacks a feature/ROI)), and determining whether the wafer is acceptable or not based on the determination image (Pai ¶111, fig. 3, if a discarding condition is not satisfied, then the candidate image of the wafer is not discarded, and it is used (as the determination image) to determine whether the wafer has a defect (acceptable or not)). Regarding claim 2, Pai teaches further including determining that the captured image corresponds to the misdetermination candidate image in at least one of the following cases: when at least part of area in which the wafer is captured is missing in the captured image, or when a predetermined portion of the wafer is captured in the captured image (Given that the broadest reasonable interpretation of the claim requires just one of the “at least one of the following cases,” Pai ¶¶102 and 106 teach that the candidate image of the wafer is determined to meet the discarding condition when there is a lack of a region of interest ROI (at least part of area in which the wafer is captured is missing) in the semiconductor wafer image). Regarding claim 4, Pai teaches a non-transitory computer readable storage medium storing a determination program that causes a processor to execute the determination method according to claim 1 (Pai ¶¶142–144, method illustrated in fig. 3 that perform the operations described in this application are performed by computing hardware, for example, by one or more processors or computers, implemented as described above implementing instructions or software to perform the operations described in this application that are performed by the methods, the software being recorded, stored, or fixed in or on one or more non-transitory computer-readable storage media). Regarding claim 5, Pai teaches a determination apparatus comprising a control unit that executes the determination method according to claim 1 (Pai ¶¶142–144, method illustrated in fig. 3 that perform the operations described in this application are performed by computing hardware, for example, by one or more processors or computers, implemented as described above implementing instructions or software to perform the operations described in this application that are performed by the methods). Regarding claim 6, Pai teaches a wafer production method (Pai ¶¶53, 61–62, fig. 1, methods of identifying a defect in a semiconductor wafer performed by an electronic device that includes a wafer positioning system for imaging and obtaining or discarding defective wafers (wafer production method)) including determining whether a wafer is acceptable or not by performing the determination method according to claim 1 (Pai ¶111, fig. 3, wafer defect detected via determination method of fig. 3). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 3 is rejected under 35 U.S.C. 103 as being unpatentable over Pai as set forth above regarding claim 1 from which claim 3 depends, further in view of Zhao, US Patent Application Publication No. US 2023/0162344 A1 (herein “Zhao”). Regarding claim 3, while Pai teaches that the discarding condition can be determined using an image-knowledge filter (see Pai ¶107), Pai does not explicitly teach that the image-knowledge filter is a model or generating the filter, where a model that is generated using teacher data (training data) is given a broadest reasonable interpretation to be some kind of machine learning model, in which case, Pai’s broadly disclosed image-knowledge filter does not teach same. However, Zhao teaches further including generating a model to determine whether the captured image corresponds to the misdetermination candidate image, using a teacher data including the misdetermination candidate image (Zhao ¶¶53–55, a machine learning model is trained to discern image noise (image corresponds to the misdetermination candidate image) from an image of a workpiece (where a wafer can be a workpiece) from actual defects in a workpiece using training data that includes gray color noise augmented images of non-defective workpieces (misdetermination candidate image)). Therefore taking the teachings of Pai and Zhao together as a whole, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified the knowledge-filter of Pai to be a trained machine learning model as disclosed in Zhao at least because doing so would enable stably exhibition of high detection capability for a defective product image having an unknown defect. See Zhao ¶11. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Pai. Regarding claim 7, Pai teaches a wafer that has been determined to be acceptable by performing the determination method according to claim 1 (Pai ¶¶53, 61–62, 121, methods of identifying a defect in a semiconductor wafer performed by a wafer positioning system for discarding defective wafers, where a defect prediction model is used to determine whether (or not) the semiconductor wafer is defective). While Pai explicitly teaches, and thus anticipates a wafer that has been determined to be unacceptable (defective) by way of the method of fig. 3 (claim 1), Pai does not explicitly teach the other alternative when the method does not find a defect and thus does not discard the wafer. However, such an outcome would have been obvious to try with predictable results by a person having ordinary skill in the art before the effective filing date of the claimed invention, given that there is only a closed set of outcomes output from the defect detection method of fig. 3. That is, either a defect is identified, or it is not, and if it is not identified, then the wafer under review would not be discarded, and would be determined to be acceptable. MPEP §2143(E) sets forth that an obvious to try rationale is proper to find obviousness. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Hayashi et al., US Patent No. 7,149,341 B2, directed towards a wafer inspection apparatus including multiple imaging means to detect defects. Park et al., US Patent Application Publication No. US 2023/0103349 A1, directed towards a semiconductor wafer inspection method that includes providing a wafer with target and reference dies; obtaining a candidate image of a first region of the target die and a reference image of a second region of the reference die, and detecting whether a defect signal is generated. Sakai et al., US Patent Application Publication No. US 2018/0101944 A1, directed towards inspection of a semiconductor wafer where a defect is detected using wafer images and masks. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHELLE M KOETH whose telephone number is (571)272-5908. The examiner can normally be reached Monday-Thursday, 09:00-17:00, Friday 09:00-13:00, EDT/EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Vincent Rudolph can be reached at 571-272-8243. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MICHELLE M. KOETH Primary Examiner Art Unit 2671 /MICHELLE M KOETH/Primary Examiner, Art Unit 2671
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Prosecution Timeline

Nov 01, 2024
Application Filed
Jun 23, 2026
Non-Final Rejection mailed — §101, §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
94%
With Interview (+16.4%)
2y 2m (~5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 436 resolved cases by this examiner. Grant probability derived from career allowance rate.

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