DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-5, 9-12, 14-15, 17-18 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Moore (US 2021/0302917).
Regarding Claim 1, Moore discloses a distance measuring device [#100 of Fig 1; 0030] comprising: a plurality of light receiving elements [#104 of Fig 1; #302 of Fig 3; 0030] that receives light emitted from one or a plurality of light emitting elements [#106 of Fig 1; 0030] and reflected on a target; a first counter [#602 of Fig 6] that performs, at every predetermined time, state transition of a first binary code that is a binary code of n digits from a first value [#620 of Fig 6; 0051] to a second value that is 2° -1 - (the first value) [“1111” of Fig 7] and in which a value next to the second value is set as the first value [#602-#608 of Fig 6; 0051-53]; an encoder that converts the first binary code into a gray code of n digits [#604 of Fig 6; Fig 3-4; 0038; 0040-44; 0051-3]; a decoder that acquires a second binary code of n digits from the gray code based on a light reception timing of the light receiving elements [#110, #118 of Fig 1; Fig 5; 0045-46]; a second counter that counts a number of times of light reception of the plurality of light receiving elements corresponding to each of the second binary codes [#118 of Fig 1; Fig 4, 7, 8; 0051-55; 0065-66]; and a distance extraction circuit that measures a distance to the target on a basis of a discrete value acquired by the second counter [#100 of Fig 1; Fig 4, 7, 8; 0051-55; 0065-66].
Regarding Claim 14, Moore discloses a counter comprising: a first counter [#602 of Fig 6] that performs, at every predetermined time, state transition of a first binary code that is a binary code of n digits from a first value [#620 of Fig 6] to a second value that is 2n -1 - (the first value) [“1111” of Fig 7] and in which a value next to the second value is set as the first value [#602-#608 of Fig 6; 0051-53]; and an encoder that converts the first binary code into a gray code of n digits [#604 of Fig 6; Fig 3-4; 0038; 0040-44; 0051-3].
Regarding Claim 2, Moore also discloses wherein a smaller value of the first value or the second value is 0 or more and 2 2 - 1 or less [#620 of Fig 6; 0051].
Regarding Claim 3, Moore also discloses wherein in a case where the first value is larger than the second value, the first counter generates the first binary code with a value next to 2n - 1 as 0 [#602-#608, #620 of Fig 6; 0051-53].
Regarding Claim 4 and 15, Moore also discloses wherein the first counter adds one to a count value at each time of the state transition [#110, #118 of Fig 1; Fig 5; 0045-46].
Regarding Claim 5, Moore also discloses wherein in a case where the first value is larger than the second value, the first counter generates the first binary code with a value next to 0 as 2n – 1 [#602-#608, #620 of Fig 6; 0051-53].
Regarding Claim 9, Moore also discloses wherein the distance extraction circuit measures the distance to the target by a histogram having a frequency corresponding to a number of states from the first value to the second value [Fig 3-4; 0038; 0040-44; 0051-3].
Regarding Claim 10 and 17, Moore also discloses wherein the decoder obtains a second binary code by subtracting the first value from a value obtained by converting the gray code from a binary code [#602-#608, #620 of Fig 4-6; 0041-46; 0051-53].
Regarding Claim 11 and 18, Moore also discloses wherein the second counter forms a histogram with a discrete value for the second binary code obtained by converting the gray code into a binary code as a discrete value for a value obtained by subtracting the first value from the second binary code [#602-#608, #620 of Fig 4-6; 0041-46; 0051-53].
Regarding Claim 12, Moore also discloses wherein the distance extraction circuit accumulates a discrete value for the second binary code obtained by converting the gray code into a binary code as a histogram in the second counter, and subtracts a distance corresponding to the first value from a distance extracted from the histogram [#602-#608, #620 of Fig 4-6; 0041-46; 0051-53].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 6-8, 13, and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Moore (US 2021/0302917), as applied to claims 1 and 14 above, and further in view of Lim (US 6,790,113).
Regarding Claim 6, Moore does not explicitly teach -but Lim does teach wherein the first counter subtracts one from the count value at each time of the state transition [Fig 1, 2; Col 1 Line 60 – Col. 2 Line 10; Col. 4 Line 40 – Col. 5 Line 30]. It would have been obvious to modify the apparatus of Moore to include counter subtraction to produce a Gray code that is balanced and that contains symmetrically reversed sequences.
Regarding Claim 7, Moore does not explicitly teach -but Lim does teach a first value acquisition circuit that acquires 2n - 1 - (the second value) as the first value on a basis of the second value having been input, wherein the first counter counts on a basis of the second value having been input and the first value having been acquired [Fig 1, 2; Col 1 Line 60 – Col. 2 Line 10; Col. 4 Line 40 – Col. 5 Line 30]. It would have been obvious to modify the apparatus of Moore to include counter subtraction to produce a Gray code that is balanced and that contains symmetrically reversed sequences.
Regarding Claim 8, Moore does not explicitly teach -but Lim does teach a second value acquisition circuit that acquires the second value on a basis of the first value having been input, wherein the first counter counts on a basis of the first value having been input and the second value having been acquired [Fig 1, 2; Col 1 Line 60 – Col. 2 Line 10; Col. 4 Line 40 – Col. 5 Line 30]. It would have been obvious to modify the apparatus of Moore to include counter subtraction to produce a Gray code that is balanced and that contains symmetrically reversed sequences.
Regarding Claim 13, Moore does not explicitly teach -but Lim does teach wherein the distance extraction circuit accumulates a discrete value for the second binary code obtained by converting the gray code into a binary code as a histogram in the second counter, and subtracts a predetermined distance from a distance extracted from the histogram [Fig 1, 2; Col 1 Line 60 – Col. 2 Line 10; Col. 4 Line 40 – Col. 5 Line 30]. It would have been obvious to modify the apparatus of Moore to include counter subtraction to produce a Gray code that is balanced and that contains symmetrically reversed sequences.
Regarding Claim 16, Moore does not explicitly teach -but Lim does teach wherein the first counter subtracts one from a count value at each time of the state transition [Fig 1, 2; Col 1 Line 60 – Col. 2 Line 10; Col. 4 Line 40 – Col. 5 Line 30]. It would have been obvious to modify the apparatus of Moore to include counter subtraction to produce a Gray code that is balanced and that contains symmetrically reversed sequences.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMES R HULKA whose telephone number is (571)270-7553. The examiner can normally be reached M-R: 9am-6pm, F: 10am-2pm.
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JAMES R. HULKA
/JAMES R HULKA/Primary Examiner, Art Unit 3645
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