Prosecution Insights
Last updated: August 18, 2026
Application No. 18/863,664

NOISE ANALYSIS APPARATUS, NOISE ANALYSIS METHOD, AND PROGRAM FOR STIMULATING NOISE FROM SEMICONDUCTOR DEVICE SWITCHING

Final Rejection §101
Filed
Nov 07, 2024
Priority
May 17, 2022 — JP PCT/JP2022/020532 +2 more
Examiner
SUN, XIUQIN
Art Unit
2857
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Mitsubishi Electric Corporation
OA Round
4 (Final)
72%
Grant Probability
Favorable
5-6
OA Rounds
1y 5m
Est. Remaining
76%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
435 granted / 600 resolved
+4.5% vs TC avg
Minimal +4% lift
Without
With
+3.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
28 currently pending
Career history
634
Total Applications
across all art units

Statute-Specific Performance

§101
20.3%
-19.7% vs TC avg
§103
46.4%
+6.4% vs TC avg
§102
21.1%
-18.9% vs TC avg
§112
9.8%
-30.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 600 resolved cases

Office Action

§101
DETAILED ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments 2. Applicant's arguments regarding the claim eligibility have been fully considered but are moot in view of the new ground(s) of rejection. Detailed response is given in sections 3-4 as set forth below in this Office Action. Regarding the claim eligibility, Applicant argues (REMARKS, p.3): PNG media_image1.png 203 651 media_image1.png Greyscale Examiner respectfully disagrees. As discussed in details in section 4 below, Examiner considers that the “heart” of the representative claim 1 is directed to an algorithm of calculating noise spectrum of switching of semiconductor devices which encompasses math concepts that can be performed in human mind or with pen and paper. The claim does not recite any additional limitation/element that amounts to significantly more to integrate the math/mental algorithm into a practical application. Further, none of the claimed additional limitations/elements reflects an “inventive concept” or a qualified improvement under the 2019 PEG. The claim is merely collecting information, analyzing it, and displaying certain results of the collected/analyzed data related to a specific field of use, which is not eligible. This is similar to Electric Power Group, LLC v. Alstom S.A., 830 F.3d 1350, 1354, 119 USPQ2d 1739, 1742 (Fed. Cir. 2016). Applicant’s arguments simply set forth advantages (i.e. benefits) of use but without providing any rational/evidence to how/why the claimed elements amount to significantly more than the judicial exception. It is held that mere instructions to apply the judicial exception on a computer component (MPEP 2106.05(f)) and/or generally linking the use of the judicial exception to a particular technological environment are not qualified for an improvement (i.e. enhancement) in the functioning of a computer or an improvement to another technology or technical field. Applicant has not shown that the claimed acquisition circuit is acquiring the information in a unique way (that is, the manner of the data collection) that is never done before and that improves the application of the data, or the output from the output circuit feedbacks to the claimed noise analysis apparatus and/or the switching mechanism to improve the functionality of the semiconductor device, such that the claimed subject matter goes beyond just performing a math calculation of the data and provides a practical application or significant improvement through the use of that math calculation. See MPEP 2106.04(d)(I) and 2106.05(a). Accordingly, Applicant’s arguments in this regard are not persuasive. Applicant further argues (REMARKS, p.3-4): PNG media_image2.png 337 651 media_image2.png Greyscale Examiner respectfully disagrees. Instant claim 1 recites: “(S2) a phase transform circuit to generate a plurality of pieces of phase difference information respectively corresponding to the plurality of occurrence times acquired by the first acquisition circuit for subjecting a noise spectrum in the switching of the semiconductor device to a phase transform to reflect a time difference of the plurality of times of switching”. Under the BRI, this limitation encompasses mathematical relationships, but for the recitation of generic computing components. Nothing in this limitation (S2) precludes it from practically being performed in the mind and/or using a pen and paper. Examiner asserts that the claim limitation in question does not qualify for any improved technological process for executing computer-based simulations under MPEP 2106.04(d) and 2106.05(a). The recited data characteristics about the switching of the semiconductor device do not transform the physical elements of the switching of the semiconductor device to digital data of a different form. Instead, data is obtained and the information is being manipulated, i.e. “transformed”, into other data through mathematical calculations. Under the BRI, the data characteristics about the switching of the semiconductor device generally link the use of the judicial exception (math + mental) to a particular technological environment or field of use. That is, no additional elements in the limitation (S2) amounts to be meaningful to integrate the recited judicial exception into a practical application such that the claim, as a whole, recites an improvement in the functioning of a computer, or an improvement to other technology or technical field. Applicant further argues (REMARKS, p.4): PNG media_image3.png 301 644 media_image3.png Greyscale Examiner respectfully disagrees. At Step 2B, Examiner gives the consideration to additional elements that provide an inventive concept. In the instant case, focusing on what the inventors have invented exactly, Examiner asserts that the “core” of pending claims 1-6 and 8-24 is directed to an algorithm of calculating noise spectrum of switching of semiconductor devices which falls within a combination of the “Mathematical Concepts” and “Mental Process” Groupings of Abstract Ideas defined by the 2019 PEG. Examiner admits that the claimed abstract idea may include some features that distinguish over the prior art of record. However, an improved abstract idea is still an abstract idea. The claim does not recite any additional limitation (emphasis added) that amounts to “significantly more” than the recited judicial exception or reflects an “inventive concept” (see detailed analysis as set forth in section 4 below in this Office action) The rest of the Applicant’s arguments with respect to the subject matter eligibility are reliant upon the issues discussed above or have been fully addressed in the detailed response as set forth in sections 3-4 below in this Office action. The rejection is therefore maintained. Claim Rejections - 35 USC § 101 3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 101 that form the basis for the rejections under this section made in this Office action: 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. 4. Claims 1-6 and 8-24 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more. Under the 2019 PEG (now been incorporated into MPEP 2106), the revised procedure for determining whether a claim is "directed to" a judicial exception requires a two-prong inquiry into whether the claim recites: (1) any judicial exceptions, including certain groupings of abstract ideas (i.e., mathematical concepts, certain methods of organizing human interactions such as a fundamental economic practice, or mental processes); and (2) additional elements that integrate the judicial exception into a practical application (see MPEP § 2106.05(a)-(c), (e)-(h)). Only if a claim (1) recites a judicial exception and (2) does not integrate that exception into a practical application, do we then look to whether the claim: (3) adds a specific limitation beyond the judicial exception that is not "well-understood, routine, conventional" in the field (see MPEP § 2106.0S(d)); or (4) simply appends well-understood, routine, conventional activities previously known to the industry, specified at a high level of generality, to the judicial exception. Claims 1-6 and 8-24 are directed to an abstract idea of calculating noise spectrum of switching of semiconductor devices. Specifically, representative claim 1 recites: A noise analysis apparatus to calculate a sum spectrum of noise caused by switching that is at least one of turning on and turning off of a semiconductor device, comprising: (S1) a first acquisition circuit to acquire information indicating a plurality of occurrence times at which switching of the semiconductor device occurs a plurality of times, respectively, for a noise analysis target period including the plurality of times of switching of the semiconductor device; (S2) a phase transform circuit to generate a plurality of pieces of phase difference information respectively corresponding to the plurality of occurrence times acquired by the first acquisition circuit for subjecting a noise spectrum in the switching of the semiconductor device to a phase transform to reflect a time difference of the plurality of times of switching; and (S3) a first addition circuit to calculate the sum spectrum, the sum spectrum being obtained by adding together a plurality of noise spectra obtained through a phase transform of the noise spectrum in the switching of the semiconductor device by the plurality of pieces of phase difference information, respectively, wherein each of the plurality of noise spectra is numerical information obtained by converting a time-domain transient waveform during the switching of the semiconductor element into a frequency spectrum, each of the plurality of noise spectra before the phase transform comprises unique phase information of the time-domain transient waveform independent of the plurality of occurrence times, with a time at which the switching of the semiconductor device occurs, being defined as a reference time of the time-domain transient waveform, and the phase transform is performed to delay a phase of each of the plurality of noise spectra by an amount of a phase being proportional to an amount of delay of the plurality of occurrence times from the reference time, or the phase of each of the plurality of noise spectra is advanced by an amount of a phase being proportional to an amount of advance of the plurality of occurrence times from the reference time; and the noise analysis apparatus further comprising: (S4) an output circuit to output a simulated noise calculation result as a graph illustrating noise voltage versus frequency, the output circuit deriving the simulated noise calculation result even when the semiconductor device has changing on and off period lengths. The claim limitations in the abstract idea have been highlighted in bold above; the remaining limitations are “additional elements”. The highlighted portion of the claim constitutes an abstract idea under the 2019 Revised Patent Subject Matter Eligibility Guidance and the additional elements are NOT sufficient to amount to significantly more than the judicial exceptions, as analyzed below: Step Analysis 1. Statutory Category ? Yes. Apparatus 2A - Prong 1: Judicial Exception Recited? Yes. See the bolded portion above. Under its broadest reasonable interpretation (BRI), each or the combination of the limitations S2 and S3 recited in the bolded portion encompasses mathematical relationships, namely a series of calculations leading to one or more numerical results or answers, but for the recitation of generic computing components. Nothing in the bolded portion precludes the recited limitations from practically being performed in the mind and/or using a pen and paper. Further, although it does not spell out any particular equation or formula being used, the lack of specific equations for the series of calculations merely indicates that the claim would monopolize all possible math concepts in practicing the apparatus. The bolded portion of claim 1 therefore amounts to a series of mathematical concepts (and also mental processes, i.e. data evaluations being performed in the mind and/or using a pen and paper), falling within a combination of the “Mathematical Concepts” and “Mental Process” Groupings of Abstract Ideas defined by the 2019 PEG. 2A - Prong 2: Integrated into a Practical Application? No. The claim as a whole does not integrate the abstract idea into a practical application. The limitation S1 reads on a component of gathering the data/information necessary for performing the abstract idea identified above. According to MPEP 2106.05(g)(3): … that were described as mere data gathering in conjunction with a law of nature or abstract idea. As such, it represents an extra-solution activity to the judicial exception. The details of the acquired data/information (e.g., the information including time-series data of a switching control signal specifying an on period and an off period for the semiconductor device), under the BRI, encompass merely data characterization which can be viewed as nothing more than an attempt to generally link the use of the judicial exception to the technological environment of monitoring operation conditions of a semiconductor device. Under its BRI, the limitation S4 encompasses an insignificant post-solution activity as it merely outputs (e.g., displays) the results of the abstract idea. According to MPEP 2106.05(g): When determining whether an additional element is insignificant extra-solution activity, examiners may consider the following: … (3) Whether the limitation amounts to necessary data gathering and outputting, (i.e., all uses of the recited judicial exception require such data gathering or data output). See Mayo, 566 U.S. at 79, 101 USPQ2d at 1968; OIP Techs., Inc. v. Amazon.com, Inc., 788 F.3d 1359, 13863, 115 USPQ2d 1090, 1092-93 (Fed. Cir. 2015) (presenting offers and gathering statistics amounted to mere data gathering). Claim 1 recites the additional element “a graph illustrating noise voltage versus frequency”. Under the BRI, this additional element encompasses merely a preferred arrangement of non-functional descriptive material or printed matter which is not functionally related to the output circuit but useful and intelligible only to the human mind (see MPEP 2111.05). In particular, it does not specify any particular function or benefit for improving the claimed noise analysis apparatus. Furthermore, according to MPEP 2106.05(h), limiting the abstract idea of collecting information, analyzing it, and displaying certain results of the collection and analysis to data related to a specific field of use is simply an attempt to limit the use of the abstract idea to a particular technological environment. In general, the claim as a whole does not meet any of the following criteria to integrate the abstract idea into a practical application: An additional element reflects an improvement in the functioning of a computer, or an improvement to other technology or technical field; an additional element that applies or uses a judicial exception to effect a particular treatment or prophylaxis for a disease or medical condition; an additional element implements a judicial exception with, or uses a judicial exception in conjunction with, a particular machine or manufacture that is integral to the claim; an additional element effects a transformation or reduction of a particular article to a different state or thing; and an additional element applies or uses the judicial exception in some other meaningful way beyond generally linking the use of the judicial exception to a particular technological environment, such that the claim as a whole is more than a drafting effort designed to monopolize the exception. Various considerations are used to determine whether the additional elements are sufficient to integrate the abstract idea into a practical application. However, in all of these respects, the claim fails to recite additional elements which might possibly integrate the claim into a particular practical application. Instead, based on the above considerations, the claim would tend to monopolize the algorithm across a wide range of applications. 2B: Claim provides an Inventive Concept? No. Focusing on what the inventors have invented exactly, it is deemed that the “heart” of the representative claim 1 is directed to an abstract algorithm of mathematically calculating noise spectrum of switching events in semiconductor devices. As discussed with respect to Step 2A Prong Two above, none of the claimed additional elements is considered to be qualified for “significantly more” and/or an “inventive concept” because they do not impose any meaningful limits on practicing the abstract idea. The recited additional limitations S1 and S4 amount merely to necessary data gathering and outputting using well-known/conventional techniques (see the prior art cited in the previous Office action). At most, they reflect an attempt to generally link the use of the judicial exception to the relevant technological environment or field of use. Further, outputting, e.g. displaying, data information in graphical format including visual indicators is a well-understood, routine, conventional activity that does not add something significantly more to the abstract idea. Accordingly, the claim does not recite any additional limitation that amounts to “significantly more” than the recited judicial exception or reflects an “inventive concept”. The claim is therefore ineligible under 35 USC 101. The dependent claims 2-6 and 8-12 inherit attributes of the independent claim 1, but do not add anything which would render the claimed invention a patent eligible application of the abstract idea. These claims merely extend (or narrow) the abstract idea which do not amount for "significant more" because they merely add details to the algorithm which forms the abstract idea as discussed above. Hence the claims 1-6 and 8-12 are treated as ineligible subject matter under the 2019 PEG. Claims 13-24 are rejected under 35 U.S.C. § 101 for the same reason as for claims 1-6 and 8-12 set forth above. Examiner’s Note 5. While there are related references that discuss calculating/analyzing noise spectrum of switching in semiconductor devices, the prior art of record does not specifically provide teachings for the claimed limitations including: each of the plurality of noise spectra before the phase transform comprises unique phase information of the time-domain transient waveform independent of the plurality of occurrence times, with a time at which the switching of the semiconductor device occurs, being defined as a reference time of the time-domain transient waveform, and the phase transform is performed to delay a phase of each of the plurality of noise spectra by an amount of a phase being proportional to an amount of delay of the plurality of occurrence times from the reference time, or the phase of each of the plurality of noise spectra is advanced by an amount of a phase being proportional to an amount of advance of the plurality of occurrence times from the reference time. It is these limitations found in each of the claims 1-6 and 8-24, as they are claimed in the combination recited in independent claim 1 or 13, that would make the pending claims 1-6 and 8-24 distinguish over the prior art of record. Conclusion 6. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Contact Information 7. Any inquiry concerning this communication or earlier communications from the examiner should be directed to XIUQIN SUN whose telephone number is (571)272-2280. The examiner can normally be reached 9:30am-6:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Shelby A. Turner can be reached on (571) 272-6334. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /X.S/Examiner, Art Unit 2857 /SHELBY A TURNER/Supervisory Patent Examiner, Art Unit 2857
Read full office action

Prosecution Timeline

Show 7 earlier events
Nov 12, 2025
Request for Continued Examination
Nov 17, 2025
Response after Non-Final Action
Jan 09, 2026
Non-Final Rejection mailed — §101
Mar 04, 2026
Interview Requested
Mar 19, 2026
Applicant Interview (Telephonic)
Mar 19, 2026
Examiner Interview Summary
Apr 29, 2026
Response Filed
May 27, 2026
Final Rejection mailed — §101 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
72%
Grant Probability
76%
With Interview (+3.7%)
3y 3m (~1y 5m remaining)
Median Time to Grant
High
PTA Risk
Based on 600 resolved cases by this examiner. Grant probability derived from career allowance rate.

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