DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
2. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114.
Response to Arguments
3. Applicant's arguments regarding the claim eligibility have been fully considered but are moot in view of the new ground(s) of rejection. Detailed response is given in sections 6-9 as set forth below in this Office Action.
Applicant's arguments regarding the rejection under 35 USC 102/103 in reference to the amended claims are deemed persuasive. The corresponding rejection is hereby withdrawn.
Claim Interpretation
4. The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
5. Claims 1-6 and 8-12 recite the limitations of “a first acquisition circuit”, “a phase transform circuit”, “a first addition circuit”, “an output circuit”, “a second acquisition circuit”, ““a first manipulation circuit”, “a transfer function integration circuit”, “a third acquisition circuit”, “a fourth acquisition circuit”, “a fifth acquisition circuit”, “a noise source spectrum correction circuit”, “a window function setting circuit”, “a weighting coefficient setting circuit”, “a second manipulation circuit”, “a second addition circuit”, etc., which have been interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph because they use a generic placeholder coupled with functional language but without reciting sufficient structure to achieve the function. Furthermore, the generic placeholder is not preceded by a structural modifier.
Since the claim limitation(s) invoke 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, claims 1-6 and 8-12 have been interpreted to cover the corresponding structure described in the specification that achieves the claimed function, and equivalents thereof.
If applicant does not intend to have the claim limitation(s) treated under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112 , sixth paragraph, applicant may amend the claim(s) so that it/they will clearly not invoke 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, or present a sufficient showing that the claim recites/recite sufficient structure, material, or acts for performing the claimed function to preclude application of 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 112
6. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.--The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
7. Claims 1-6 and 8-24 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claims 1 and 13 recite a newly added limitation: “the output circuit rapidly and accurately deriving the simulated noise calculation result even when the semiconductor device has changing on and off period lengths”. Per MPEP 2173.05(b), the terms “rapidly” and “accurately” are treated as relative terms or vague claim language since it is unclear at what level a “rapidly and accurately deriving” is achieved for the simulated noise calculation result. The conditional limitation “when the semiconductor device has changing on and off period lengths” merely adds details to the period lengths or operation state of said “deriving”. Neither the claim nor the specification provides a standard for ascertaining the requisite degree or quality of the recited “rapidly and accurately deriving”, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. That is, an artisan doing measuring and testing would not know at what point the claimed "rapidly and accurately deriving" within the scope of the claim had been accomplished because nothing within the disclosure establishes when a sufficient "rapidly and accurately deriving" occurs. It has been held that when relative terms are used in claims wherein the improvement over the prior art rests entirely upon size or degree of an element in a combination of the claimed subject matter, the adequacy of the disclosure of a standard is of greater criticality.
Claims 2-6, 8-12 and 14-24 are rejected for the same reason by virtue of their dependency to claim 1 or 13.
Accordingly, with the broadest reasonable interpretation to the claims, the Examiner comprehends the limitation in question based on her best interpretations to those relative terms, including any condition of timing and accuracy that may read on the recited "rapidly and accurately deriving”.
Claim Rejections - 35 USC § 101
8. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 101 that form the basis for the rejections under this section made in this Office action:
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
9. Claims 1-6 and 8-24 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
Under the 2019 PEG (now been incorporated into MPEP 2106), the revised procedure for determining whether a claim is "directed to" a judicial exception requires a two-prong inquiry into whether the claim recites: (1) any judicial exceptions, including certain groupings of abstract ideas (i.e., mathematical concepts, certain methods of organizing human interactions such as a fundamental economic practice, or mental processes); and (2) additional elements that integrate the judicial exception into a practical application (see MPEP § 2106.05(a)-(c), (e)-(h)).
Only if a claim (1) recites a judicial exception and (2) does not integrate that exception into a practical application, do we then look to whether the claim: (3) adds a specific limitation beyond the judicial exception that is not "well-understood, routine, conventional" in the field (see MPEP § 2106.0S(d)); or (4) simply appends well-understood, routine, conventional activities previously known to the industry, specified at a high level of generality, to the judicial exception.
Claims 1-6 and 8-24 are directed to an abstract idea of calculating noise spectrum of switching of semiconductor devices.
Specifically, representative claim 1 recites:
A noise analysis apparatus to calculate a sum spectrum of noise caused by switching that is at least one of turning on and turning off of a semiconductor device, comprising:
(S1) a first acquisition circuit to acquire information indicating a plurality of occurrence times at which switching of the semiconductor device occurs a plurality of times, respectively, for a noise analysis target period including the plurality of times of switching of the semiconductor device;
(S2) a phase transform circuit to generate a plurality of pieces of phase difference information respectively corresponding to the plurality of occurrence times acquired by the first acquisition circuit for subjecting a noise spectrum in the switching of the semiconductor device to a phase transform to reflect a time difference of the plurality of times of switching; and
(S3) a first addition circuit to calculate the sum spectrum, the sum spectrum being obtained by adding together a plurality of noise spectra obtained through a phase transform of the noise spectrum in the switching of the semiconductor device by the plurality of pieces of phase difference information, respectively, wherein
each of the plurality of noise spectra is numerical information obtained by converting a time-domain transient waveform during the switching of the semiconductor element into a frequency spectrum
each of the plurality of noise spectra before the phase transform comprises unique phase information of the time-domain transient waveform independent of the plurality of occurrence times, with a time at which the switching of the semiconductor device occurs, being defined as a reference time of the time-domain transient waveform, and
the phase transform is performed to delay a phase of each of the plurality of noise spectra by an amount of a phase being proportional to an amount of delay of the plurality of occurrence times from the reference time, or the phase of each of the plurality of noise spectra is advanced by an amount of a phase being proportional to an amount of advance of the plurality of occurrence times from the reference time,
the noise analysis apparatus further comprising:
(S4) an output circuit to output a simulated noise calculation result, the output circuit rapidly and accurately deriving the simulated noise calculation result even when the semiconductor device has changing on and off period lengths.
The claim limitations in the abstract idea have been highlighted in bold above; the remaining limitations are “additional elements”.
The highlighted portion of the claim constitutes an abstract idea under the 2019 Revised Patent Subject Matter Eligibility Guidance and the additional elements are NOT sufficient to amount to significantly more than the judicial exceptions, as analyzed below:
Step
Analysis
1. Statutory Category ?
Yes.
Apparatus
2A - Prong 1: Judicial Exception Recited?
Yes.
See the bolded portion above.
Under its broadest reasonable interpretation (BRI), each or the combination of the limitations S2 and S3 recited in the bolded portion encompasses mathematical relationships, namely a series of calculations leading to one or more numerical results or answers, but for the recitation of generic computing components. Nothing in the bolded portion precludes the recited limitations from practically being performed in the mind and/or using a pen and paper.
Further, although it does not spell out any particular equation or formula being used, the lack of specific equations for the series of calculations merely indicates that the claim would monopolize all possible math concepts in practicing the apparatus.
The bolded portion of claim 1 therefore amounts to a series of mathematical concepts (and also mental processes, i.e. data evaluations being performed in the mind and/or using a pen and paper), falling within a combination of the “Mathematical Concepts” and “Mental Process” Groupings of Abstract Ideas defined by the 2019 PEG.
2A - Prong 2: Integrated into a Practical Application?
No.
The claim as a whole does not integrate the abstract idea into a practical application.
The limitation S1 reads on a component of gathering the data/information necessary for performing the abstract idea identified above. According to MPEP 2106.05(g)(3): … that were described as mere data gathering in conjunction with a law of nature or abstract idea. As such, it represents an extra-solution activity to the judicial exception.
The details of the acquired data/information (e.g., the information including time-series data of a switching control signal specifying an on period and an off period for the semiconductor device), under the BRI, encompass merely data characterization which can be viewed as nothing more than an attempt to generally link the use of the judicial exception to the technological environment of monitoring operation conditions of a semiconductor device.
Under its BRI, the limitation S4 encompasses an insignificant post-solution activity as it merely outputs (e.g., displays) the results of the abstract idea. According to MPEP 2106.05(g): When determining whether an additional element is insignificant extra-solution activity, examiners may consider the following: … (3) Whether the limitation amounts to necessary data gathering and outputting, (i.e., all uses of the recited judicial exception require such data gathering or data output). See Mayo, 566 U.S. at 79, 101 USPQ2d at 1968; OIP Techs., Inc. v. Amazon.com, Inc., 788 F.3d 1359, 13863, 115 USPQ2d 1090, 1092-93 (Fed. Cir. 2015) (presenting offers and gathering statistics amounted to mere data gathering).
Further, as explained in section 7 above, the relative terms “rapidly” and “accurately” recited in S4 are treated as vague claim language, which may cover any degree or quality of said “rapidly and accurately deriving”. Simply claiming advantages (i.e. benefits) of use but without providing details of what/how/why the claimed elements amount to a qualified improvement do not impose meaningful limits on practicing the abstract idea. See MPEP 2106.04(d)(I), 2106.05(a), 2106.05(f) and MPEP 2106.05(h)
In general, the claim as a whole does not meet any of the following criteria to integrate the abstract idea into a practical application:
An additional element reflects an improvement in the functioning of a computer, or an improvement to other technology or technical field;
an additional element that applies or uses a judicial exception to effect a particular treatment or prophylaxis for a disease or medical condition;
an additional element implements a judicial exception with, or uses a judicial exception in conjunction with, a particular machine or manufacture that is integral to the claim;
an additional element effects a transformation or reduction of a particular article to a different state or thing; and
an additional element applies or uses the judicial exception in some other meaningful way beyond generally linking the use of the judicial exception to a particular technological environment, such that the claim as a whole is more than a drafting effort designed to monopolize the exception.
Various considerations are used to determine whether the additional elements are sufficient to integrate the abstract idea into a practical application. However, in all of these respects, the claim fails to recite additional elements which might possibly integrate the claim into a particular practical application. Instead, based on the above considerations, the claim would tend to monopolize the algorithm across a wide range of applications.
2B: Claim provides an Inventive Concept?
No.
At Step 2B, consideration is given to additional elements that may make the abstract idea significantly more.
Focusing on what the inventors have invented exactly, it is deemed that the “heart” of the representative claim 1 is directed to an abstract algorithm of mathematically calculating noise spectrum of switching events in semiconductor devices.
As discussed with respect to Step 2A Prong Two above, none of the claimed additional elements is considered to be qualified for “significantly more” and/or an “inventive concept” because they do not impose any meaningful limits on practicing the abstract idea. The recited additional limitations S1 and S4 amount merely to necessary data gathering and outputting using well-known/conventional techniques. See the prior art cited in sections 8-11 in the previous Office Action. At most, they reflect an attempt to generally link the use of the judicial exception to the relevant technological environment or field of use.
The claim is therefore ineligible under 35 USC 101.
The dependent claims 2-6 and 8-12 inherit attributes of the independent claim 1, but do not add anything which would render the claimed invention a patent eligible application of the abstract idea. These claims merely extend (or narrow) the abstract idea which do not amount for "significant more" because they merely add details to the algorithm which forms the abstract idea as discussed above. Hence the claims 1-6 and 8-12 are treated as ineligible subject matter under the 2019 PEG.
Claims 13-24 are rejected under 35 U.S.C. § 101 for the same reason as for claims 1-6 and 8-12 set forth above.
Examiner’s Note
10. While there are related references that discuss calculating/analyzing noise spectrum of switching in semiconductor devices, the prior art of record does not specifically provide teachings for the claimed limitations including: each of the plurality of noise spectra before the phase transform comprises unique phase information of the time-domain transient waveform independent of the plurality of occurrence times, with a time at which the switching of the semiconductor device occurs, being defined as a reference time of the time-domain transient waveform, and the phase transform is performed to delay a phase of each of the plurality of noise spectra by an amount of a phase being proportional to an amount of delay of the plurality of occurrence times from the reference time, or the phase of each of the plurality of noise spectra is advanced by an amount of a phase being proportional to an amount of advance of the plurality of occurrence times from the reference time. It is these limitations found in each of the claims 1-6 and 8-24, as they are claimed in the combination recited in independent claim 1 or 13, that would make the pending claims 1-6 and 8-24 distinguish over the prior art of record.
Contact Information
11. Any inquiry concerning this communication or earlier communications from the examiner should be directed to XIUQIN SUN whose telephone number is (571)272-2280. The examiner can normally be reached 9:30am-6:00pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Shelby A. Turner can be reached on (571) 272-6334. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/X.S/ Examiner, Art Unit 2857
/SHELBY A TURNER/ Supervisory Patent Examiner,
Art Unit 2857