DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: 300 (e.g., see Fig. 3).
Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 4, 8, 9, 13, 14 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Takahashi et al (US 2018/0040640 A1) in view of Yamazaki (US 2020/0302873 A1).
Regarding claim 1, Takahashi discloses a display apparatus comprising a stack structure including:
a light-emitting element [e.g., Figs. 2, 4: EL] whose luminance changes according to a supplied current [e.g., see Paragraph 6];
a current source transistor [e.g., Figs. 2, 4: M2] that is electrically connected to a current source [e.g., Fig. 4: anode source] and the light-emitting element and supplies a current [e.g., see Paragraph 6] corresponding to a signal voltage [e.g., Fig. 4: SL; Paragraph 89: Vdata] to the light-emitting element;
a capacitor [e.g., Fig. 4: C1] connected to a control terminal [e.g., Fig. 4: M2 gate] of the current source transistor; and
a selection transistor [e.g., Figs. 2, 4: M1] that is connected to the control terminal of the current source transistor and supplies the signal voltage to the current source transistor via the capacitor,
wherein the stack structure includes:
a semiconductor substrate [e.g., Figs. 2, 4: 21; Fig. 2: 31] on which the current source transistor is provided;
a wiring layer [e.g., Figs. 2, 4: 22] stacked on the semiconductor substrate and including the capacitor and the selection transistor formed of a thin layer transistor [e.g., Figs. 2, 4: M1]; and
the light-emitting element stacked [e.g., Figs. 2, 4: 23] on the wiring layer (e.g., see Figs. 1A-4; Paragraphs 37-94).
Takahashi doesn’t appear to expressly disclose calling the selection transistor a thin film transistor.
However, Yamazaki discloses a display apparatus comprising a stack structure including:
a light-emitting element [e.g., Fig. 3: OLED] whose luminance changes according to a supplied current [e.g., Paragraph 66: Ids];
a current source transistor [e.g., Figs. 3, 8: Tsig] that is electrically connected to a current source [e.g., Fig. 3: 13] and the light-emitting element and supplies a current [e.g., Paragraph 66: Ids] corresponding to a signal voltage [e.g., Paragraph 48: Vsig, Vofs via Fig. 3: 16] to the light-emitting element;
a capacitor [e.g., Figs. 3, 8: Cs] connected (e.g., indirectly) to a control terminal [e.g., Fig. 3: Tsig gate] of the current source transistor; and
a selection transistor [e.g., Figs. 3, 8: Tdrv] that is connected (e.g., indirectly) to the control terminal of the current source transistor,
wherein the stack structure includes:
a semiconductor substrate [e.g., Fig. 8: 101; see claim 3] on which the current source transistor is provided;
a wiring layer [e.g., layer including Fig. 8: Cs, Tdrv; ] stacked on the semiconductor substrate and including the capacitor and the selection transistor formed of a thin film transistor [e.g., Fig. 8: TFT; see Paragraph 56]; and
the light-emitting element stacked [e.g., Fig. 8: 151-153] on the wiring layer (e.g., see Paragraphs 34-136).
Takahashi and Yamazaki are analogous art, because they are from the shared inventive field of light emitting display apparatuses.
Therefore, it would have been obvious to one having ordinary skill in the art at the time of filing to combine Yamazaki’s thin film transistor structure and/or label with Takahashi’s selection transistor, so as that deterioration in luminance as a display apparatus can be suppressed.
Moreover, it would have been obvious to one of ordinary skill in the art at the time of filing, because the substitution of Yamazaki’s thin film transistor structure and/or label in the place of Takahashi’s selection transistor would have yielded predictable results to one of ordinary skill in the art at the time of the filing. See KSR International Co. v. Teleflex Inc., et al., Docket No. 04-1350 (U.S. 30 April 2007).
Regarding claim 2, Takahashi discloses in the wiring layer, the capacitor is provided on the semiconductor substrate side, and the selection transistor is provided above [e.g., along y-direction/axis] the capacitor (e.g., see Figs. 3C-4; Paragraphs 78-94).
Yamazaki discloses in the wiring layer, the capacitor is provided on the semiconductor substrate side, and the selection transistor is provided above the capacitor (e.g., see Fig. 8; Paragraphs 102-105).
Regarding claim 4, Takahashi discloses the selection transistor is an N-channel transistor (e.g., see Figs. 3A-4; Paragraphs 78-94).
Yamazaki discloses the selection transistor is an N-channel transistor (e.g., see Paragraphs 56, 131).
Regarding claim 8, Takahashi discloses the thin film/layer transistor includes, as a channel, a thin film semiconductor layer [e.g., Fig. 2: 45] containing at least one element selected from the group consisting of silicon, aluminum, indium, gallium, and zinc (e.g., see Paragraphs 71, 137).
Regarding claim 9, Takahashi discloses in the stack structure, the thin film/layer transistor has a top gate structure, a bottom gate structure, or a dual gate structure (e.g., see Fig. 2; Paragraphs 65-94).
Yamazaki discloses in the stack structure, the thin film transistor has a top gate structure, a bottom gate structure, or a dual gate structure (e.g., see Fig. 8; Paragraphs 102-105).
Regarding claim 13, Yamazaki discloses the capacitor has an MIM structure [e.g., Fig. 8: MIM; see Paragraph 109] formed of a metal film [e.g., Fig. 8: 161, 162; Paragraph 109: metal, metal] sandwiching an insulating film [e.g., Paragraph 109: insulator between metal] from planar directions [e.g., Fig. 8: illustrated up/down directions] perpendicular to a stacking direction [e.g., Fig. 8: illustrated left or right direction] of the stack structure (e.g., see Paragraphs 102-105).
Regarding claim 14, Takahashi discloses the current source transistor is a P-channel transistor (e.g., see Fig. 3A; Paragraph 52).
Yamazaki discloses the current source transistor is a P-channel transistor (e.g., see Paragraph 56).
Regarding claim 19, Takahashi discloses the light-emitting element is an OLED (e.g., see Figs. 3C, 4; Paragraph 53).
Yamazaki discloses the light-emitting element is an OLED (e.g., see Figs. 3C, 4; Paragraphs 51-53).
Election/Restrictions
Applicant's election with traverse of Group I, Species 1, 7, 12, 17 and 18 in the reply filed on 6 January 2026 is acknowledged. The traversal is on the ground(s) that “the groups and/or species could be commonly examined without undue burden, as at least some of the species share common technical features that could be concurrently examined. Groups I and II could be examined without undue burden, as the electronic device claim parallels the display apparatus claim. Nevertheless, non-elected claim 20 has been amended into dependent form, and rejoinder will be requested when appropriate. Also, several “species” correspond to a common embodiment. For example, in Species Group 2, at least Species 7-9 correspond to the first embodiment as described in the Specification as filed. In Species Group 3, at least Species 11-12 correspond to the first embodiment as described in the Specification as filed. Further, Species Groups 4 and 5 appear to rely upon the claims themselves as the respective bases for restriction, which is never appropriate Still further, it is noted that all of the claims were subject to Examination in the International Search Report.” This is not found persuasive.
Restriction is required under 35 U.S.C. 121 and 372. This application contains the following inventions or groups of inventions which are not so linked as to form a single general inventive concept under PCT Rule 13.1.
Group I. Claims 1-19, drawn to a display apparatus, classified in class G09G 3/3233.
Group II. Claim 20, drawn to an electronic device, classified in class G09G 2330/021.
This application additionally contains claims directed to more than one species of the generic invention. These species are deemed to lack unity of invention because they are not so linked as to form a single general inventive concept under PCT Rule 13.1.
The species are as follows:
Species Group 1
Species 1, drawn to the pixel of Fig. 2;
Species 2, drawn to the pixel of Fig. 7;
Species 3, drawn to the pixel of Fig. 10;
Species 4, drawn to the pixel of Fig. 15;
Species 5, drawn to the pixel of Fig. 16; and
Species 6, drawn to the pixel of Fig. 17.
The species of Species Group 1 are independent or distinct, from each other, because as disclosed the different species have mutually exclusive characteristics (e.g., mutually exclusive structures and/or operations) for each identified species.
Species Group 2
Species 7, drawn to the sectional configuration of Fig. 3;
Species 8, drawn to the sectional configuration of Fig. 6;
Species 9, drawn to the sectional configuration of Fig. 8; and
Species 10, drawn to the sectional configuration of Fig. 11.
The species of Species Group 2 are independent or distinct, from each other, because as disclosed the different species have mutually exclusive characteristics (e.g., mutually exclusive structures and/or operations) for each identified species.
Species Group 3
Species 11, drawn to the planar configuration of Fig. 4;
Species 12, drawn to the planar configuration of Fig. 5;
Species 13, drawn to the planar configuration of Fig. 12;
Species 14, drawn to the planar configuration of Fig. 13;
Species 15, drawn to the planar configuration of Fig. 14.
The species of Species Group 3 are independent or distinct, from each other, because as disclosed the different species have mutually exclusive characteristics (e.g., mutually exclusive structures and/or operations) for each identified species.
Species Group 4
Species 16, drawn to the capacitor having an MIM structure formed of a pair of metal films sandwiching an insulating film from up and down directions along a stacking direction of the stack structure (e.g., see claim 10); and
Species 17, drawn to the capacitor having an MIM structure formed of a metal film sandwiching an insulating film from planar directions perpendicular to a stacking direction of the stack structure (e.g., see claim 13).
The species of Species Group 4 are independent or distinct, from each other, because as disclosed the different species have mutually exclusive characteristics (e.g., mutually exclusive structures and/or operations) for each identified species.
Species Group 5
Species 18, drawn to the current source transistor is a P-channel transistor (e.g., see claim 14); and
Species 19, drawn to the current source transistor is an N-channel transistor (e.g., see claim 15).
The species of Species Group 5 are independent or distinct, from each other, because as disclosed the different species have mutually exclusive characteristics (e.g., mutually exclusive structures and/or operations) for each identified species.
In addition, the species, within each respective Species Group, are not obvious variants of each other based on the current record.
The groups of inventions/species listed above do not relate to a single general inventive concept under PCT Rule 13.1 because, under PCT Rule 13.2, they lack the same or corresponding special technical features for the following reasons:
Any international application must relate to one invention only or to a group of inventions/species so linked as to form a single general inventive concept.
Where a group of inventions/species is claimed the requirement of unity of invention referred to in Rule 13.1 shall be fulfilled only when there is a technical relationship among those inventions/species involving one or more of the same or corresponding special technical features.
The expression “special technical features” means those technical features that define a contribution which each of the claimed inventions/species, considered as a whole, makes over the prior art. See MPEP 1850.
The inventions/species lack unity of invention because even though the inventions/species require the technical feature of a stack structure, this technical feature is not a special technical feature as it does not make a contribution over the prior art in view of the grounds of rejection in this Office action.
As demonstrated by the grounds of rejection in this Office action, at least one independent claim of the application does not avoid the prior art, therefore, the special technical feature of the application is anticipated by or obvious in view of the prior art.
Consequently, the inventions/species listed above do not relate to a single general inventive concept under PCT Rule 13.1.
The requirement is still deemed proper and is therefore made FINAL.
The Applicant contends claims 11, 12 and 18 encompass the elected Species. The Office respectfully disagrees.
The Applicant withdrew Claim 10 (see the 1st paragraph on page 6 of the 6 January 2026 Election).
Claims 11 and 12 depend from withdrawn claim 10 -- and are therefore necessarily withdrawn themselves.
Claim 18 recites, “the semiconductor substrate has a butting contact structure in which a source contact of the current source transistor and a contact of a well region of the semiconductor substrate are electrically connected.”
The above claimed subject matter is directed to non-elected Species 15.
Claims 3, 5-7, 10-12, 15-18 and 20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to at least a nonelected species/invention, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 6 January 2026.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The documents listed on the attached 'Notice of References Cited' are cited to further evidence the state of the art pertaining to display apparatuses.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jeff Piziali whose telephone number is (571)272-7678. The examiner can normally be reached on Monday - Friday (7:30AM - 4PM). The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Jeff Piziali/
Primary Examiner, Art Unit 2628
22 January 2026