Prosecution Insights
Last updated: August 17, 2026
Application No. 18/865,568

TYPE-C INSERTION DIRECTION DETECTION CIRCUIT, CIRCUIT BOARD AND ELECTRONIC DEVICE

Non-Final OA §102
Filed
Nov 13, 2024
Priority
Jul 12, 2022 — CN 202210815132.4 +2 more
Examiner
LE, SON T
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
ZTE Corporation
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
558 granted / 676 resolved
+14.5% vs TC avg
Moderate +14% lift
Without
With
+14.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
13 currently pending
Career history
684
Total Applications
across all art units

Statute-Specific Performance

§101
5.8%
-34.2% vs TC avg
§103
53.3%
+13.3% vs TC avg
§102
26.8%
-13.2% vs TC avg
§112
9.2%
-30.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 676 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. CN202210815132.4, filed on 7/12/22. Information Disclosure Statement The information disclosure statement (IDS) submitted on 11/13/24. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 11-12 is/are rejected under 35 U.S.C. 102(a1) as being anticipated by Tupala (US 20150293514, hereinafter Tupala). Regarding to claim 1, Tupala discloses a Type-C insertion direction detection circuit (paragraph 0031 discloses determine the orientation of the plug), applied to an electronic device comprising a Type-C socket, the detection circuit comprising: a switch module (fig. 3 shows a switch module included 316 and 318), having an input end configured to be connected to a VBUS end of the Type-C socket (fig. 3 shows 316 connected to VBUS then 318), the input end of the switch module is connected to a first CC end and/or a second CC end of the Type-C socket (fig. 3 shows 318 connected to first CC1 (101A side) then second CC1 (101B side)), and the switch module is configured to change an on/off status according to a first level received at the input end from the first CC end and/or the second CC end (fig. 3 shows 318 controlled by CC1), and output a second level at a drive end of the switch module, for the electronic device to determine a plugging relationship between a Type-C plug and the Type-C socket according to the second level (paragraph 0045 discloses 320 may start monitoring a voltage and/or a current at the connected CC pin 101B. A host is configured to pull-up its CC pins. Therefore, monitoring the connected CC pin enables device 320 to determine whether the connection to the host is maintained). Regarding to claim 11, Tupala discloses a circuit board (figs. 2-3 show circuitry with components as resistors, switches, control circuits thus a circuit board is required to mount the components), comprising a Type-C insertion direction detection circuit (paragraph 0031 discloses determine the orientation of the plug), applied to an electronic device comprising a Type-C socket, the detection circuit comprising: a switch module (fig. 3 shows a switch module included 316 and 318), having an input end configured to be connected to a VBUS end of the Type-C socket (fig. 3 shows 316 connected to VBUS then 318), the input end of the switch module is connected to a first CC end and/or a second CC end of the Type-C socket (fig. 3 shows 318 connected to first CC1 (101A side) then second CC1 (101B side)), and the switch module is configured to change an on/off status according to a first level received at the input end from the first CC end and/or the second CC end (fig. 3 shows 318 controlled by CC1), and output a second level at a drive end of the switch module, for the electronic device to determine a plugging relationship between a Type-C plug and the Type-C socket according to the second level (paragraph 0045 discloses 320 may start monitoring a voltage and/or a current at the connected CC pin 101B. A host is configured to pull-up its CC pins. Therefore, monitoring the connected CC pin enables device 320 to determine whether the connection to the host is maintained). Regarding to claim 12, Tupala discloses an electronic device, comprising the circuit board of claim 11 (figs. 2-3 show electronic device). Allowable Subject Matter Claims 2-10 and 13-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding to claims 2 and 13, the prior art of record, alone or in combination, do not fairly teach or suggest “wherein in response to the electronic device being a driving device, the first CC end is grounded through a first resistor, and the switch module comprises: a first switching tube, wherein an input end of the first switching tube is connected to the VBUS end, a control end of the first switching tube is connected to the second CC end, an output end of the first switching tube is grounded, and the drive end is arranged between the input end of the first switching tube and the VBUS end” including all of the limitations of the base claim and any intervening claims. Regarding to claims 8 and 19, the prior art of record, alone or in combination, do not fairly teach or suggest “wherein in response to the electronic device being a master device, the switch module comprises: a third switching tube, wherein an input end of the third switching tube is connected to the VBUS end of the Type-C socket, a control end of the third switching tube is connected to the first CC end of the Type-C socket and is connected to the VBUS end through a first resistor network, an output end of the third switching tube is grounded through a seventh resistor, an eighth resistor, and a ninth resistor in sequence, and an enable end is arranged between the seventh resistor and the eighth resistor; and a fourth switching tube, wherein an input end of the fourth switching tube is connected to the VBUS end of the Type-C socket, a control end of the fourth switching tube is connected to the second CC end of the Type-C socket and is connected to the VBUS end through a second resistor network, and an output end of the fourth switching tube is connected between the eighth resistor and the ninth resistor; wherein the drive end is arranged between the eighth resistor and the ninth resistor” including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SON T LE whose telephone number is (571)270-5818. The examiner can normally be reached M to F, 7AM - 4PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eman Alkafawi can be reached at 5712724448. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SON T LE/Primary Examiner, Art Unit 2858
Read full office action

Prosecution Timeline

Nov 13, 2024
Application Filed
Jul 24, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
97%
With Interview (+14.2%)
2y 7m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 676 resolved cases by this examiner. Grant probability derived from career allowance rate.

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