DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
The information disclosure statement (lDS) submitted on November 14, 2024 is in compliance with the provisions of 37 CFR 1.97 and has been considered by the Examiner.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “first sensor unit”, “second sensor unit”, “determiner”, “third sensor unit”, “fourth sensor unit”, in claims 1, 4-6, 9-10, 18, and 20-21.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 16, and 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ikuta (JP 2020-145502 A). The Examiner also notes, with respect to Ikuta, that for purposes of examination, the Examiner will refer to the machine translation.
In regard to claim 1, note Ikuta discloses a photodetection device comprising a first sensor unit that generates a first pulse signal in response to incidence of photons (paragraph 0011, and figure 1: 101A, 102A, 103A; the combination of elements 101A, 102A, and 103A are considered to correspond to the first sensor unit), a second sensor unit that generates a second pulse signal in response to incidence of photons (paragraph 0011, and figure 1: 101B, 102B, 103B; the combination of elements 101B, 102B, and 103B are considered to correspond to the first sensor unit), a first counter that counts a count value in synchronization with one of a plurality of signals including the first and second pulse signals, and outputs a first digital signal indicating the count value and a first carry flag indicating whether or not overflow has occurred (paragraphs 0014-0017, and figure 1: 104A; the first counter 104A receives the first and second signal pulse signals from the sensor units, and outputs the count value and a carry signal), and a second counter that counts a count value in synchronization with one of the first carry flag and the second pulse signal and outputs a second digital signal indicating the count value (paragraphs 0014-0017, and figure 1: 104B; the second counter 104B receives the second pulse signal and the carry signal, and outputs a digital signal).
In regard to claim 2, note Ikuta discloses a first multiplexer that selects one of the first and second pulse signals and outputs a selected signal to the first counter as a first output signal (paragraphs 0014-0017, and figure 1: 106A), and a second multiplexer that selects one of the first carry flag and the second pulse signal and outputs a selected one to the second counter as a second output signal (paragraphs 0014-0017, and figure 1: 106B), wherein the first counter counts in synchronization with the first output signal (paragraphs 0015-0016, and figure 1: 106A, 104A), and the second counter counts in synchronization with the second output signal (paragraphs 0015-0016, and figure 1: 106B, 104B).
In regard to claim 16, note Ikuta discloses a first logic gate that outputs a result of a logic operation on the first and second pulse signals as a first operation result (paragraph 0011, and figure 1: 105), a first multiplexer that selects one of a plurality of signals including the first pulse signal and the first operation result and outputs a selected one to the first counter as a first output signal (paragraphs 0015-0017, and figure 1: 105, 106A; when the multiplexer control is “0”, the first multiplexer outputs PLS_A from the first sensor, and when multiplexer control is “1”, the first multiplexer outputs the results of the output of the OR gate 105), and a second multiplexer that selects one of the first carry flag and the second pulse signal and outputs a selected one to the second counter as a second output signal (paragraphs 0015-0017, and figure 1: 106B; when the multiplexer control is “0”, the second multiplexer outputs PLS_B from the second sensor, and when multiplexer control is “1”, the second multiplexer outputs the carry signal), wherein the first counter counts in synchronization with the first output signal (paragraphs 0015-0016, and figure 1: 106A, 104A), and the second counter counts in synchronization with the second output signal (paragraphs 0015-0016, and figure 1: 106B, 104B).
In regard to claim 21, note Ikuta discloses a control circuit that controls a plurality of pixels (paragraph 0030, and figure 5: 503, 504), wherein the first sensor unit is arranged in one of first and second pixels among the plurality of pixels, and the second sensor unit is arranged in another pixel (figure 1: 101A-103A, and 101B-103B; the first and second sensors are considered to correspond to different pixels), and the control circuit controls some of the plurality of pixels to generate a pulse signal (paragraph 0030, and figure 5: 503, 504).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Ikuta (JP 2020-145502 A), in view of Yasuda et al. (US Pub. 2020/0252563).
In regard to claim 6, note Ikuta discloses the photodetection device, as discussed with respect to claim 1 above. Therefore, it can be seen that the primary reference fails to explicitly disclose that the first sensor unit is arranged in one of first and second pixels of a same color among a plurality of pixels arranged in a pixel array unit, and the second sensor unit is arranged in another pixel.
In analogous art, Yasuda discloses an imaging device that includes a first sensor unit that is arranged in one of first and second pixels of a same color among a plurality of pixels arranged in a pixel array unit, and a second sensor unit is arranged in another pixel (paragraphs , and figures 18-19: 2101A, 2101B; a first sensor is included in a first pixel 2101A, and the second sensor is included in second pixel 2101B, and where the pixels are of a same color). Yasuda teaches that the use of a first sensor unit that is arranged in one of first and second pixels of a same color among a plurality of pixels arranged in a pixel array unit, and a second sensor unit is arranged in another pixel is preferred in order to allow the imaging device to be used to for pupil-division focus detection and control (paragraph 0165-0166). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the primary reference such that the first sensor unit is arranged in one of first and second pixels of a same color among a plurality of pixels arranged in a pixel array unit, and the second sensor unit is arranged in another pixel, in order to allow the imaging device to be used to for pupil-division focus detection and control, as suggested by Yasuda.
In regard to claim 7, note Yasuda discloses a microlens that guides incident light to a plurality of pixels of a same color including the first and second pixels (paragraph 0165, and figure 19: 2301).
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Ikuta (JP 2020-145502 A), in view of Ikeda (US Pub. 2020/0213542).
In regard to claim 20, note Ikuta discloses the photodetection device, as discussed with respect to claim 1 above. Therefore, it can be seen that the primary reference fails to explicitly disclose that a part of the first sensor unit and a part of the second sensor unit are arranged on a predetermined pixel chip, and a rest of the first sensor unit, a rest of the second sensor unit, and the first and second counters are arranged on a predetermined circuit chip.
In analogous art, Ikeda discloses an imaging device in which a part of a first sensor unit and a part of a second sensor unit are arranged on a predetermined pixel chip, and a rest of the first sensor unit, a rest of the second sensor unit, and a first and second counters are arranged on a predetermined circuit chip (paragraph 0036, 0042, 0054-0055, and figure 2-4: 10, 20, 101, 102; the first chip 10 includes the sensors, and the second chip 20 includes the counters). Ikeda teaches that the use of a part of the first sensor unit and a part of the second sensor unit are arranged on a predetermined pixel chip, and a rest of the first sensor unit, a rest of the second sensor unit, and the first and second counters are arranged on a predetermined circuit chip is preferred in order to prevent an increase in the area of the photo-detection device in a plan view while realizing an increase in the speed or an increase in the size of a counter circuit (paragraph 0055). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to modify the primary reference such that a part of the first sensor unit and a part of the second sensor unit are arranged on a predetermined pixel chip, and a rest of the first sensor unit, a rest of the second sensor unit, and the first and second counters are arranged on a predetermined circuit chip, in order to prevent an increase in the area of the photo-detection device in a plan view while realizing an increase in the speed or an increase in the size of a counter circuit, as suggested by Ikeda.
Allowable Subject Matter
Claims 3-5, 8-15, 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISS S YODER III whose telephone number is (571)272-7323. The examiner can normally be reached M-F 9:00-5:00 PM.
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/CHRISS S YODER III/Examiner, Art Unit 2638