DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Status
Claim 9 has been cancelled. Claims 11 and 12 are newly added. Claims 1-8 and 10-12 are currently pending.
Response to Arguments
Applicant’s arguments with respect to claim(s) rejected in the official action dated 02/26/2026 have been considered but are moot because the new ground of rejection does not rely on the same combination of references applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 8 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over KITAGAWA (US Pub. 2009/0039833) in view of KIM (US 2022/0166441).
Regarding claims 1, 8 and 10,
KITAGAWA teaches the inventive concept recited in independent claims 1, 8 and 10, characterized by an identification information receiving device that receives identification information defined by a plurality of bits from an identification information transmitting device connected to the identification information receiving device via a power line (the “Abstract” teaches a battery pack (1) with control means (3) which reads identification information or operating state detection information out of identification information memory means (4) or battery operating state detection means (10) and inputs it to a modulation circuit (5). The modulation circuit (5) modulates the information into an information signal which can be superimposed on a direct-current power transmission line and sends it to a charging device (20) or a loading device (30) through a positive charge and discharge terminal (11); [0057] teaches that modulation circuit 5 subjects carrier waves with digital information (being the identification information or the operating state detection information) output from the control means 3 and sends it on the direct-current power transmission line as the identification signal or the operating state detection signal).
[0057] teaches taking the identification signal or the operating state detection signal out of the direct-current power transmission line by the demodulation circuit 24 or 34. After the identification signal or the operating state detection signal is separated into the two carrier waves and the waves are detected, composing the two carrier waves makes it possible to demodulate the identification signal or the operating state detection signal into the digital information of the identification information or the operating state detection information. [0060] teaches information signal receiving means 62 which can take out the pulse-modulated identification information by the ON/OFF state of the charging current detected by the current detecting element 61. The “ON” current corresponds to one of an ON/OFF state and “OFF” corresponds to the other of an ON/OFF state, thus the system converts the detected ON/OFF pulse states into corresponding binary values representing the transmitted identification values.
Kitagawa fails to expressly teach that the identification information receiving device comprises the recited structure.
KIM teaches an integration circuit that integrates, as an input signal, a series of voltage values reflecting a binary value of the identification information that is superimposed on a current or a voltage of the power line by the identification signal transmitter ([0036] teaches an integrator 110; [0012] teaches an integrator converting an input current to a voltage; [0014] teaches that the integrator may output a feedback voltage that accumulates the difference value between the input current and the feedback current);
a subtraction circuit that subtracts an output signal of the integration circuit from the input signal ([0012] and [0050] teach calculating the digital information output based on a difference value between the input current and the feedback current for each sampling time); and
a binary converter that determines an output signal of the subtraction circuit as one when the output signal of the subtraction circuit is greater than or equal to a threshold value, and determines zero when the output signal of the subtraction circuit is less than the threshold value, to obtain the binary value of the identification information from the output signal of the subtraction circuit ([0036] teaches a quantizer 120; [0053] teaches that the quantizer 120 may output digital information corresponding to the feedback voltage and a threshold value may be determined based on a voltage readable by the quantizer 120.)
Before the effective filing date of the inventio it would have been obvious to modify the system of Kitagawa - which teaches recovering identification information, per the disclosure of Kim - which teaches integrating a received signal, quantizing the integrated signal, using a threshold to generate digital information because using Kim's integration and threshold-based quantization would improve reliability of recovering the transmitted identification data from a noisy voltage signal.
Regarding claim 2,
Kim teaches the identification information receiving device according to claim 1, wherein the binary converter includes a comparison circuit that compares the output signal of the subtraction circuit with the threshold value and outputs a high-level signal or a low-level signal depending on a result of the comparing ([0012], [0042]-[0044] and [0053] teaches comparison circuit as quantizer 120. Kim teaches integrator 110 outputs a feedback voltage corresponding to accumulated difference value and quantizer 120 outputs digital information corresponding thereto. Kim discloses that a threshold value may be determined based on a voltage readable by the quantizer thereby teaching comparison of the integrator output voltage with a threshold ([0042]-[0044] and [0053]) and outputting digital information i.e., high-level or low-level digital signal as broadly recited, depending on the result of the comparison ([0019], [0053]).
Claim(s) 4, 11 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over KITAGAWA (US Pub. 2009/0039833) in view of KIM (US 2022/0166441) and further in view of TAKEDA (US Pub. 2015/0333550).
Regarding claim 4,
Kitagawa as modified by Kim teaches the device/method disclosed but fails to teach the further features of claims 4, 11 and 12.
TAKEDA teaches that the integration circuit includes a low-pass filter, and a time constant of the low-pass filter includes a cutoff frequency is at most 1/10 of a clock frequency corresponding to a communication speed of the identification information ([0115] teaches “calculator e11 for average current value executes process of calculating average value in a predetermined cycle”; [0117] teaches use of (idc – i_AVE); and [0120] teaches comparing fluctuation relative to average, thus constituting an averaging/integration function. It is important to note that an averaging process over a predetermined cycle is functionally equivalent to a low-pass filtering/integration process; [0115] teaches predetermined cycle averaging. One or ordinary skill in the art would configure the low-pass filter time constant so that the cutoff is less than or equal to 1/10 of the clock frequency to achieve stable detection and control).
Before the effective filing date of the inventio it would have been obvious to further modify the system of Kitagawa as recited by the claims for the purpose of improving rejection of high frequency noise because selecting the low-pass filter cutoff to be below the communication clock allows the receiver to reject high-frequency noise while preserving the lower frequency information.
Allowable Subject Matter
Claims 3, 5, 6 and 7 are objected to as being dependent upon a rejected base claim, but would be all7owable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 3,
The prior art fails to further teach the identification information receiving device according to claim 1, wherein the subtraction circuit includes an operational amplifier including a single power supply, and the input signal is input to a non-inverting input terminal of the operational amplifier, and the output signal of the integration circuit is input to an inverting input terminal of the operational amplifier.
Regarding claim 5,
The prior art fails to further teach that the integration circuit includes a RC circuit and a voltage follower.
Regarding claim 6,
The prior art fails to further teach that an authentication period that includes reception of the identification information ends, a power supply to an active element that is included in each of the integration circuit, the subtraction circuit, and the comparison circuit is blocked.
Regarding claim 7,
The prior art fails to further teach a removable and portable electricity storage pack that serves as the identification information receiving device.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DIONNE PENDLETON whose telephone number is (571)272-7497. The examiner can normally be reached M-F 9a-5pm.
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/DIONNE PENDLETON/Primary Examiner, Art Unit 2689
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