Prosecution Insights
Last updated: July 17, 2026
Application No. 18/867,147

PROBE CARD FOR A TESTING APPARATUS OF ELECTRONIC DEVICES AND CORRESPONDING SPACE TRANSFORMER

Non-Final OA §102§103
Filed
Nov 19, 2024
Priority
May 25, 2022 — IT 102022000010940 +1 more
Examiner
PRETLOW, DEMETRIUS R
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Technoprobe S P A
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
9m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
604 granted / 696 resolved
+18.8% vs TC avg
Moderate +8% lift
Without
With
+7.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
28 currently pending
Career history
735
Total Applications
across all art units

Statute-Specific Performance

§101
3.5%
-36.5% vs TC avg
§103
71.3%
+31.3% vs TC avg
§102
4.7%
-35.3% vs TC avg
§112
18.9%
-21.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 696 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, 4, 6, 11, 12 , 13, 14,15 and 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wu et al. (US 20130069686). Regarding claim 1, Wu et al. teach A probe card (Fig.3) configured to be mounted in a testing apparatus of electronic devices, comprising: a probe head (35, par. 0021) that houses a plurality of contact probes (362,par. 0033, Fig. 3) each contact probe having a first end portion configured to abut onto contact pads of a device under test, (suggested by [0022] Each probing area 36 comprises a plurality of probes 362, and the probe head 35 is fixed by the cage 31. One end of the probe 362 is electrically contacted with the space transformer 34, and the other end of the probe 362 is in contact with a DUT (not illustrated).) a main board (38, Fig. 3), and an intermediate board (34, par. 0021, Fig. 3), connected to said main board (0038) and configured to provide a distance spatial transformation between contact pads made on opposite faces thereof, said intermediate board being a space transformer, wherein characterized in that said space transformer comprises a plurality of modules (34, Fig. 3) that are plate-shaped and coplanar, structurally and functionally independent from each other, each module having a first face (bottom surface) and facing towards said probe head provided with a first plurality of contact pads (Note annotated Fig. 3 below) whereonto respective second end portions of said contact probes abut and a second face (top surface), opposite said first face and facing towards said main board, said second face being provided in turn with a second plurality of contact pads (Note connections on top surface of 34 for the solder is interpreted as pads, Fig. 3) connected to said first plurality of contact pads by means of electrical connections made inside said module,(Note the passing of current between solder 341 to the indicated connection in Fig. 3 above would suggest an electrical connections passing through modules 34) and wherein said space transformer comprises a connecting structure (Note Fig. 3 below) made in correspondence of said second faces of said modules, said modules having a same thickness. (Note the actual solder in Fig. 3 is considered the connecting structure) PNG media_image1.png 516 640 media_image1.png Greyscale Regarding claim 2, Wu et al. teach wherein said connecting structure of said space transformer comprises a plurality of connecting areas (Note left and right areas of connecting structure in Fig. 3 above), each of said connecting areas being made in correspondence of a second face of one of said modules. . Regarding claim 4, Wu et al. teach wherein said connecting structure integrally connects said modules of said space transformer to said main board in correspondence of a face thereof facing towards said probe head. (Note solder in Fig. 3 above) Regarding claim 6, Wu et al. teach space transformer further comprises a support (Note 32, Fig. 3) and wherein the connecting structure integrally connects said modules of said space transformer to said support in correspondence of a face thereof facing towards said probe head, said support being in turn integrally connected to said main board. Regarding claim 11, Wu et al. teach wherein each connecting area is selected from a group consisting of: a single area, and a plurality of connecting areas that are distinct from each other and arranged on said second face of said modules. (Note connecting areas are interpreted as the left and right side of the solder balls in at least Fig. 3) Regarding claim 12, Wu et al. teach wherein each of said modules has a plate-like shape, selected from the group consisting of a prismatic shape with a rectangular base and a prismatic shape with a hexagonal base. (Note 34, rectangular prism shape) Regarding claim 13, Wu et al. teach wherein each of said modules comprises a multilayer. (Note modules 34 contain a top layer and bottom layer) Regarding claim 14, Wu et al. teach A space transformer configured to be inserted into a probe card for a testing apparatus of electronic devices, comprising: a plurality of modules (34, Fig. 3) that are plate-shaped and coplanar, structurally and functionally independent from each other, each module having a first face (bottom surface) provided with a first plurality of contact pads (Note annotated Fig. 3 above) and a second face (top surface), opposite said first face, said second face being provided in turn with a second plurality of contact pads (Note connections on top surface of 34 for the solder is interpreted as pads, Fig. 3) connected to said first plurality of contact pads by means of electrical connections made inside said module, ,(Note the passing of current between solder 341 to the indicated connection in Fig. 3 above would suggest a electrical connections passing through modules 34) and a connecting structure (Note Fig. 3 above)made in correspondence of said second faces of said modules, (Note the actual solder in Fig. 3 is considered the connecting structure)said modules having a same thickness. Regarding claim 15, Wu et al. teach wherein said connecting structure comprises a plurality of connecting areas, (Note left and right areas of connecting structure in Fig. 3 above) each of said connecting areas being made at a second face of one of said modules. Regarding claim 17, Wu et al. teach a support, (Note 32 Fig. 3) said connecting structure integrally connecting said modules to said support in correspondence of a face thereof. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 5 , 7 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Wu et al. (US 20130069686). Regarding claim 5, Wu et al. teach wherein said face of said main board (38, Fig. 3) which said modules are integrally connected to has a surface roughness of less than 5 microns. Wu et al. is silent on the surface roughness of less than 5 microns. It would have been obvious to one of ordinary skill in the art at before the effective filing date to change the surface roughness to be less than 5 microns since it has been held where the where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation (In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)). One would be motivated to make such a modification in order to account for signal integrity that is related to surface roughness. Regarding claim 7,Wu et al. teach wherein said face of said support (32) which said modules are integrally connected to has a surface roughness of less than 5 microns. Wu et al. is silent on the surface roughness of less than 5 microns. It would have been obvious to one of ordinary skill in the art at before the effective filing date to change the surface roughness to be less than 5 microns since it has been held where the where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation (In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)). One would be motivated to make such a modification in order to account for signal integrity that is related to surface roughness. Regarding claim 18, Wu et al. teach wherein said face of said support which said modules are integrally connected to has a surface roughness having a value selected from the group consisting of less than 5 microns, and less than 1 micron. Wu et al. is silent on the surface roughness of less than 5 microns , and less than 1 micron. It would have been obvious to one of ordinary skill in the art at before the effective filing date to change the surface roughness to be less than 5 microns and less than 1 micron since it has been held where the where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation (In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)). One would be motivated to make such a modification in order to account for signal integrity that is related to surface roughness. Claims 3 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Wu et al. (US 20130069686) in view of Eldridge et al. (US 7459795). Wu et al. teach the instant invention except the following claim limitations. Regarding claim 3, Wu et al. does not teach wherein each connecting area comprises an item selected from the group consisting of: a welding, an adhesive film, an adhesive glue, a conductive adhesive film and a conductive adhesive glue. Eldridge et al. teach wherein each connecting area comprises an item selected from a the group consisting of: a welding, an adhesive film, an adhesive glue, a conductive adhesive film and a conductive adhesive glue. (Note column 6, lines 66 -67 and column 7, lines 1-3) Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Wu et al.to include the teaching of each connecting area comprises an item selected from a group consisting of: a welding, an adhesive film, an adhesive glue, a conductive adhesive film and a conductive adhesive glue to stabilize the substrates. Regarding claim 16, Wu et al. does not teach wherein each connecting area comprises an item selected from the group consisting of a welding, an adhesive film, an adhesive glue, a conductive adhesive film, and a conductive adhesive glue. Eldridge et al. teach wherein each connecting area comprises an item selected from a the group consisting of: a welding, an adhesive film, an adhesive glue, a conductive adhesive film and a conductive adhesive glue. (Note column 6, lines 66 -67 and column 7, lines 1-3) Therefore it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Wu et al.to include the teaching of each connecting area comprises an item selected from a group consisting of: a welding, an adhesive film, an adhesive glue, a conductive adhesive film and a conductive adhesive glue to stabilize the substrates. Prior Art: Breinlinger et al. (US 7960989) teach the wiring substrate can be disposed between the frame and the stiffener structure, and probe substrates can be coupled to the frame by one or more non-adjustably fixed coupling mechanisms. Each of the probe substrates can have probes that are electrically connected through the probe card assembly to an electrical interface on the wiring substrate to a test controller. Breinlinger et al. does not teach the limitations above. Allowable Subject Matter Claims 8-10 and 19-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 8, wherein said space transformer further comprises a plurality of separator elements that are coplanar to said modules, said separator elements being interposed and interspersed with said modules in a checkerboard configuration, each of said separator elements separating a pair of said modules. Regarding claim 19, comprising a plurality of separator elements that are coplanar to said modules, said separator elements being interposed and interspersed with said modules in a checkerboard configuration, each of said separator elements separating a pair of said modules. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DEMETRIUS R PRETLOW whose telephone number is (571)272-3441. The examiner can normally be reached M-F, 5:30-1:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lee Rodak can be reached at 571-270-5628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DEMETRIUS R PRETLOW/Examiner, Art Unit 2858 /LEE E RODAK/Supervisory Patent Examiner, Art Unit 2858
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Prosecution Timeline

Nov 19, 2024
Application Filed
Jun 23, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
95%
With Interview (+7.8%)
2y 5m (~9m remaining)
Median Time to Grant
Low
PTA Risk
Based on 696 resolved cases by this examiner. Grant probability derived from career allowance rate.

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