DETAILED ACTION
This Office action is in response to an application filed on 19 November 2024.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Drawings
The drawings were submitted on 19 November 2024. These drawings are acceptable.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3, 5; 8-9 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Zhang et al (US 11,641,165 B2; hereinafter “Zhang”) with a filing date of 30 Sep. 2020.
In re claim 1, Zhang discloses a method (Figs. 3-6, 8-11) of dynamically switching during a switching cycle of a primary switch (S1) in a power converter, the method comprising: initiating the switching cycle by closing the primary switch (Col 7 Lines 7-8: At the start of a switching cycle Tsw, the primary switch S1 is turned on at T1); receiving a forward pin voltage at a forward pin node (Vin, VDS2/Isec); opening the primary switch (Col 7 Lines 39-40: The primary switch S1 is turned off at T2); receiving a select output voltage (Vout); determining an idle ring period (Col 7 Lines 2-3: τ.sub.res is the resonance time constant of ringing between L.sub.m and C.sub.oss1.); calculating (Equations found in Col 14) a hold duration (tON2) in relation to the forward pin voltage (Vin), the select output voltage (Vo), and the idle ring period (τ.sub.res); and closing a secondary switch (S2) for the hold duration (Col 8 Lines 37-40: The secondary switch is turned on again at T5. To accomplish zero voltage switching, When the secondary switch is turned on again for a second-on time interval T.sub.ON2).
In re claim 2, Zhang discloses a method (see rejection above), wherein the secondary switch is a synchronous rectifier (Col 9 Lines 48-51: The secondary switch S2 may be controlled by the control voltage Vgs2 to synchronize conduction of a secondary current Isec flowing in the secondary transformer winding).
In re claim 3, Zhang discloses a method (see rejections above), wherein the secondary switch is an auxiliary N- channel field effect transistor (NFET) (Col 4 Lines 53- 56: The secondary switch S2 may be constructed with a transistor Q2. Both transistors Q1 and Q2 may be NMOS transistors, PMOS transistor or HEMT (High electron mobility transistor)).
In re claim 5, Zhang discloses a method (see rejections above), wherein the power converter is a flyback converter (Abstract: The subject application provides a zero-voltage switching flyback converter).
In re claim 8, Zhang discloses a method (see rejections above), comprising:
determining the idle ring period using a comparator (116, 112, or 122).
In re claim 9, Zhang discloses a method (see rejections above), comprising: determining an open ring duration in relation to the idle ring period; and completing the switching cycle after the open ring duration (Col 12 Lines 50-57: When the secondary switch is turned on again for a second-on time interval t.sub.ON2 a negative current ripple is induced in the secondary current such that resonance energy is built up in the transformer over the second-on time interval t.sub.ON2 and used to drive down the drain-to-source voltage Vds1 on the primary switch before the primary switch is turned on to start another switching cycle. ).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over by Zhang et al (US 11,641,165 B2; hereinafter “Zhang”) and Li et al. (US 2022/0140735 A1; hereinafter “Li”).
In re claim 4, Zhang discloses a method (see rejections above) and a secondary switch.
Zhang does not disclose, wherein the secondary switch is an auxiliary bipolar junction transistor (BJT).
Whereas, Li discloses a similar method (Fig. 1), wherein the secondary switch is an auxiliary bipolar junction transistor (BJT) ([0016]: In alternative embodiments, other type of power switch transistors may be used such as GaN power switch transistor or a bipolar junction power switch transistor).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the effective filing date of the claimed invention to have modified the second switch of Zhang such that the second switch is an auxiliary bipolar junction transistor (BJT) as shown by Li. The selection to modify the second switch would be a routine matter to the person of ordinary skill to increase robustness and sensitivity, as taught by Li, cited above.
Claims 6, 7, 11-27 are rejected under 35 U.S.C. 103 as being unpatentable over by Zhang et al (US 11,641,165 B2; hereinafter “Zhang”) and Moore et al. (US 2020/0313561 A1; hereinafter “Moore”).
In re claim 6, Zhang discloses a method (see rejections above) , wherein the power converter is a output flyback converter.
Zhang does not disclose a method, wherein the power converter is a multiple output flyback converter.
Whereas, Moore discloses a similar method (Fig. 1B), wherein the power converter is a multiple output flyback converter.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the effective filing date of the claimed invention to have modified the apparatus of Zhang such “the power converter is a multiple output flyback converter” as shown by Moore. The selection to modify the apparatus would be a routine matter to the person of ordinary skill to increase efficiency and be more compact, as taught by Moore, cited above.
In re claim 7, Zhang discloses a method (see rejections above).
Zhang does not disclose, wherein transferring energy to a select output to sustain the select output voltage.
Whereas, Moore discloses a similar method (Fig. 1b), wherein transferring energy to a select output to sustain the select output voltage (VO1-3).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the effective filing date of the claimed invention to have modified the apparatus of Zhang such that “transferring energy to a select output to sustain the select output voltage” as shown by Moore. The selection to modify the second switch would be a routine matter to the person of ordinary skill to increase optimization, as taught by Moore, cited above.
In re claim 11, Zhang discloses a power converter (Figs. 3-6, 8-11) comprising: an energy transfer element (Lm) comprising a primary winding (W1) configured to receive energy from a first power supply (Vin) and at least one secondary winding configured to transfer energy to output (Vo); a primary switch (S1) electrically coupled to the primary winding and configured to switch according to a switching cycle (Col 7 Lines 7-8: At the start of a switching cycle Tsw, the primary switch S1 is turned on at T1); a secondary controller (22) comprising: an idle ring period calculator configured to calculate an idle ring period (Col 7 Lines 2-3: τ.sub.res is the resonance time constant of ringing between L.sub.m and C.sub.oss1.) during the switching cycle; and a zero voltage switching (ZVS) calculator configured to calculate (Equations found in Col 14) a hold duration (tON2) based, at least in part, upon the idle ring period (τ.sub.res); and a secondary switch (S2) electrically coupled to the at least one secondary winding (W2) and configured to close for the hold duration in response to a control signal from the secondary controller (Col 8 Lines 37-40: The secondary switch is turned on again at T5. To accomplish zero voltage switching, When the secondary switch is turned on again for a second-on time interval T.sub.ON2).
Zhang does not disclose, wherein transferring energy to a select output to sustain the select output voltage.
Whereas, Moore discloses a similar method (Fig. 1b), wherein the power converter is a multiple output converter and wherein transferring energy to a select output to sustain the select output voltage (VO1-3).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the effective filing date of the claimed invention to have modified the apparatus of Zhang such that “the power converter is a multiple output converter and wherein transferring energy to a select output to sustain the select output voltage” as shown by Moore. The selection to modify the apparatus would be a routine matter to the person of ordinary skill to increase optimization, efficiency, and be more compact, as taught by Moore, cited above.
Claim 12 recites substantially similar limitations as claim 6, therefore, will be rejected under the same rationale as claim 6.
In re claim 13, Zhang discloses a power converter (see rejections above.
Zhang does not disclose a multiple output power converter, wherein the select output is a constant current (CC) output.
Whereas, Moore discloses a multiple output power converter (Fig. 2B), wherein the select output is a constant current (CC) output ([0003]: the regulated dc power outputs are regulated constant current (CC) outputs and/or regulated constant voltage (CV) outputs).
In re claim 14, Zhang discloses a power converter (see rejections above.
Zhang does not disclose a multiple output power converter, wherein the select output is a constant voltage (CV) output.
Whereas, Moore discloses a multiple output power converter (Fig. 2B), wherein the select output is a constant voltage (CV) output ([0003]: the regulated dc power outputs are regulated constant current (CC) outputs and/or regulated constant voltage (CV) outputs).
In re claim 15, Zhang discloses a power converter (see rejections above), wherein the idle ring period depends, at least in part, upon a primary capacitance and a primary inductance (Col 10 Lines 63-64: τ.sub.res is the resonance time constant of ringing between L.sub.m and C.sub.oss1V.sub.in is the input voltage).
Zhang does not disclose a multiple output power converter
Whereas, Moore discloses a similar method (Fig. 1B), wherein the power converter is a multiple output converter.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the effective filing date of the claimed invention to have modified the apparatus of Zhang such “the power converter is a multiple output converter” as shown by Moore. The selection to modify the apparatus would be a routine matter to the person of ordinary skill to increase efficiency and be more compact, as taught by Moore, cited above.
In re claim 16, Zhang discloses a power converter (see rejections above), wherein the select output is configured to provide a select output voltage, and wherein the hold duration depends, at least in part, upon the select output voltage (Col 10 Equation).
Zhang does disclose not a multiple output power converter.
Whereas, Moore discloses a similar method (Fig. 1B), wherein the power converter is a multiple output converter.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the effective filing date of the claimed invention to have modified the apparatus of Zhang such “the power converter is a multiple output converter” as shown by Moore. The selection to modify the apparatus would be a routine matter to the person of ordinary skill to increase efficiency and be more compact, as taught by Moore, cited above.
Claim 17 recites substantially similar limitations as claim 2, therefore, will be rejected under the same rationale as claims 2 and 11.
Claim 18 recites substantially similar limitations as claim 3, therefore, will be rejected under the same rationale as claims 3 and 11.
In re claim 19, Zhang discloses a power converter (see rejections above and Fig. 4), further comprising: a diode (D2), connected in parallel with and separate from the auxiliary NFET (S2).
Zhang does disclose not a multiple output power converter.
Whereas, Moore discloses a similar method (Fig. 1B), wherein the power converter is a multiple output converter.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the effective filing date of the claimed invention to have modified the apparatus of Zhang such “the power converter is a multiple output converter” as shown by Moore. The selection to modify the apparatus would be a routine matter to the person of ordinary skill to increase efficiency and be more compact, as taught by Moore, cited above.
In re claim 20, Zhang discloses a power converter system (Figs. 3-6, 8-11) comprising: a primary switch (S1) electrically coupled to a primary winding (W1) and configured to switch during a first switching cycle (Col 7 Lines 7-8: At the start of a switching cycle Tsw, the primary switch S1 is turned on at T1); an output configured to provide a select output voltage (Vout) during the first switching cycle (Fig. 6); a forward pin node (Vin, VDS2/Isec) electrically coupled to a secondary winding (W2) and configured to provide a forward pin voltage; a secondary switch (S2) electrically coupled to the forward pin node and configured to conduct current during a hold duration of the first switching cycle (Col 8 Lines 37-40: The secondary switch is turned on again at T5. To accomplish zero voltage switching, When the secondary switch is turned on again for a second-on time interval T.sub.ON2); and a secondary controller (22) comprising: an idle ring period calculator (Equations found in Col 14) configured to provide an idle ring period (τ.sub.res) of the first switching cycle; and a zero voltage switching (ZVS) calculator configured to calculate the hold duration in relation to the idle ring period of the first switching cycle such that the primary switch undergoes zero voltage switching during a second switching cycle (Figs. 6 and 11).
Zhang does not disclose, wherein transferring energy to a select output to sustain the select output voltage.
Whereas, Moore discloses a similar method (Fig. 1b), wherein the power converter is a multiple output converter and wherein transferring energy to a select output to sustain the select output voltage (VO1-3).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the effective filing date of the claimed invention to have modified the apparatus of Zhang such that “the power converter is a multiple output converter and wherein transferring energy to a select output to sustain the select output voltage” as shown by Moore. The selection to modify the apparatus would be a routine matter to the person of ordinary skill to increase optimization, efficiency, and be more compact, as taught by Moore, cited above.
Claim 21 recites substantially similar limitations as claim 17, therefore, will be rejected under the same rationale as claim 17.
Claim 22 recites substantially similar limitations as claim 18, therefore, will be rejected under the same rationale as claim 12.
Claim 23 recites substantially similar limitations as claim 18, therefore, will be rejected under the same rationale as claim 18.
Claim 24 recites substantially similar limitations as claim 13, therefore, will be rejected under the same rationale as claim 13.
Claim 25 recites substantially similar limitations as claim 14, therefore, will be rejected under the same rationale as claim 14.
In re claim 26, Zhang discloses a power converter system (see rejections above).
Zhang does not disclose a multiple output power converter system wherein the secondary controller further comprises: a sample and hold circuit configured to sample a value of the forward pin voltage while the primary switch operates in an on state.
Whereas, Moore discloses a multiple output power converter system (Figs 1B, 3A; 5) wherein the secondary controller further comprises: a sample and hold circuit configured to sample a value of the forward pin voltage while the primary switch operates in an on state ([0074]: sampling of the forward pin signal Vfwd. Again with reference to FIG. 3A, the slave subsystem block 250 and/or the secondary control block 256 may receive the forward pin signal Vfwd, and based upon a characteristic and/or condition).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the effective filing date of the claimed invention to have modified the apparatus of Zhang such that “a multiple output power converter system wherein the secondary controller further comprises: a sample and hold circuit configured to sample a value of the forward pin voltage while the primary switch operates in an on state” as shown by Moore. The selection to modify the apparatus would be a routine matter to the person of ordinary skill to increase optimization, efficiency, and control, as taught by Moore, cited above.
In re claim 27, Zhang discloses a power converter system (see rejections above), wherein the ZVS calculator is further configured to calculate the hold duration (equations on Col) in relation to the select output voltage (Vo) and the value of the forward pin voltage (Vin) such that the primary switch undergoes zero voltage switching during the second switching cycle (Col 8 Lines 37-40: The secondary switch is turned on again at T5. To accomplish zero voltage switching, When the secondary switch is turned on again for a second-on time interval T.sub.ON2).
Zhang does disclose not a multiple output power converter.
Whereas, Moore discloses a similar method (Fig. 1B), wherein the power converter is a multiple output converter.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the effective filing date of the claimed invention to have modified the apparatus of Zhang such “the power converter is a multiple output converter” as shown by Moore. The selection to modify the apparatus would be a routine matter to the person of ordinary skill to increase efficiency and be more compact, as taught by Moore, cited above.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over by Zhang et al (US 11,641,165 B2; hereinafter “Zhang”) and Lin. (US 2020/0280263 A1; hereinafter “Lin”).
In re claim 10, Zhang discloses a method (see rejections above).
Zhang does not disclose, wherein the open ring duration is substantially equal to one fourth of the idle ring period.
Whereas, Lin discloses a similar method (Fig. 2A-3), wherein the open ring duration is substantially equal to one fourth of the idle ring period ([0050]: as shown in FIG. 3, under a steady state, the predetermined time difference can be, for example but not limited to, about one-fourth (i.e., ¼) of a ringing period plus the predetermined ZVS time period T_ZVS).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the effective filing date of the claimed invention to have modified the apparatus of Zhang such that “the open ring duration is substantially equal to one fourth of the idle ring period” as shown by Lin. The selection to modify the open ring duration would be a routine matter to the person of ordinary skill to increase optimization, as taught by Lin, cited above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure:
Tian et al. WO 2021/183882 A2 MODE OPERATION DETECTION FOR CONTROL OF A POWER CONVERTER WITH AN ACTIVE CLAMP SWITCH
Lin et al. US 2018/0301975 A1 FLYBACK POWER CONVERTER CIRCUIT WITH ACTIVE CLAMPING AND ZERO VOLTAGE SWITCHING AND CONVERSION CONTROL CIRCUIT THEREOF
Chang et al. US 9,899,931 B1 Zero Voltage Switching Flyback Converter For Primary Switch Turn-off Transitions
Chang et al. US 9,998,021 B2 Forced Zero Voltage Switching Flyback Converter
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Nicolas A Chapa Mills whose telephone number is (571)272-3683. The examiner can normally be reached Mon-Fri 9am-6pm.
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/NICOLAS ALDEN CHAPA MILLS/ Examiner, Art Unit 2838
/CRYSTAL L HAMMOND/ Supervisory Primary Examiner, Art Unit 2838
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