DETAILED ACTION
Allowable Subject Matter
Claims 2-8, 13-23 and 27 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 1 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Zhao (US Pub: 2022/0230592 A1).
As to claim 1, Zhao discloses a pixel circuit (i.e. the figure 3 embodiment of Zhao shows a pixel circuit) (see Fig. 3, [0035]), comprising a driving circuit (i.e. the driving circuity is the element 150 and 160 which applies the Vdd driving voltage to the OLED device 140) (see Fig. 1-3, [0031-0035]), a light emitting element (i.e. the light emitting element 140 OLED) (see Fig. 3), an energy storage circuit (i.e. the storage circuit is the Cst capacitor) (see Fig. 3, [0035]) and a data writing-in circuit (i.e. the element 110 is the data writing-in circuit which allows the Vdata data terminal signal to allow the writing of instruction of the display pixel) (see Fig. 1-3, [0031]);
a control terminal of the driving circuit is electrically connected to a first node (i.e. the control terminal is connected electrically to the first node to the Cst capacitor) (see Fig. 3), and the driving circuit is configured to generate a driving current to drive the light emitting element under the control of a potential of the first node (i.e. the transistor 150 is shown to create current to the 140 OLED via the transistor 160) (see Fig. 3, [0031-0035]);
a first terminal of the energy storage circuit is electrically connected to the first node (i.e. the Cst has a terminal that is connected to the first node and transistor 150) (see Fig. 3), a second terminal of the energy storage circuit is electrically connected to a second node (i.e. the Cst energy storage capacitor connects at a second node to the T2 transistor), and the energy storage circuit is configured to store electrical energy (i.e. the Cst is a capacitor that stores electrical energy) (see Fig. 3, [0031-0035]);
the data writing-in circuit is electrically connected to a writing-in control terminal and a writing-in node respectively (i.e. the element 110 is connected to the writing-in control terminal Frist scan signal terminal Scan1) (see Fig. 3), and is configured to sequentially provide a display data voltage and a light emitting time control data voltage to the writing-in node under the control of a writing-in control signal provided by the writing-in control terminal (i.e. the figure 3 embodiment shows that the digital circuitry of Zhao provide display data voltage Vdata which sequentially controls timing control Scan 1 to the node 2 to create writing-in control by the writing-in control terminal) (see Fig. 3, [0031-0035]); the writing-in node is the second node (i.e. the second node at T2 is the writing-in node as it applies writing control from the data writing module 110) (see Fig 1, [0031-0035]);
or, the pixel circuit also includes a switch control circuit; the switch control circuit is electrically connected to a switch control terminal, the driving circuit and the light emitting element, respectively, and is configured to control the connection between the driving circuit and the light emitting element under the control of a potential of the switch control terminal; the writing-in node includes a first writing-in node and a second writing-in node; the first writing-in node is the second node, and the second writing- in node is electrically connected to the switch control terminal. (i.e. after analyzing the claim structures of claim 1, the examiner analyzed the last part of claim 1 after the “or” modifier as optional element non-limiting in the broadest reasonably interpretation of the claim language).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The prior art Liu et al. (US Patent 11,721,261 B2) is cited to teach another type of display driving circuitry for pixel control having different modes of operation as seen in figure 1-3 embodiments. The prior art Gao et al. (US Pub: 2021/0241672 A1) is cited to teach another type of pixel writing circuitry with transistor control in figures 1-6 embodiment.
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/CALVIN C MA/Primary Examiner, Art Unit 2693 September 4, 2026
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