Prosecution Insights
Last updated: July 17, 2026
Application No. 18/868,133

ANALOG-TO-DIGITAL CONVERTER AND CASCADED ANALOG-TO-DIGITAL CONVERTER

Non-Final OA §102§103
Filed
Nov 21, 2024
Priority
May 24, 2022 — DE 102022113150.5 +1 more
Examiner
LAUTURE, JOSEPH J
Art Unit
2845
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
AMS-OSRAM AG
OA Round
1 (Non-Final)
95%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allowance Rate
727 granted / 766 resolved
+26.9% vs TC avg
Minimal +1% lift
Without
With
+0.9%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 8m
Avg Prosecution
9 currently pending
Career history
773
Total Applications
across all art units

Statute-Specific Performance

§101
8.8%
-31.2% vs TC avg
§103
56.0%
+16.0% vs TC avg
§102
13.8%
-26.2% vs TC avg
§112
12.6%
-27.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 766 resolved cases

Office Action

§102 §103
DETAILED ACTION Specification The application has not been checked to the extent necessary to determine the presence of all possible typographical and grammatical errors. Applicant’s cooperation is requested in correcting any errors of which he/she may become aware in the application. The Information Disclosure Statements filed 11/21/2024 has been considered. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 3 and 4 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Ribner et al (US 5,500,645). Regarding claim 1, Ribner et al teach in figure (5A) an analog-to-digital converter configured to convert an analog input signal to a digital output signal, the ADC comprising: an integrator (212) configured to generate an integrated signal based on the input signal X(nt) and subtrahend signals from output signals of (216) and (206); and a quantizer (14) configured to: receive the integrated signal from the integrator, generate the digital output signal; and generate a quantization error/noise signal (See column 10; lines 41-45), wherein the ADC is further configured to, in a feedback loop: provide the integrated signal at combiner (210) and the quantization error signal at combiner (204) as the subtrahend signals to the integrator (212). Regarding claim 3, Ribner et al teach in figure (5A) an analog-to-digital converter wherein the integrator (212) generates the integrated signal by integrating a difference of the analog input signal X (nt) and the subtrahend signals. Regarding claim 4, Ribner et al teach in figure (5A) an analog-to-digital converter (ADC) wherein the ADC is based on a multi-bit sigma- delta quantization (See abstract). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Ribner et al (US 5,500,645). Regarding claim 2, Ribner et al teach the essential features of the claimed invention, as set forth above, except for the quantizer comprising a SAR ADC. However, this limitation is obvious because the choice of a particular type of ADC is a design tradeoff dictated by a target application. Allowable Subject Matter Claims 5-16 are allowable. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSEPH J LAUTURE whose telephone number is (571)272-1805. The examiner can normally be reached 9:30 AM-6:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dameon Levi can be reached at 5712722105. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOSEPH J LAUTURE/Primary Examiner, Art Unit 2845
Read full office action

Prosecution Timeline

Nov 21, 2024
Application Filed
Jun 16, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12683628
DELTA-SIGMA MODULATION APPARATUS, DELTA-SIGMA MODULATION METHOD AND RECORDING MEDIUM
1y 9m to grant Granted Jul 14, 2026
Patent 12676629
SYSTEM AND METHOD OF GENERATING SIGNALS FOR ANALOG-DIGITAL CONVERTER (ADC) CALIBRATION
2y 8m to grant Granted Jul 07, 2026
Patent 12671434
ANALOG-TO-DIGITAL CONVERSION CIRCUIT AND ANALOG-TO-DIGITAL CONVERSION METHOD THEREOF COMBINING SUCCESSIVE APPROXIMATION PROCEDURE AND INITIAL VOLTAGE SCANNING PROCEDURE
1y 8m to grant Granted Jun 30, 2026
Patent 12665609
SIGNAL CONVERTER WITH DELAY ARCHITECTURE FOR CONCURRENT SIGNAL PROCESSING
2y 0m to grant Granted Jun 23, 2026
Patent 12663991
Data Interface Device of Display Apparatus
1y 8m to grant Granted Jun 23, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
95%
Grant Probability
96%
With Interview (+0.9%)
1y 8m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 766 resolved cases by this examiner. Grant probability derived from career allowance rate.

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