Prosecution Insights
Last updated: July 17, 2026
Application No. 18/869,240

DISPLAY SUBSTRATE AND DISPLAY DEVICE

Non-Final OA §103
Filed
Nov 25, 2024
Priority
Jan 03, 2023 — CN 202310004907.4 +2 more
Examiner
AWAD, AMR A
Art Unit
2621
Tech Center
2600 — Communications
Assignee
BOE Technology Group Co., Ltd.
OA Round
2 (Non-Final)
33%
Grant Probability
At Risk
2-3
OA Rounds
1y 3m
Est. Remaining
55%
With Interview

Examiner Intelligence

Grants only 33% of cases
33%
Career Allowance Rate
21 granted / 63 resolved
-28.7% vs TC avg
Strong +21% interview lift
Without
With
+21.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
9 currently pending
Career history
67
Total Applications
across all art units

Statute-Specific Performance

§103
86.6%
+46.6% vs TC avg
§102
6.7%
-33.3% vs TC avg
§112
3.7%
-36.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 63 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1, 6, 10 and 12-15 and 19 are is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang (Chinese publication CN-113178537 provided by applicant and US 2024/0074268 used for the purpose of translation) in view of Zheng et al. (US 2024/0006394; hereinafter referred to as Zheng). As to claim 1, Huang (figures 1-4) teaches A display substrate, comprising: a substrate and a plurality of sub-pixels arranged on the substrate, each sub-pixel of the plurality of sub-pixels comprising a sub-pixel driving circuit and a light-emitting element (111 in fig 18), the display substrate comprising a first display area (12) and a second display area (11) located around the first display area (see figure 1), wherein the first display area is provided with the sub-pixel driving circuit (231 in fig. 13) and the light-emitting element, the second display area is provided with the light-emitting element, at least one sub-pixel in the second display area is smaller than an area of [[the]]an anode of [[the]]a sub-pixel of [[the]]a same color in the first display area (abstract and claim 1). Huang does not specifically teach that the second display area surrounding the first display area and the second display area is not provided with sub pixel driving circuit. Zheng (fig. 1-3) teaches a display substrate that includes first display area (101 and 102) and second display area (103) surrounding the first display area. Wherein the sub-pixel driving circuits are in the first area and is not provided in the second area (substrate; and par. 5). It would have been obvious to one of ordinary skill in the art to include Zheng’s teaching having the driving circuit in the first area but not the second area so as to reduce the needed parts when it’s not needed and relay on the driving in the outer area of the first display area to increase the efficiency of the device. As to claim 6, Huang teaches the display substrate according to claim 1, wherein the plurality of sub-pixels comprises a green sub-pixel, a red sub-pixel and a blue sub-pixel, an area of [[the]]a first anode of a sub-pixel in the first display area is larger than [[the]]an area of [[the]]a first anode of [[the]]a sub-pixel of the same color in the second display area; wherein the first anode is the anode of the green sub-pixel, the red sub-pixel and the blue sub-pixel; or the first anode is the anode of the green sub-pixel (par. 75-77). As to claim 10, Huang teaches the display substrate according to claim 1, wherein a line width of the second conductive trace is greater than a line width of the first conductive trace (fig. 14 and par. 108). As to claim 11, Huang teaches the display substrate according to claim 1, wherein the first conductive trace is transparent, and the second conductive trace is transparent (transparent conductive lines 351 & 352; par. 102). As to claim 12, Huang teaches the display substrate according to claim 1, wherein an orthographic projection area of the first conductive trace connected to the light-emitting element of the sub-pixel with a first luminous color on the substrate is equal to an orthographic projection area of the second conductive trace connected to the light-emitting element of the sub-pixel with the same luminous color on the substrate see the area of the orthographic area of lines 351 & 352 are equal). As to claim 13, Huang teaches the display substrate according to claim 1, wherein a difference between a sum of the areas of the orthographic projections of the anode of the sub-pixel having the first luminous color and the corresponding first conductive trace on the substrate and a sum of the areas of the orthographic projections of the anode of the sub-pixel having the same luminous color and the corresponding second conductive trace on the substrate is within 10% (this is obvious to one of ordinary skill in the art to select any percentage between the two areas as means for “optimization” to achieve the best possible results. As to claim 14, Huang teaches the display substrate according to claim 1, wherein the second display area is provided with a gate driving circuit or a light emitting control circuit (figure 7 and Par. 113). As to claim 1, Huang teaches the display substrate according to claim 1, wherein the display substrate comprises a plurality of power lines, a plurality of light emitting control lines, a plurality of gate lines, a plurality of data lines, a plurality of reset lines, and a plurality of initialization signal lines; the sub-pixel driving circuit comprises: a storage capacitor, a first reset transistor, a data writing transistor, a power control transistor, a light emitting control transistor, a second reset transistor, a driving transistor and a compensation transistor; the compensation transistor comprises an active layer and a gate, the active layer of the compensation transistor comprises a first electrode, a second electrode, and a channel portion connecting the first electrode and the second electrode, the driving transistor comprises an active layer and a gate, the active layer of the driving transistor comprises a first electrode, a second electrode, and a channel portion connecting the first electrode and the second electrode; a first electrode of the compensation transistor is coupled to the second electrode of the driving transistor, and the second electrode of the compensation transistor is coupled to the gate of the driving transistor; the driving transistor is used to drive the light-emitting element to emit light, and the first electrode of the driving transistor is connected to the anode; a gate electrode of the first reset transistor is coupled to the corresponding reset line, [[the]]a first electrode of the first reset transistor is coupled to the corresponding initialization signal line, and [[the]]a second electrode of the first reset transistor is coupled to the gate of the driving transistor; a gate electrode of the data writing transistor is coupled to the corresponding gate line, [[the]]a first electrode of the data writing transistor is coupled to the corresponding data line, and [[the]]a second electrode of the data writing transistor is coupled to the first electrode of the driving transistor; a gate electrode of the power control transistor is coupled to the corresponding light emitting control line, [[the]]a first electrode of the power control transistor is coupled to the corresponding power line, and [[the]]a second electrode of the power control transistor is coupled to the first electrode of the driving transistor; a gate of the light emitting control transistor is coupled to the corresponding light emitting control line, [[the]]a first electrode of the light emitting control transistor is coupled to the second electrode of the driving transistor, and a second electrode of the light emitting control transistor is coupled to the corresponding light emitting element; a gate electrode of the second reset transistor is coupled to the corresponding reset line, a first electrode of the second reset transistor is coupled to the corresponding initialization signal line, and [[the]]a second electrode of the second reset transistor is coupled to the corresponding light emitting element; a first plate of the storage capacitor is coupled to the gate of the driving transistor, and a second plate of the storage capacitor is coupled to the corresponding power line (see the circuit in fig. 18 and par. 114-117 which is very similar to applicant fig. 6). As to claim 19, Huang teaches a display device (abstract). Allowable Subject Matter Claims 2-5, 7-9 and 16-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Response to Arguments Applicant’s arguments with respect to claim(s) 1, 6, 10-15 and 19 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMR A AWAD whose telephone number is (571)272-7764. The examiner can normally be reached M-F 8:30-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AMR A AWAD/Supervisory Patent Examiner, Art Unit 2621
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Prosecution Timeline

Nov 25, 2024
Application Filed
Nov 07, 2025
Non-Final Rejection mailed — §103
Feb 06, 2026
Response Filed
May 05, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
33%
Grant Probability
55%
With Interview (+21.4%)
2y 11m (~1y 3m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 63 resolved cases by this examiner. Grant probability derived from career allowance rate.

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