DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “control module” in claim 10.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 6, 7, 10-12 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Enomoto et al. (U.S. Pub. No. 20040183916).
Regarding claim 1, Enomoto discloses:
A method for reducing routings between modules, comprising:
determining a first signal line and at least one second signal line that are capable of being multiplexed, wherein the first signal line is used to transmit a first signal, and the second signal line is used to transmit a second signal (parallel image signals 3 and Image Enable signals LVAL and FVAL signals (DVAL signal, which can also be transmitted, is set to N.C. in the present embodiment) 23, which are obtained from the camera side and an external control signal (SerTFG) 20 are time-division multiplexed so that they may each be assigned to either of two data signals of lines 22, and note in Fig. 1 the signal lines 23, 3, and 20 are used for input of the signals to the camera-side connection circuit 1, par. 13-16, 53-55, and Fig. 1);
determining time-division control logic (time-division multiplexing circuit 200, par. 54 and Fig. 1);
connecting two terminals of the at least one second signal line to two terminals of the first signal line, respectively, and deleting the at least one second signal line (a total number of signal lines is reduced by generating a serial signal by time-division multiplexing not only a parallel video signal obtained from the camera but also control signals obtained from the camera together, where the number of the cables between the camera and the video apparatus as well as the number of the cable signals can be reduced, par. 33, 74, and Fig. 1, and it is noted that in par. 41 of applicants published specification it is stated “It should be noted that connecting the two terminals of the two signal lines is equivalent to merging the two signal lines into one signal line. Accordingly, when routing, the routing of any one of the signal lines can be deleted. That is, the first signal line and the second signal line are not limited to a specific signal, but are only used to distinguish different signal lines.”, therefore the reduction of signal lines using time-division multiplexing meets applicant’s “deleting” definition); and
controlling to transmit the first signal and the second signal on the first signal line according to the time-division control logic (parallel image signals 3 and LVAL and FVAL signals (DVAL signal, which can also be transmitted are transmitted to the video apparatus side through the transmission cable 11 and image data reception portion 19 in the video apparatus-side connection circuit 18 is equipped with two data signal receivers 190 and de-multiplexing circuits 191 for recovering from two pairs of differential signals (serial signals) 22 original 10-bit image signals (parallel signals) 17 and LVAL and FVAL signals and then performing image processing on the recovered image signal, par. 45, 55, and Fig. 1).
Regarding claim 2, Enomoto further discloses:
first signal line is any one of the following: a signal line for transmitting a control waveform, or a signal line for transmitting an operating parameter (one of lines of Image Enable signals LVAL, FVAL, DVAL 23 or external control signal (SerTFG) 20, par. 13-16, 53, 54, and Fig. 1).
Regarding claim 3, Enomoto further discloses:
the at least one second signal line comprises one or more second signal lines (the other line of Image Enable signals LVAL, FVAL, DVAL 23 or external control signal (SerTFG) 20, par. 13-16, 53, 54, and Fig. 1); and
the at least one second signal line comprises any one or more of the following: the signal line for transmitting the control waveform, or the signal line for transmitting the operating parameter (Image Enable signals LVAL, FVAL, DVAL 23 or external control signal (SerTFG) 20, par. 13-16, 53, 54, and Fig. 1).
Regarding claim 6, Enomoto discloses:
A signal transmission method, comprising:
multiplexing a second signal onto a first signal line used to transmit a first signal (parallel image signals 3 and Image Enable signals LVAL and FVAL signals (DVAL signal, which can also be transmitted, is set to N.C. in the present embodiment) 23, which are obtained from the camera side and an external control signal (SerTFG) 20 are time-division multiplexed so that they may each be assigned to either of two data signals of lines 22, and note in Fig. 1 the signal lines 23, 3, and 20 are used for input of the signals to the camera-side connection circuit 1, par. 13-16, 53-55, and Fig. 1, and it is noted that in par. 41 of applicants published specification it is stated “It should be noted that connecting the two terminals of the two signal lines is equivalent to merging the two signal lines into one signal line. Accordingly, when routing, the routing of any one of the signal lines can be deleted. That is, the first signal line and the second signal line are not limited to a specific signal, but are only used to distinguish different signal lines.”, therefore the reduction of signal lines using time-division multiplexing meets applicant’s “multiplexing a second signal onto a first signal line used to transmit a first signal” definition); and
controlling to transmit the first signal and the second signal on the first signal line in a time-division manner according to time-division control logic (parallel image signals 3 and LVAL and FVAL signals (DVAL signal, which can also be transmitted are transmitted to the video apparatus side through the transmission cable 11 and image data reception portion 19 in the video apparatus-side connection circuit 18 is equipped with two data signal receivers 190 and de-multiplexing circuits 191 for recovering from two pairs of differential signals (serial signals) 22 original 10-bit image signals (parallel signals) 17 and LVAL and FVAL signals and then performing image processing on the recovered image signal, par. 45, 55, and Fig. 1).
Regarding claim 7, see the rejection of claims 6 and 3 and note that the limitations of claim 7 were shown.
Regarding claim 10, Enomoto discloses:
A signal transmission apparatus, comprising:
a first signal transmission module (one of source of Image Enable signals LVAL, FVAL, DVAL 23 or source of external control signal (SerTFG) 20 input to camera side 1 and output to cable 11 with lines 22, par. 13-16, 53, 54, and Fig. 1), a first signal reception module connected to the first signal transmission module via a signal line (one of destination of LVAL, FVAL, DVAL or destination of external control signal (SerTFG) output from video side apparatus 18, par. 13-16, 53, 54, and Fig. 1), at least one second signal transmission module (another one of source of Image Enable signals LVAL, FVAL, DVAL 23 or source of external control signal (SerTFG) 20 input to camera side 1 and output to cable 11 with lines 22, par. 13-16, 53, 54, and Fig. 1), at least one second signal reception module connected to the at least one second signal transmission module via the signal line (another one of destination of LVAL, FVAL, DVAL or destination of external control signal (SerTFG) output from video side apparatus 18, par. 13-16, 53, 54, and Fig. 1), and a control module (circuit that is controlling camera side using external control signals 7 and 13, par. 64);
wherein the first signal transmission module is configured to output a first signal (one of Image Enable signals LVAL, FVAL, DVAL 23 or external control signal (SerTFG) 20, par. 13-16, 53, 54, and Fig. 1);
the at least one second signal transmission module is configured to output a second signal (another one of Image Enable signals LVAL, FVAL, DVAL 23 or external control signal (SerTFG) 20, par. 13-16, 53, 54, and Fig. 1); and
the control module is configured to control to transmit the first signal to the first signal reception module and transmit the second signal to the at least one second signal reception module on the signal line in a time-division manner according to time-division control logic (parallel image signals 3 and LVAL and FVAL signals (DVAL signal, which can also be transmitted are transmitted to the video apparatus side through the transmission cable 11 and image data reception portion 19 in the video apparatus-side connection circuit 18 is equipped with two data signal receivers 190 and de-multiplexing circuits 191 for recovering from two pairs of differential signals (serial signals) 22 original 10-bit image signals (parallel signals) 17 and LVAL and FVAL signals and then performing image processing on the recovered image signal, par. 45, 55, and Fig. 1).
Regarding claim 11, see the rejection of claims 10 and 3 and note that the limitations of claim 11 were shown.
Regarding claim 12, see the rejection of claim 11 and note that Enomoto further discloses:
second signal and the first signal are signals of a same type or signals of different types (Image Enable signals LVAL, FVAL, DVAL 23 or external control signal (SerTFG) 20, par. 13-16, 53, 54, and Fig. 1).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4, 5, 8, 9, and 16-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Enomoto et al. (U.S. Pub. No. 20040183916).
Regarding claim 4, Enomoto is silent with regards to time-division control logic comprises: controlling to transmit the first signal and the second signal on the first signal line in a time-division manner based on a time-division selection signal and a latch signal. Official Notice is taken that it was well known before the effective filing date of the claimed invention to include time-division control logic that comprises controlling to transmit a first signal and a second signal on a signal line in a time-division manner based on a time-division selection signal and a latch signal. This is advantageous in that a multiplexor for time-division multiplexing can select which data to pass to an output based on the selection signal and when the data is saved or updated based on a clock or enable signal. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include time-division control logic comprises: controlling to transmit the first signal and the second signal on the first signal line in a time-division manner based on a time-division selection signal and a latch signal.
Regarding claim 5, Enomoto is silent with regards to in a case where a plurality of latch signals are required, reducing a number of the plurality of latch signals by a manner of encoding. Official Notice is taken that it was well known before the effective filing date of the claimed invention to include using encoding in a single signal in order select a single signal of a plurality of signals instead of using selection signals for each signal of the plurality of signals. This is advantageous in that a multiplexor control circuit can be simplified. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include in a case where a plurality of latch signals are required, reducing a number of the plurality of latch signals by a manner of encoding.
Regarding claim 8, see the rejection of claims 6 and 4 and note that the limitations of claim 8 were shown.
Regarding claim 9, see the rejection of claims 8 and 5 and note that the limitations of claim 9 were shown.
Regarding claim 16, see the rejection of claim 10 and note that Enomoto further discloses that the signal transmission apparatus is within a camera (camera side, par. 53, Figs. 1 and 8). Enomoto is silent with regards to the camera being an image sensor. Official Notice is taken that it was well known before the effective filing date of the claimed invention to include an image sensor within a camera. This is advantageous in that a camera can control the image sensor and use the image sensor to capture and record images. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include camera being an image sensor.
Regarding claim 17, see the rejection of claims 16 and 8 and note that the limitations of claim 17 were shown.
Regarding claim 18, see the rejection of claims 17 and 9 and note that the limitations of claim 18 were shown.
Allowable Subject Matter
Claims 13-15, 19, and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 13, no prior art could be located that teaches or fairly suggests a port selection module; wherein the control module is configured to output a time-division selection signal to the first signal transmission module and the at least one second signal transmission module respectively, and output a control signal to the port selection module to control the port selection module to be connected to the first signal reception module and the at least one second signal reception module in a time-division manner, in combination with the rest of the limitations of the claim and parent claim.
Claims 14 and 15 depend on claim 13 and therefore are objected to.
Regarding claim 19, no prior art could be located that teaches or fairly suggests a port selection module; wherein the control module is configured to output a time-division selection signal to the first signal transmission module and the at least one second signal transmission module respectively, and output a control signal to the port selection module to control the port selection module to be connected to the first signal reception module and the at least one second signal reception module in a time-division manner, in combination with the rest of the limitations of the claim and parent claims.
Regarding claim 20, no prior art could be located that teaches or fairly suggests a port selection module; wherein the control module is configured to output a time-division selection signal to the first signal transmission module and the at least one second signal transmission module respectively, and output a control signal to the port selection module to control the port selection module to be connected to the first signal reception module and the at least one second signal reception module in a time-division manner, in combination with the rest of the limitations of the claim and parent claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NICHOLAS G GILES whose telephone number is (571)272-2824. The examiner can normally be reached M-F 6:45AM-3:15PM EST (HOTELING).
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/NICHOLAS G GILES/ Primary Examiner, Art Unit 2639
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