DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zang et al. (US 2020/0110200).
Regarding claims 1 and 20, Zang discloses a display panel (fig. 2), comprising:
a base substrate (para. 0083) comprising a display region (2) and a non-display region (such as region excludes the display region 2 on the substrate); wherein a plurality of sub-pixels (3, 3’) are provided in the display region and comprise first sub-pixels (3’) and an edge virtual sub-pixel (3); at least one row of the plurality of sub-pixels (such as first pixel row, fig. 2) comprises at least one edge virtual sub-pixel (3), and at least one column of the plurality of sub-pixels (such as first pixel column, fig. 2) comprises at least one edge virtual sub-pixel (3) (paras. 0082-0085);
a plurality of pixel drive units (not shown in light-emitting sub-region of the edge pixels 3 and the central pixels 3’) in a one-to-one correspondence with the first sub-pixels and the edge virtual sub-pixels; wherein the pixel drive units corresponding to the first sub-pixels are configured to drive the first sub-pixels to display a picture (para. 0083);
a color film substrate (1) comprising a black matrix layer and a color filter layer formed on the color film substrate (para. 0140); wherein the black matrix layer is provided with a plurality of opening regions (401); the color filter layer comprises a plurality of first color filter layers, a plurality of second color filter layers and a plurality of third color filter layers; and an orthographic projection of the first color filter layers, the second color filter layers, and the third color filter layers on the color film substrate overlaps an orthographic projection of the opening regions on the color film substrate (paras. 0132-0133 and 0140);
wherein an orthographic projection of the pixel drive unit corresponding to the edge virtual sub-pixel (3) on the base substrate does not overlap an orthographic projection of the first color filter layers, the second color filter layers, and the third color filter layers on the base substrate; and the orthographic projection of the pixel drive unit corresponding to the edge virtual sub-pixel (3) on the base substrate does not overlap an orthographic projection of the opening regions on the base substrate (paras. 0132-0133 and 0140).
Regarding claim 2, Zang discloses the edge virtual sub-pixel in a column of sub-pixels is closer to a corner edge of the display region than the first sub-pixels in the column of sub-pixels in a first direction; the edge virtual sub-pixel in a row of sub-pixels is closer to the corner edge of the display region than the first sub-pixels in the row of sub-pixels in a second direction (fig. 2, paras. 0082-0085).
Regarding claim 3, Zang discloses a quantity of each column of the opening regions and a quantity of each row of the opening regions both reduce in a direction
close to a corner edge of the display region (fig. 2, paras. 0082-0085);
wherein the color filter layer comprises a plurality of color filter units, each of the color filter units comprises: the first color filter layer, the second color filter layer and the third color filter layer; wherein the first color filter layer, the second color filter layer and the third color filter layer in each of the color filter units have the same orthographic projection on the base substrate (paras. 0132-0133 and 0140);
wherein an area of each of the color filter units decreases gradually in the direction close to the corner edge of the display region (paras. 0132-0133 and 0140).
Regarding claim 4, Zang discloses the pixel drive unit comprises: a first sub-drive unit;
the first sub-drive unit comprises a first drive transistor; a gate electrode of the first drive transistor is coupled to a gate line, a first electrode of the first drive transistor is coupled to a data line, and a second electrode of the first drive transistor is coupled to a pixel electrode (inherently include in light-emitting sub-region, para. 0083);
orthographic projections of the plurality of pixel drive units on the base substrate are of the same shape (para. 0083).
Regarding claim 5, Zang discloses sub-pixels close to a corner edge of the display region are arranged in a stepped manner to form a plurality of pixel steps, each pixel step comprises at least one sub-pixel; and in some of the pixel steps, at least one edge virtual sub-pixel is provided every other pixel step (fig. 2).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Zang in view of Koide et al. (US 2018/0259802).
Regarding claim 17, Zang does not specifically disclose “a gate conduction layer, on the base substrate… on a side of the second insulation layer facing away from the base substrate”.
In a similar field of endeavor of display panel, Koide discloses (preference to figs. 3 and 9) a gate conduction layer (421), on the base substrate (10); a gate insulation layer (113), on a side of the gate conduction layer facing away from the base substrate; a semiconductor layer (451), on a side of the gate insulation layer facing away from the base substrate; the semiconductor layer comprising a plurality of active layers; an etch-blocking layer, on a side of the semiconductor layer facing away from the base substrate (paras. 0091-0095); a source-drain layer, on a side of the etch-blocking layer facing away from the base substrate, comprising data lines (S), data fan-out lines, GOA signal lines, and data conduction signal lines; a first insulation layer (11), on a side of the source-drain layer facing away from the base substrate; a common electrode layer (CE), on a side of the first insulation layer facing away from the base substrate; a second insulation layer (12), on a side of the common electrode layer facing away from the base substrate; a pixel electrode layer, on a side of the second insulation layer facing away from the base substrate (paras. 0038-0040 and 0044).
Therefore, it would have been obvious to one of ordinary skill in the art before effective filling date of the claimed invention to incorporate the display panel as taught by Koide in the system of Zang in order to improve display brightness.
Allowable Subject Matter
Claims 6-16 and 18-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 6 identifies the distinct limitations “a plurality of anti-electrostatic units, and at least one common electrode line; wherein each of the plurality of cascaded shift register units corresponds to one row of the sub-pixels respectively; an orthographic projection of the anti-electrostatic units on the base substrate and an orthographic projection of the cascaded shift register units on the base substrate are respectively located on different sides of an orthographic projection of the common electrode line on the base substrate; the orthographic projection of the anti-electrostatic units on the base substrate is located between the orthographic projection of the common electrode line on the base substrate and an orthographic projection of the sub-pixels on the base substrate; the sub-pixels in each pixel step are electrically connected to at least one of the anti- electrostatic units respectively; the anti-electrostatic unit is located at an end of the pixel step in a first direction, and the anti-electrostatic unit is located between up to two rows of sub-pixels in a second direction”. Claims 7-10 are objected for their dependency upon claim 6. Claim 11 identifies the distinct limitations “the shift register unit comprises: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, and a tenth transistor; wherein the first transistor and the second transistor are opposite each other along the first direction; the third transistor and the fourth transistor are opposite each other along the first direction; an orthographic projection of the third transistor and the fourth transistor on the base substrate is between an orthographic projection of the first transistor on the base substrate and an orthographic projection of the fifth transistor on the base substrate; the sixth transistor and the seventh transistor are opposite each other along the first direction; an orthographic projection of the eighth transistor on the base substrate, an orthographic projection of the ninth transistor on the base substrate, and an orthographic projection of the tenth transistor on the base substrate are spaced apart in sequence in the second direction; the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, and the tenth transistor each comprises a plurality of active layers; the plurality of active layers are spaced apart from each other along the second direction; the plurality of active layers are spaced
apart from each other along the second direction by a distance of no more than 3 microns; a width of the active layer along the second direction is not greater than 5 microns”. Claims 12-16 are objected for their dependency upon claim 11. Claim 18 identifies the distinct limitations “a plurality of adapter units; the adapter unit comprising a first adapter hole and a second adapter hole; wherein the first adapter hole exposes the gate conduction layer, and the second adapter hole exposes the source-drain layer; the pixel electrode layer and the gate conduction layer are in a jumper connection through the first adapter hole, and the pixel electrode layer and the source-drain layer are in a jumper connection through the second adapter hole”. Claim 19 are objected for their dependency upon claim 18.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Tae et al. (US 2017/0322446) disclose the plurality of pixels PX include a first pixel PX1 not overlapping the curved inner edge CP of the first edge light blocking member 195 and a second pixel PX2 overlapping at least a portion of the curved inner edge CP of the first edge light blocking member 195 (fig. 6, para. 0086).
Lee (US 2016/0232837) discloses the shape of the display region 310 may also be other non-rectangular shapes, such as shapes of an ellipse, a heart, a water drop, or a sector, etc. In addition, the pixel structures 312 are arranged into an array along a horizontal axis H and a vertical axis V (fig. 3, para. 0036).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JENNIFER T NGUYEN whose telephone number is (571)272-7696. The examiner can normally be reached Mon-Fri 7:00-5:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Benjamin C Lee can be reached at 5712722963. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JENNIFER T NGUYEN/Primary Examiner, Art Unit 2629
Prosecution Insights