The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Examiner notes that this application has been made special under the Patent Prosecution Highway program. MPEP 708.02(a)(III) indicates that for an office action other than an allowance, the Office action will set a shortened statutory period of two (2) months.
For examination purposes, examiner presents the following example claim to show the scope that is being examined with respect to claim 1.
A field effect transistor, FET, gas sensor arranged to sense gas, comprising
a substrate,
a source, a drain, a semiconductor channel arranged between the source and the drain and at least one gate arranged in a same plane parallel to a surface of the substrate,
wherein the semiconductor channel and the at least one gate form a FET channel-gate coupling by which an applied gate potential is capable of controlling a current flowing through the semiconductor channel,
at least one space arranged in the same plane between the at least one gate and the semiconductor channel configured to receive gas,
at least one layer provided on at least a portion of a surface of the semiconductor channel, wherein the at least one layer comprises a first layer comprising metal nanoparticles arranged to interact with gas received in the at least one space, and
a third layer, wherein the third layer is dielectric and passivates the portion of the surface of the semiconductor channel upon which the third layer is provided, and the first layer arranged on at least a portion of the third layer,
wherein a portion the at least one layer is provided on a surface of the semiconductor channel facing a gate of the at least one gate,
whereby gas received in the at least one space is capable of interacting with and influencing at least one electrical property of the FET channel-gate coupling.
In the above example claim, the preamble does not carry any patentable moment. The “substrate” language requires a substrate. The paragraph following the “substrate’ language requires that the source, drain, the semiconductor channel source and drain and the at least one gate are in the same plane parallel to a surface of the substrate. The “wherein” paragraph that follows requires that the at least one gate and the semiconductor channel are arranged such that a FET channel-gate coupling is formed that is capable of controlling current flowing through the semiconductor channel by means of a potential applied to the at least one gate. The paragraph that follows requires at least one space capable of receiving gas between the at least one gate and the semiconductor channel in the same plane as the source, drain, semiconductor and the at least one gate. The following two paragraph require the presence of at least one layer on a portion of the surface of the semiconductor channel and further define the at least one layer to be a first nanoparticle layer and a third dielectric passivating layer. The at least one layer language is being interpreted to mean that even though the at least one layer comprises multiple layers, there may be areas in which only one of those multiple layers is present on the surface of the semiconductor channel (i.e. the third layer might be present on portions of the semiconductor channel that do not have the first layer). The following “wherein” paragraph requires that at least a portion of the at least one layer is provided on a surface of the semiconductor channel facing a gate of the at least one gate. This in combination with the first layer being arranged to interact with the gas received in the at least one space is being interpreted by examiner to require at least some of the metal nanoparticles on a side of the semiconductor channel facing the space between the semiconductor channel and the at least one gate. To the extent that the nanoparticles need to be present as part of the at least one layer on a surface of the semiconductor channel facing a gate of the at least one gate to interact with gas received in the at least one space, the language as interpreted above would require the presence of nanoparticles as part of the at least one layer on the semiconductor channel surface of the at least one space between the semiconductor channel and the gate of the at least one gate. However the amount of nanoparticles present or the amount of the surface covered by the nanoparticles is not defined. The final “whereby” paragraph sets forth what inherently happens when a gas is present in the at least one space that is capable of influencing at least one property of the FET channel-gate coupling. Therefore it, does not provide patentable moment on the structure of the device being claimed.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim 12 is rejected under 35 U.S.C. 112(b), as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, regards as the invention. With respect to claim 12, it is not clear if the measuring unit is capable of performing the required function without the FET gas sensor also being further limited to the type of metal nanoparticle. Does the sensing of hydrogen require a particular set/type of metal nanoparticle or are all metal nanoparticles capable of hydrogen measurement?
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-3 and 5-18 are rejected under 35 U.S.C. 103 as being unpatentable over Ahn (Applied Physics Letters 2014) in view of Cha (Applied Physics Letters 2006), Kettle (Nanotechnology 2010) or Nieder (Applied Physics Letters 1990). In the paper Ahn teaches a silicon nanowire field-effect transistor (SiNW FET) with local side-gates and Pd surface decoration for hydrogen (H2) detection. The SiNW FETs are fabricated by top-down method and functionalized with palladium nanoparticles (PdNPs) through electron beam evaporation for H2 detection. The drain current of the PdNP-decorated device reversibly responds to H2 at different concentrations. The local side-gates allow individual addressing of each sensor and enhance the sensitivity by adjusting the working region to the subthreshold regime. A control experiment using a non-functionalized device verifies that the hydrogen-sensitivity is originated from the PdNPs functionalized on the SiNW surface. The SiNW FET shown in figure 1 and the fabrication procedure shown in figure 2 teach a substrate (the buried oxide of figures 1-2), source (figures 1(a) and 1(c)), drain (figures 1(a) and 1(c)), semiconductor channel (SiNW, figures 1(a)-1(c)) and at least one gate (figures 1(a), 1(c) and 2(d)-2(f)). The source, drain, semiconductor channel and at least one gate are provided in the same plane on the substrate parallel to a surface of the substrate (figures 1(a), 1(c) and 2(d)-2(f)). At least one layer is provided on at least a portion of the semiconductor channel (figures 1(a), 1(b) and 2(f)). The at least one layer comprises a first nanoparticle layer (PdNPs, figures 1(a), 1(b) and 2(f)) and a third dielectric layer (top and gate oxides, figures 1(a), 1(b) and 2(c)-2(f)). The structural relationship between the semiconductor channel and the at least one gate shown in figures 1(a) and 1(c) provides a FET channel-gate coupling by which an applied gate potential is capable of controlling a current flowing through the semiconductor channel (see at least figures 4(a)-4(c)) with an interaction between a gas and the first layer influencing at least one electrical property of the FET channel-gate coupling in a manner that is relative to the amount of gas that is present (see at least figure 4 with its associated discussion). Examiner notes that functionalization with the Pd nanoparticles was the final step in the formation process. Ahn does not teach at least one space capable of receiving gas is arranged between the at least one gate and the semiconductor channel in the same plane parallel to a surface of the substrate as the source, drain, semiconductor channel and the at least one gate.
In the paper Cha describes/teaches a field effect transistor (FET) using a zinc oxide nanowire with significantly enhanced performance. The device consists of single nanowire and self-aligned gate electrodes with well-defined nanosize gaps separating them from the suspended nanowire (see at least figures 1 and 3 and the paragraph bridging pages 1-2 of the paper, airgap 26 nm). The fabricated FET exhibits excellent performance with a transconductance of 3.06 µS, a field effect mobility of 928 cm2/V s, and an on/off current ratio of 106. The electrical characteristics are the best obtained to date for a ZnO transistor. The FET has a n-type channel and operates in enhancement mode. The results are close to those reported previously for p-type carbon nanotube (CNT) FETs. This raises the possibility of using ZnO as the n-type FET with a CNT as the p-type FET in nanoscale complementary logic circuits. The last paragraph on the first page of the paper teaches that leakage current through gate and channel, which is more prevalent in a solid insulator, can be avoided by using nanosize air gaps.
In the paper Kettle teaches planar (in-plane-gate) transistors shown in figure 2 in which the darkened areas indicate isolating trenches. The last full paragraph on page 3 of the paper teaches that the insulating trench width, Wt, was 400 nm. The paragraph bridging the columns of page 4 teaches that when comparing the back gate to the side gate performance, the device exhibited increased ION/IOFF and lower VTH, when the device is operated by the back gate; the reason for this difference is twofold. Firstly, the insulating trenches between the gate and the channel are relatively wide (Wg = 300 nm) and no dielectric infill was used. By utilizing a stamp with smaller lateral dimensions and/or dielectric material fill in the trenches, the field effect would be enhanced and the ability to switch the device on and off would increase. Secondly, in organic semiconductor transistors, the off-current is crucially affected by the doping. As initially the areas on the P3HT films most affected by doping are the top and trench sidewall surfaces, it is likely that this will cause increased off-current when operated from the side gate.
In the paper Nieder teaches the realization of a unipolar transistor device tarting from two-dimensional electron systems (2DES) in modulation-doped AlGaAs/GaAs heterostructures. A 600-nm-wide 1D channel is insulated laterally from 2DES regimes by 700-nm-wide deep mesa etched trenches. The conductivity in the quasi-one-dimensional channel can be tuned via the in-plane lateral field effect of the adjacent 2DES gates where the vacuum (or air) in the etched trenches serves as the dielectric. Room-temperature operation is demonstrated yielding a 17 µS transconductance corresponding to 170 mS/mm 2D transconductance. The first paragraph after the abstract teaches that the concept of "in-plane-gate" (IPG) transistors has been proposed and realized. The main idea of this transistor is that, starting from a layered two-dimensional electron system (2DE5), a narrow quasi-1D (Q1D) channel is insulated laterally from 2DES regimes, which serve as gates. The conductivity in the Q1D channel is controlled via a gate voltage Vg, which is applied between the channel and adjacent 2DES regimes. This in-plane-gate configuration has the inherent advantage of very low capacitance in comparison with conventional sandwich type of surface gates and additionally of a simple and fast one-step-patterning technology. In the original device the insulation was achieved by focused-ion-beam (FIB) bombardment. This paper reports an IPG, where deep mesa etched trenches electrically insulate the Q1D channel and the 2DES gates, i.e., vacuum (or air) serves as the dielectric for the controlling electric field. Such a deep mesa etched IPG is sketched in Figure 1. The key points for the realization of such a device are sophisticated optimized deep mesa etching processes, which enable the production very narrow Q1D channels without carrier trapping and mobility degradation. The paragraph bridging pages 2696-2697 teaches that together with the demonstrated deep mesa etching process one gets a powerful and rapid tool to produce highly insulating vacuum trenches between gates and channel. The whole fabrication process is inherently self-aligning and hence easily applicable for device integration. The intrinsic small capacitance of in-plane gates can possibly lead to faster microwave transistors and the open trenches promise a unique potential for sensor devices. Although certainly their deep mesa etched in-plane-gate transistor was not optimized in all aspects, the current performance and in particular the high transconductance make it a very promising device.
With respect to claim 1, it would have been obvious to one of ordinary skill in the art at the time the application was filed to modify the Ahn device by adding a trench and/or air gap around the silicon nanowire channel as taught by Cha, Kettle and Nieder in in-plane transistors because of the isolation/insulation provided by the trench and/or air gap as taught by Cha, Kettle or Nieder as well as the other advantages taught either collectively and/or individually by these references. With respect to claim 2, one of ordinary skill in the art would have recognized that in the presence of the trenches and/or air gaps around the channel, nanoparticles would form on the side surfaces of the channel as well as the top surface of the channel so that the gate oxide of Ahn would be needed to prevent direct contact of the nanoparticles with the side surfaces of the semiconductor channel in the same manner it was used to prevent the nanoparticles from contacting the top surface of the channel. This would meet the requirement of claim 2 that the first layer is separated from the side surface of the semiconductor channel by the third layer. With respect to claim 3, Ahn teaches that the first layer comprises nanoparticles of at least one metal selected from the group consisting of platinum, Pt, palladium, Pd, gold, Au, and nickel, Ni (see at least the abstract, the silicon nanowire field-effect transistors (SiNW FET) are functionalized with palladium nanoparticles (PdNPs)). With respect to claims 5-6, the paragraph bridging the columns of page 2 of Ahn teaches that the third layer has a thickness in the range of 0.5 nm - 10 nm or more narrowly a thickness in the range of 0.5 nm - 5 nm (a 5 nm thick silicon dioxide was grown as a gate oxide by thermal oxidation (figure 2(c)) and a thin silicon oxide layer with a thickness of 3 nm was grown on top of the SiNW by thermal oxidation (figure 2(e))). With respect to claim 7, figures 1(a) and 1(c) show a structure in which the semiconductor channel elongates along an axis, A, and wherein the FET gas sensor device comprises two gates arranged on opposite sides of the semiconductor channel, perpendicular to the axis, A. With respect to claim 8, the semiconductor channel of Ahn is taught as a silicon nanowire SiNW (see at least the labelling of figure 1(c)). With respect to claims 9-10, figures 1 and 2 show that the at least one gate, the source, the drain, and the semiconductor channel are arranged on a surface of the substrate and in particular figures 1(b) and 2(a)-2(f0 show that the semiconductor channel is arranged above a surface of the substrate. With respect to claims 11- 12, Ahn teaches a measuring unit configured to measure the influenced at least one electrical property of the FET channel-gate coupling, and sense gas based on the measured influenced at least one electrical property of the FET channel-gate coupling and further configured to determine a concentration of molecular hydrogen, in the gas based on the influenced at least one electrical property of the FET channel-gate coupling (see at least figure 4 and the paragraph bridging pages 3-4 relative to the H2 sensing experiments). With respect to claim 13, Ahn teaches that the source, the drain, and the semiconductor channel are formed from a same layer of semiconductor material (see the paragraph bridging pages 1-2 describing the formation of the SiNW relative to figures 2(a) and 2(b) and the removal of the silicon nitride layer on the source/drain region followed by ion implantation (Arsenic, energy of 30 keV and a dose of 5 X 1015 cm-2) to form self-aligned source/drain regions and rapid thermal annealing (1000 °C, 5 s) to activate the dopants). With respect to claims 14-15, Cha teaches an airgap of 26 nm so that modification of Ahn by Cha would point to the at least one space having a size within the scope of both claims for the reasons given above to modify the teachings of Ahn with Cha. Examiner notes that Kettle teaches a trench width within the scope of at least claim 14 so that modification of the teachings of Ahn with the teachings of Kettle would show the obviousness of at least claim 15 for the reasons given above for claim 1.
With respect to claims 16-18, the claimed gas sensor device structure of claim 1 is substantially similar to the structure of claim 1 so that modification of the Ahn device structure by Cha, Kettle or Nieder would have been obvious for the reasons given above for claim 1. The nanoparticle metals are equivalent to those required by claim 3 above which are taught by Ahn as described for claim 3 above. Relative to the biasing the source and drain, biasing the gate receiving gas and sensing the gas steps see the teachings with respect to hydrogen sensing and the description relative to figure 4 starting with the last paragraph on page 3 and continuing to the second paragraph of the right column on page 4 of the paper.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Ahn in view of Cha, Kettle or Nieder as applied to claim 1 above, and further in view of Nugroho (Nature Materials 2019). Ahn does not teach a second layer that comprises a polymer arranged on at least a portion of the first layer that protects the first layer.
In the paper Nugroho teaches metal–polymer hybrid nanomaterials for plasmonic ultrafast hydrogen detection. Because of the flammability of hydrogen-air mixtures, hydrogen sensors are important for timely hydrogen leak detection during handling. However, existing solutions did not meet the required stringent performance targets. Deactivation due to poisoning, for example by carbon monoxide which the first paragraph after the abstract teaches as omnipresent a ~0.2 ppm, was also a widely unsolved problem. In the paper they present a plasmonic metal–polymer hybrid nanomaterial concept, where the polymer coating reduces the apparent activation energy for hydrogen transport into and out of the plasmonic nanoparticles, while deactivation resistance is provided via a tailored tandem polymer membrane. In concert with an optimized volume-to-surface ratio of the signal transducer uniquely offered by nanoparticles, this enables subsecond sensor response times. Simultaneously, hydrogen sorption hysteresis is suppressed, sensor limit of detection is enhanced, and sensor operation in demanding chemical environments is enabled, without signs of long-term deactivation. In a wider perspective, the work suggests strategies for next-generation gas sensors with functionalities optimized by hybrid material engineering. As the sensing substance they chose a Pd70Au30 nanoparticle alloy, as well as a pure Pd control. Figure 1a shows an artist's rendition of a plasmonic metal–polymer nanomaterial comprising hydride-forming Pd or Pd70Au30 alloy nanoparticles and a thin polymer coating. Figure 1c shows an atomic force microscopy (AFM) image of an individual Pd70Au30 alloy particle before and after PTFE coating. The profile of the coated particle is shifted upward by the nominal 30 nm PTFE thickness for clarity. The paragraph bridging the columns of page 490 teaches that the polymer they chose was polytetrafluoroethylene (PTFE) because of its high chemical resistance and hydrophobicity (water repellency). Radiofrequency sputtering of a 30 nm thin layer from a PTFE target yielded a conformal coating of the entire nanoparticle array (se figure 1c and supplementary figures 7 and 8). The first full paragraph of the right column on page 490 describes the first characterization of the sensors as measuring the optical hydrogen absorption and desorption isotherms at 30 °C for pure Pd and the Pd70Au30 alloy in the absence and presence of the 30 nm PTFE coating (see figures 2a,b). For Pd, a characteristic α-phase region at low hydrogen partial pressure is observed, where hydrogen is diluted at low concentration in solid solution. At a critical hydrogen pressure, the α + β phase coexistence region (plateau) at the first-order phase transition to and from the hydride (β-phase) appears and exhibits hysteresis. Finally, the pure β-phase region at high hydrogen partial pressure was observed. In contrast, the Pd70Au30 system exhibits a monotonous hysteresis-free response. Interestingly, adding the PTFE coating to the two sensors not only retains the identified beneficial properties of the Pd70Au30 alloy but also enhances the signal amplitude by a factor of approximately two throughout the entire pressure range investigated. This is remarkable because, as becomes clear from quartz-crystal microbalance (QCM) measurements, this enhancement is not caused by hydrogen absorption in the PTFE itself (see figures 2c,d). Specifically, the analysis indicates that the same amount of hydrogen is absorbed with and without the PTFE coating both for Pd and the Pd70Au30, corroborating that hydrogen only interacts with the nanoparticles. The paragraph bridging the columns of page 491 teaches that the next measurement was the response times of uncoated and PTFE-coated Pd and Pd70Au30 alloy sensors at 30 °C by monitoring their temporal response to a stepwise increase/decrease of hydrogen pressure to/from 40 mbar H2 in a vacuum chamber (see figures 3a,b; see Supplementary figure 27 for recovery times). Two key effects were observed: 1) for both absorption and desorption the response time of the uncoated Pd70Au30 sensor is significantly shorter than for the uncoated Pd one; 2) the PTFE coating for both systems further shortens the response time to significantly below 1 s for the alloy. The detailed quantitative analysis of the Pd and Pd70Au30 absorption and desorption kinetics via Arrhenius analysis (see supplementary figures 28 and 29) reveals a significant reduction in the apparent activation energies, Ea, for both hydrogen absorption and desorption. This is due to the PTFE coating (see figures 3d,e and supplementary figures 28 and 29). These results, along with similar kinetics acceleration observed for metal–organic framework-coated Pd sensors measured in vacuum/hydrogen and in air, imply that the kinetics-accelerating effect of such coatings may be generic. The paragraph bridging pages 491-492 teaches that based on DFT calculations to capture the experimentally observed trends, they showed that the measured decrease in Ea induced by the polymer coating is connected to the absorption and desorption processes at the nanoparticle–polymer interface (see figure 3e; see supplementary figures 12 and 13 for the modelled Pd@PTFE system), mediated by polymer–metal bond formation verified by X-ray photoelectron spectroscopy (XPS) analysis (see supplementary figures 9 and 10). On the one hand, the activation barrier for hydrogen absorption from surface to subsurface sites is reduced by 11 kJ mol−1 due to coating with PTFE, resulting in faster absorption. On the other hand, for sites close to the PTFE, surface-adsorbed hydrogen is destabilized by 9 kJ mol−1, which leads to faster H2 desorption. These effects give rise to a reduction of Ea for both hydrogen absorption and desorption, explaining the experimentally observed accelerated kinetics and measured lower apparent activation barriers for the respective rate-limiting step. The paragraph bridging pages 492-493 describes a sensor using PMMA rather than PTFE which shows better results for preventing gases such as CO from reaching the nanoparticles. The paragraph bridging columns of page 493 teach that the PMMA coated nanoparticles have the same amplitude enhancement as the PTFE coated nano particles but show a response time shortening that is, on average, a factor of two smaller for PMMA compared to PTFE . The last full paragraph on page 493 teaches that as an intermediate conclusion it becomes clear that the ideal polymer layer would essentially combine the properties of the evaluated PTFE and PMMA systems. Hence, they describe the fabrication of a Pd70Au30 hydrogen sensor encapsulated by a tandem 30 nm PTFE + 35 nm PMMA structure. In this way they tested the hypotheses that 1) it is indeed the PTFE–nanoparticle interface and the corresponding reduction of the apparent activation barriers that gives rise to the superior response time, 2) PMMA functions as a superior molecular sieve layer and 3) these two functions can be combined in a heterostructure. The paragraph bridging pages 493-494 teaches that an assessment of the room-temperature response time for the tandem coating revealed that it is essentially identical to that with the PTFE coating alone (see figure 5c). Since the same sensor was used in both cases, the reproducibility is remarkable. Furthermore (and as the key result), the subsecond response is again retained down to 1 mbar. Comparing the Ea for the two systems, they found them to be identical (see supplementary figure 45), corroborating that the kinetics acceleration observed is indeed governed solely by the direct interaction between the coating material and nanoparticle surface. At the same time, the deactivation tests in synthetic air revealed that the same deactivation resistance is achieved as for the PMMA alone (see supplementary figure 48 and figures 5d and 5e for a significantly exaggerated test). Moreover, the excellent deactivation resistance is also retained in the long term. In particular, after four months of exposure to ambient conditions, the tandem sensor retains its response, while the PTFE-only-coated sensor is significantly deactivated (indicated by the drastically reduced response time; see figure 5f). Finally, as an additional advantage of the tandem system arising due to its doubled polymer layer thickness, its sensitivity is further enhanced by 30% compared to that with the PTFE layer alone (see supplementary figures 46 and 47).
It would have been obvious to one of ordinary skill in the art at the time the application was filed to provide the polymer coating(s) of Nugroho on the nano particles of the Ahn sensor because of the decrease in the absorption and desorption response times taught by Nugroho due to the PTFE/Pd interface interactions taught by Nugroho. Due to the recognized hydrophobicity of PTFE taught by Nugroho, one of ordinary skill in the art would have expected the polymer coating to reduce the effects of water on the Ahn gas sensor in a manner similar to the reduction of the effect of other gases with the PMMA coating as taught by Nugroho.
Applicant’s arguments filed January 12, 2026 have been fully considered but they are not persuasive. The changes have overcome the clarity problem(s) of claim 1 but failed to address the issue of claim 12. Thus the clarity rejection of claim 12 has been maintained. The obviousness rejection has been maintained. First as pointed out above, the language of claim 1 is being interpreted to require that at least some of the metal particles are present as part of the at least one layer that is on the side of the semiconductor channel facing the space and the gate. Applicant has spent a considerable portion of the arguments focused on what examiner has acknowledged is missing for the structure taught by Ahn: a space configured to receive a gas located between the semiconductor channel and the side gate(s). Examiner agrees that without this space it is not possible for Ahn to have metal particles on a side of the semiconductor channel. The issue is whether is sufficient motivation for one of ordinary skill in the art to add such a space to the structure of Ahn and whether adding such a space would lead to nanoparticles on a side surface of the semiconductor channel. Silicon dioxide is a well known dielectric material used as an insulator. Thus the gate oxides made from silicon dioxide would have been understood by one of ordinary skill in the art as acting to insulate the gate electrodes from the semiconductor channel. One of ordinary skill in the art would have recognized the gate oxide of Ahn as one form of solid insulator referred to by Cha. In that respect Cha is clearly relevant to the possibility of modifying the Ahn structure in that it clearly teaches advantages to using an airgap rather than the common solid insulator (silicon dioxide gate oxide) of Ahn. Thus there are clearly reasons that one of ordinary skill in the art would have found it obvious to replace the solid insulator of Ahn with an air gap of Cha. Kettle and Nieder deal with similar air gap separating spaces between gate electrodes and semiconductor channels in a planar arrangement. Nieder in particular teaches that the open trenches (air gap separating spaces between gate electrodes and semiconductor channels in a planar arrangement) promise a unique potential for sensor devices. In other words Nieder also recognizes that these air gap separating spaces between gate electrodes and semiconductor channels in a planar arrangement has particular relevance to sensing devices. From this it is clear that replacement of a solid insulator between the semiconductor channel and gate electrode of Ahn with an air gap/separating spaces between gate electrodes and semiconductor channels in a planar arrangement would have been considered an obvious modification by one of ordinary skill in the art.
Now that the replacement of the solid insulator of Ahn with the airgaps of Cha, Kettle or Nieder has been established as an obvious modification, it is important to note that the fact that applicant has recognized another advantage which would flow naturally from following the suggestion of the prior art cannot be the basis for patentability when the differences would otherwise be obvious. See Ex parte Obiaya, 227 USPQ 58, 60 (Bd. Pat. App. & Inter. 1985). In this respect, two questions need to be addressed. The first question is do the airgaps/mesa/trenches meet the requirement that the space is configured to receive the gas. The second question is would a side wall of the channel facing the airgap/mesa/trench and the gate electrode(s) be expected to have metal particles thereon to interact with the gas.
To answer the first question, examiner turns to the newly cited Hammond patent (US 5,747,839). The Hammond patent teaches a field effect transistor (10) for chemical sensing by measuring a change in a surface potential of a gate electrode (48) due to exposure to a fluid has a semiconductor substrate (12) with a trench (18, 20). The trench has a first sidewall (30) and a second sidewall (32) disposed opposite the first sidewall to provide a fluid gap (50) for the fluid to be sensed. The gate electrode is disposed overlying the first sidewall of the trench, and a source region (54) and a drain region (56) are disposed in the second sidewall of the trench. A channel region (52) is disposed between the source and drain regions, and the gate electrode is disposed opposite the first channel region across the fluid gap. A heater (26) for regulating the temperature of the gate electrode is disposed in the first sidewall of the trench. In other words, the airgap/mesa/trench of Cha, Kettle, and/or Nieder would have been recognized as being configured to receive the gas to be sensed.
To answer the second question examiner first turns to the Ahn paper which teaches the deposition/formation of nanoparticles as the last step in the formation of the sensing device performed by using an electron beam evaporator. Next examiner looks at the Eisele patent (US 5,786,235) of record. Figures 2-3 show what one of skill in the art would expect to happen if a material was deposited form different angles. From both figures it is clear that at least some of the deposited material would have been expected to be deposited on the sides of an opening. Thus since deposition of the metal particles is the last step of the Ahn fabrication method and the gate oxide is formed in a prior step, the formation of the airgap/mesa/trench to provide insulation between the semiconductor channel and the gate electrode(s) would have been expected to occur prior to the deposition of the metal nanoparticles. Thus based on what is shown by the Eisele patent, one of ordinary skill in the art would have expected at least some of the metal particles to be deposited on a side of the semiconductor channel facing the airgap/mesa/trench between the semiconductor and the gate electrode(s). Thus modification of the Ahn structure with the teachings of Cha, Kettle or Nieder would have been expected to produce a structure with at least some metal particles deposited on a side of the semiconductor channel facing the airgap/mesa/trench between the semiconductor and the gate electrode(s) as required by claim 1. In other words, following the suggestions/teachings of the prior art would result in the structure being claimed so that the fact that applicant has recognized another advantage which would flow naturally from following the suggestion of the prior art cannot be the basis for patentability when the differences would otherwise be obvious. For this reason the arguments of applicant are not persuasive.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The additionally cited art relates to different field-effect transistor structures and in particular to in-plane-gate transistor structures.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Arlen Soderquist whose telephone number is (571)272-1265. The examiner can normally be reached 1st week Monday-Thursday, 2nd week Monday-Friday.
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/ARLEN SODERQUIST/ Primary Examiner, Art Unit 1797
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