DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 01/09/2026 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
The listing of references in the specification (Pages 22-23 references list) is not a proper information disclosure statement. 37 CFR 1.98(b) requires a list of all patents, publications, or other information submitted for consideration by the Office, and MPEP § 609.04(a) states, "the list may not be incorporated into the specification but must be submitted in a separate paper." Therefore, unless the references have been cited by the examiner on form PTO-892, they have not been considered.
Specification
The disclosure is objected to because of the following informalities:
Page 5, line 9, “in the ouput power” should be “in the output power”.
Page 7, line 4, “a shematic” should be “a schematic”.
Page 7, lines 7-13, “Fig. 7 are plots”, “Fig. 8 are plots” and “Fig. 9 are plots” should be “Fig. 7 shows plots”, “Fig. 8 shows plots” and “Fig. 9 shows plots”.
Page 12, line 9, “603c” should be “602c”.
Page 12, line 23, “603c” should be “602c”.
Page 14, line 26, “removes line frequency ripple” should be “removes double line frequency ripple”.
Page 17, line 10, missing closing parentheses after j=a, b, c.
Page 17, line 26, “884a” should be “684a”.
Page 20, line 12, “Vb=Vb is 5%” seems erroneous and maybe should be different.
Page 22, line 12, “Bhuvanwswari” should be “Bhuvaneswari” according to the Examiner. (Please Double Check).
Appropriate correction is required.
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claims 6, 16, 17, 20, 22 and 26 are objected to because of the following informalities:
Claim 6, lines 10-11 of the page, “a feature of the input voltage” should be “the feature of the input voltage”.
Claim 16, line 12 of the page, “A three phase power converter” should be “The three phase power converter” as this was already claimed in claim 1 which claim 16 depends upon.
Claim 17, line 21 of the page, “ouput power” should be changed to “output power”.
Claim 20, lines 8-9 of the page, “a feature of the input voltage” should be “the feature of the input voltage”.
Claim 22, lines 23-24 of the page, “a feature of the input voltage” should be “the feature of the input voltage”.
Claim 26, line 5 of the page, “The method of claim 17, double line frequency ripple” should be “The method of claim 17, wherein the double line frequency ripple”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 1-26 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claims 1 and 17, claim 1 recites, inter alia, “wherein a double line frequency ripple in an output power of the three phase converter is substantially eliminated.” Claim 17 recites, inter alia, “wherein a double line frequency ripple in the output power of the three phase converter is substantially eliminated.” The limitations recited in claims 1 and 17 are indefinite due to the term “substantially” not being properly defined and being a term of relative degree. Applicant’s specification does define “substantially” to be within the range of “within the noise, beneath background, below detection capabilities, or of no consequence in a practical application”, however, each of those parameters still do not give a concrete definition of the degree. Some detection circuits may not pick up the value while other detection circuits may likewise the amount of noise that is acceptable within a system is also dependent upon the goals of the system overall. For purposes of examination the Examiner has taken the interpretation that “substantially eliminated” means reduced or eliminated.
Regarding claims 2-16 and 18-26, claims 2-16 are dependent upon claim 1 therefore inherit the deficiencies of claim 1 and are also rejected as being indefinite under 35 U.S.C. 112(b). Claims 18-26 are dependent upon claim 17 therefore inherit the deficiencies of claim 17 and are also rejected as being indefinite under 35 U.S.C. 112(b).
Regarding claim 11, claim 11 recites, inter alia, “uses the output of the comparison to obtain a proper amplitude of the at least one power control signal”. This claim is indefinite because the claim is unclear regarding what the claim defines as being “a proper amplitude”. Furthermore, the specification does not provide a clear definition for the term “proper” either making it more difficult to understand what the term means or the degree or value of the term in relation to the amplitude. For purposes of examination the Examiner has taken the interpretation to ignore the term “proper” and read the claim as the following limitation “uses the output of the comparison to obtain a signal with an amplitude of the at least one power control signal.”
Regarding claims 3, 5, 7, 19, 21 and 23, claims 3, 7, 19 and 23 recite, “wherein the feature of the input voltage for each phase is determined according to 1-cos(2(ωt))”, while claims 5 and 21 recite “wherein the feature of the input voltage for each phase is determined according to sin(ωt)”. Each of these claims recite a formula wherein the values of ‘ω’ and ‘t’ are not defined within the claims which they must be for proper understanding of the claim. Also the claims do not properly point out which feature of the input voltage is defined according to these formulas as not all features of the input voltage are defined by these formulas. Furthermore, it is difficult to understand what these formulas define or describe in relation to the input voltage. For purposes of examination the Examiner has taken the interpretation that these set of claims simply mean “a characteristic or signal associated with the input voltage is determined using a waveform derived from an AC input”.
Regarding claim 26, claim 26 recites, inter alia, “double line frequency ripple in the output power of the three- phase converter is substantially eliminated with balanced input voltage and with unbalanced input voltage, and when input voltage harmonics are present.” The first issue with the claim is similar to that of claims 1 and 17 wherein the term “substantially” is not properly defined. Applicant’s specification does define “substantially” to be within the range of “within the noise, beneath background, below detection capabilities, or of no consequence in a practical application”, however, each of those parameters still do not give a concrete definition of the degree. Some detection circuits may not pick up the value while other detection circuits may likewise the amount of noise that is acceptable within a system is also dependent upon the goals of the system overall. For purposes of examination the Examiner has taken the interpretation that “substantially eliminated” means reduced or eliminated. The second issue with the claim is that the claim is unclear as to how the balanced and unbalanced input voltage eliminate the double line frequency ripple. Furthermore, the claim seems to imply that the double line frequency ripple in the output power is “substantially eliminated” “when input voltage harmonics are present” which is unclear because if read in that manner it would suggest that the ripple is only elimination when harmonics are present. For purpose of examination the Examiner has taken the interpretation that this claim means that the control to reduce the double line frequency ripple works in systems that are balanced, unbalanced and/or have harmonics in the input voltage present.
Claim Rejections
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 8, 11, 13-17 and 25-26 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Forouzesh (US 2020/0235656 A1).
Regarding claim 1, Forouzesh teaches a controller (Figure 4B) for a three phase power converter (Figure 2B which is seen in further detail in Figure 4A), comprising: a first circuit that determines an instantaneous input power of each phase (Figure 4B has been annotated below as Annotated Figure 4B; Annotated Figure 4B Component FC; P=IV and Component FC combines the current and voltage and outputs a power signal for each phase to Component PI of Component SC; Paragraphs 0029 and 0036); a feedback circuit that determines at least one power control signal based on an output of the three phase power converter (Annotated Figure 4B Component FB; Paragraph 0036); a second circuit that uses the power control signal to adjust the instantaneous input power of each phase to achieve power balancing of the three phases (Annotated Figure 4B Component SC; Paragraphs 0036); wherein a double line frequency ripple in an output power of the three phase converter is substantially eliminated (Paragraphs 0029, 0033 and 0046).
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Regarding claim 8, Forouzesh teaches all the limitations of claim 1. Forouzesh further teaches wherein the first circuit comprises an average input current calculator that calculates an average input current for each phase in each switching cycle (Annotated Figure 4B Component 44).
Regarding claim 11, Forouzesh teaches all the limitations of claim 1. Forouzesh further teaches wherein the feedback circuit compares a sensed output voltage of the three phase converter to a reference voltage (Annotated Figure 4B Component FB; Component 46; Paragraph 0036), and uses the output of the comparison to obtain a proper amplitude of the at least one power control signal (Annotated Figure 4B Component PI).
Regarding claim 13, Forouzesh teaches all the limitations of claim 1. Forouzesh further teaches an output circuit including pulse frequency modulation (PFM) modules that generate switching signals for switching devices of power converter modules of the three phase power converter (Figure 4A; Paragraph 0034 highlights that this is a frequency controlled converter).
Regarding claim 14, Forouzesh teaches all the limitations of claim 1. Forouzesh further teaches the controller implemented for a three-phase power converter configured for a phase voltage connected three-phase power source (Figure 4B is implemented in Figure 4A which is a three-phase converter).
Regarding claim 15, Forouzesh teaches all the limitations of claim 1. Forouzesh further teaches the controller implemented for a three-phase power converter configured for a line voltage connected three-phase power source (Figure 2B shows that the three-phase power converter can be configured with a delta connection thus showing a three-phase power converter configured for a line voltage connected three-phase power source; Figure 4B is implemented in Figure 4A which is a detailed version of Figure 4B).
Regarding claim 16, Forouzesh teaches all the limitations of claim 1. Forouzesh further teaches the power converter is a three phase power converter (Figure 4A; Figure 2B).
Regarding claim 17, Forouzesh teaches a method for controlling (Figure 4B; Figure 4B has been annotated above as Annotated Figure 4B) a three phase power converter (Figure 2B; Figure 2B is seen in further detail in Figure 4A), comprising: determining an instantaneous input power of each phase (Figure 4B has been annotated below as Annotated Figure 4B; Annotated Figure 4B Component FC; P=IV and Component FC combines the current and voltage and outputs a power signal for each phase to Component PI of Component SC; Paragraphs 0029 and 0036); determining a power control signal for each phase based on an output power of the three phase power converter (Annotated Figure 4B Component FB; Paragraph 0036); using the power control signal to determine a reference signal for each phase (Annotated Figure 4B Component SC; Paragraphs 0036); using the reference signal for each phase to adjust the instantaneous input power of each phase to achieve power balancing of the three phases (Figure 4B the output of Component SC adjusts the input power of each phase); wherein a double line frequency ripple in the output power of the three phase converter is substantially eliminated (Paragraphs 0029, 0033 and 0046).
Regarding claim 25, Forouzesh teaches all the limitations of claim 17. Forouzesh further teaches using pulse frequency modulation (PFM) to generate switching signals for switching devices of power converter modules of the three phase power converter to achieve power balancing of the three phases (Figure 4A; Paragraph 0034 highlights that this is a frequency controlled converter).
Regarding claim 26 (See 112(b) Rejection), Forouzesh teaches all the limitations of claim 17. Forouzesh further teaches wherein double line frequency ripple in the output power of the three-phase converter is substantially eliminated with balanced input voltage and with unbalanced input voltage, and when input voltage harmonics are present (Paragraphs 0029, 0033 and 0046).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 12 and 24 are rejected under 35 U.S.C. 103 as being unpatentable over Forouzesh (US 2020/0235656 A1).
Regarding claim 12, Forouzesh teaches all the limitations of claim 1. Forouzesh does not teach in the current embodiment an output circuit including pulse width modulation (PWM) modules that generate switching signals for switching devices of power converter modules of the three phase power converter.
However, Forouzesh in a second embodiment (Figures 5A and 5B) shows an output circuit pulse width modulation (PWM) modules that generate switching signals for switching devices of power converter modules of the three phase power converter (Figure 5B; Paragraphs 0029, 0034, 0035 and 0037 highlights how the power converter is controlled by PWM and adjusting the duty cycles).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of the first embodiment of Forouzesh to incorporate a PWM control scheme as taught by the second embodiment of Forouzesh. The advantage of this modification is that PWM permits regulation of the power by each phase by direct duty cycle adjustment while maintaining a fixed switching frequency allowing for predictable switching harmonics and thus being able to design filters targeting specific harmonics.
Regarding claim 24, Forouzesh teaches all the limitations of claim 17. Forouzesh does not teach in the current embodiment using pulse width modulation (PWM) to generate switching signals for switching devices of power converter modules of the three phase power converter to achieve power balancing of the three phases.
However, Forouzesh in a second embodiment (Figures 5A and 5B) shows using pulse width modulation (PWM) to generate switching signals for switching devices of power converter modules of the three phase power converter to achieve power balancing of the three phases (Figure 5B; Paragraphs 0029, 0034, 0035 and 0037 highlights how the power converter is controlled by PWM and adjusting the duty cycles).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of the first embodiment of Forouzesh to incorporate a PWM control scheme as taught by the second embodiment of Forouzesh. The advantage of this modification is that PWM permits regulation of the power by each phase by direct duty cycle adjustment while maintaining a fixed switching frequency allowing for predictable switching harmonics and thus being able to design filters targeting specific harmonics.
Allowable Subject Matter
Claims 2-7, 9-10 and 18-23 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 2, none of the prior art, made of record, singularly or in combinations, teaches or fairly suggests wherein the feedback circuit senses an output voltage of the three phase converter and determines the power control signal for each phase; the second circuit uses the power control signal for each phase together with a feature of the input voltage for each phase to determine a reference power signal for each phase, and compares the reference power signal for each phase to the instantaneous input power for each phase to generate a control signal for each phase.
Claims 3-7 and 9-10 depend upon claim 2.
Regarding claim 18, none of the prior art, made of record, singularly or in combinations, teaches or fairly suggests using a feedback circuit that senses an output voltage of the three phase converter to determine the power control signal for each phase; using the power control signal for each phase together with a feature of the input voltage for each phase to determine a reference power signal for each phase; comparing the reference power signal for each phase to the instantaneous input power for each phase to generate a control signal for each phase.
Claims 19-23 depend upon claim 18.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Li (WO 2019/082316 A1) teaches a power conversion device (100) with which a ripple current of a smoothing capacitor (22) can be reduced by controlling the output voltage phase of a device. This power conversion device (100) is provided with a single phase converter (21) and a single phase inverter (23), and controls the inverter (23) using: an input current phase difference (θS) with respect to a power source voltage phase (ωSt) of a power source inputted to the converter (21); an output current phase difference (θL) with respect to an output voltage phase outputted by the inverter; an output voltage phase difference reference calculating unit (61) that calculates and outputs an output voltage phase difference reference (θMF) from the power source voltage phase; and the output voltage phase difference reference (θMF).
Bo (“An Output-Power-Control Strategy for a Three-Phase PWMRectifier Under Unbalanced Supply Conditions”) teaches an effective way to improve the performance of a pulse width-modulation rectifier operating under unbalanced supply-voltage conditions using instantaneous power regulation.
Kamnarn (“Analysis and Design of a Modular Three-Phase AC-to-DC Converter Using CUK Rectifier Module With Nearly Unity Power Factor and Fast Dynamic Response”) teaches a modular three-phase AC-to-DC converter using single-phase isolated Cuk rectifier modules based on power balance control technique.
Iwata (US 2013/0088899 A1) teaches a multi-phase converter of one of the embodiments includes: a plurality of AC/DC converters which are connected in parallel to each other, wherein each of the plurality of AC/DC converters includes a power factor correction circuit and a DC/DC converter that is connected in series to the power factor correction circuit and that receives an output from the power factor correction circuit, and the power factor correction circuit includes an output voltage adjusting circuit that adjusts an output voltage from the power factor correction circuit.
Carpenter (US 2009/0167080 A1) teaches a converter for a multi-phase current network can include a plurality of current sensors, each of the plurality of current sensors being configured to detect current for a respective phase of the multi-phase network. A current averaging circuit is configured to provide an indication of the average current for the multi-phase network based on the current detected by each of the plurality of current sensors. A modulator is configured to modulate at least one phase of the multi-phase network independently of each other phase of the multi-phase network based on a difference between the current detected for the at least one phase and the average current for the multi-phase network.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Shahzeb K. Ahmad whose telephone number is (571)272-0978. The examiner can normally be reached Monday - Friday 8 A.M. to 5 P.M..
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu V. Tran can be reached at 571-270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Shahzeb K Ahmad/Examiner, Art Unit 2838
