DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 18 March 2026 has been entered.
Response to Arguments
Applicant’s arguments with respect to claims 1, 3-4, 6-12 and 14-19 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 8-11, 18 and 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 8 and 19 recite similar limitations “some of said pulses of the cycle being distant from the first durations and some of said pulses of the cycle being distant from the second durations” and claim 18 recites “the first pulses being distant from the first durations…the first pulses and the following second pulses being distant from the second durations.” However, nowhere in the specification is it described exactly what “distant from” means, rather the specification merely just recites “distant from” the same as the claims. “Distant” can mean far away in time, far away in space or far away in relationship. Paragraph [0062] of applicant’s specification says timing signal “PWM” comprises pulses that are distant from TAi and pulses that are distant from TBi, however, Figure 6, for example, don’t show any pulses that are “far away in time”, “far away in space” or “far away in relationship” so it is unclear what applicant is intending to claim by saying “distant from” in terms of the relationships of the pulses as claimed.
Claims 9-11 are rejected due to their dependency from claim 8.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 3-4, 6-7, and 14-17 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lee et al. (US 2023/0154387).
Regarding claim 1, Lee et al. disclose a display pixel (Figure 4) comprising
at least one light-emitting diode (Figure 4 and paragraph [0059].), and
an electronic circuit comprising a storage circuit for storing at least one digital signal (Figure 4, 20 is an electronic circuit comprising a storage circuit that stores a digital signal that is 5 bits.) and
a driver circuit configured to drive said light-emitting diode by pulse-width modulation (Figure 4, 30/10 is a driver circuit configured to drive said light-emitting diode by pulse-width modulation.),
in a first operating mode, by switching on or off said light-emitting diode during first different durations according to the logical states of the bits of the digital signal (Figure 6A shows a first mode where the LED is switched on or off by first different durations according to the logical states of the bits of the digital signal.) or,
in a second operating mode, by switching on or off said light-emitting diode during second different durations, at least partly different from the first durations, according to the logical states of the bits of the digital signal (Figure 6B shows a second mode where the LED is switched on or off by second different durations, at least partly different from the first durations, according to the logical states of the bits of the digital signal.),
wherein at least some of the second durations last less than the shortest of the first durations (Figures 6A and 6B show that
1
128
and
1
512
[at least some of the second durations] last less than
1
32
[shortest of the first durations].) and
wherein the electronic circuit is configured to switch between the first and second operating modes according to the logical state of a first binary signal (Paragraph [0076].).
Regarding claim 3, Lee et al. disclose the display pixel of claim 1, wherein the electronic circuit is configured to receive the first binary signal from outside the display pixel (VMODE is received by 10 from outside of the pixel, see Figure 1, for example.).
Regarding claim 4, Lee et al. disclose the display pixel of claim 1,
wherein the digital signal comprises NB bits bi, 1 being in the range from i to NB, bit bNB being the most significant bit and bit b1 being the least significant bit (Figure 4, 5 bits), wherein the first durations comprise NB first durations TAi of increasing values (Figure 6A shows 5 first durations of increasing values.), wherein the second durations comprise NB second durations TBi of increasing values (Figure 6B shows 5 second durations of increasing values.),
wherein the driver circuit is configured to drive said light-emitting diode by pulse-width modulation in the first operating mode by switching on or off said light-emitting diode during the NB first durations TAi said light-emitting diode being switched on during first duration TAi when bit bi is at a first logical state and being switched off during first duration TAi when bit bi is at a second logical state, different from the first logical state (Figure 6A shows that the LED is driven by PWM of the first durations and is on when the bits are high and off when the bits are low.), and
wherein the driver circuit is configured to drive said light-emitting diode by pulse-width modulation in the second operating mode by switching on or off said light-emitting diode during the NB second durations TBi, said light-emitting diode being switched on during second duration TBi when bit bi is at the first logical state and being switched off during second duration TBi when bit bi is at the second logical state (Figure 6B shows that the LED is driven by PWM of the second durations and is on when the bits are high and off when the bits are low.).
Regarding claim 6, Lee et al. disclose the display pixel of claim 1, wherein at least one of the second durations lasts as long as one of the first durations (Figures 6A and 6B show that that the longest second duration
1
2
lasts as long as one of the first durations that is
1
2
.).
Regarding claim 7, Lee et al. disclose the display pixel of claim 6, wherein at least the longest second duration lasts as long as one of the first durations (Figures 6A and 6B show that that the longest second duration
1
2
lasts as long as one of the first durations that is
1
2
.).
Regarding claim 14, Lee et al. disclose the display pixel of claim 1, comprising at least a second conductive pad intended to receive a fifth binary signal (Figure 4, SCAN SIGNAL is a fifth binary signal.), and connected to said electronic circuit, said electronic circuit being configured to update said stored digital signal in the storage circuit from the second signal (Figure 4, 20 is updated based on the scan signal.).
Regarding claim 15, Lee et al. disclose a display screen (Figure 5) comprising:
-display pixels according to claim 1 arranged in rows and in columns (Figure 5, PXs.);
-first electrically conductive tracks extending along the rows and connected to the electronic circuits of the display pixels (Figure 5, the electrically conductive tracks extending from 140 extend along the rows, see also paragraph [0070].);
-second electrically conductive tracks extending along the columns and connected to the electronic circuits of the display pixels (Figure 5, DL1-DLn.); and
-a control circuit connected to the first electrically conductive tracks and the second electrically conductive tracks (Figure 5, 150/140/130/120 is a control circuit.).
Regarding claim 16, Lee et al. disclose the display screen of claim 15, wherein the electronic circuit of each display pixel is configured to switch between the first and second operating modes according to the logical state of a first binary signal (Paragraph [0076] and Figure 1), and wherein the control circuit is configured to determine the first binary signal for each digital signal and provide the first binary signals to each display pixel (Paragraph [0071].).
Regarding claim 17, Lee et al. disclose the display screen of claim 15, wherein the control circuit is configured to supply a timing signal on each first electrically conductive track (Figure 5, 140 supplies the gray clock signal.), and wherein the electronic circuit of each display pixel is configured to generate from said timing signal a drive signal to drive said light-emitting diode by pulse-width modulation (Figure 4, the gray clock signal is input to the PWM controller 30.), in a first operating mode, by switching on or off said light-emitting diode during the first different durations (Figure 6A) or, in a second operating mode, by switching on or off said light-emitting diode during the second different durations (Figure 6B).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2023/0154387) in view of Lee (US 2021/0049957).
Regarding claim 12, Lee et al. disclose the display pixel of claim 1.
Lee et al. fail to teach the display pixel comprising a controllable current source supplying said light-emitting diode and controlled by a fourth binary signal.
Lee discloses wherein a display pixel comprising a controllable current source supplying a light-emitting diode and controlled by a fourth binary signal (Figure 6, 127 is a controllable current source that supplies ED and is controlled by a fourth binary signal [See paragraph [0071], CS.).
Hence the prior art includes each element claimed although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of the actual combination of the elements in a single prior art reference. In combination Lee et al. performs the same function as it does separately of providing a display pixel controllable using PWM, and Lee performs the same function as it does separately of providing a display pixel comprising a controllable current source.
Therefore, one of ordinary skill in the art before the effective filing date of the claimed invention could have combined the elements as claimed by known methods, and that in combination, each element merely performed the same function as it does separately. The results of the combination would have been predictable and resulted in a display pixel controllable using PWM comprising a controllable current source.
Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention.
Allowable Subject Matter
Claim 13 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 8-11, 18 and 19 may be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The primary reasons for indicating allowable subject matter in claim 13 is the inclusion of the limitations reciting “wherein the electronic circuit comprises a first logic gate of NOR type having a first input receiving the third binary signal and having a second input receiving the first binary signal and a second logic gate of NOR type having a first input receiving the logical complement of bit bi and having a second input connected to the output of first logic gate and providing the fourth binary signal” which, in combination with the other recited features, is not taught and/or suggested either singularly or in combination within the prior art.
The primary reasons for indicating allowable subject matter in claim 8 is the inclusion of the limitations reciting “at least a first conductive pad intended to receive a second binary signal comprising cycles of pulses, and connected to said electronic circuit, for each cycle, some of said pulses of the cycle being distant from the first durations and some of said pulses of the cycle being distant from the second durations, said electronic circuit being configured to switch on or off said light-emitting diode during the first durations based on said pulses distant from the first durations or the second durations based on said pulses distant from the second durations” which, in combination with the other recited features, is not taught and/or suggested either singularly or in combination within the prior art.
Claims 9-11 are indicated as having allowable subject matter due to their dependency from claim 8.
The primary reasons for indicating allowable subject matter in claim 18 is the inclusion of the limitations reciting “wherein the control circuit is configured to supply the timing signal on each first electrically conductive track equal to a second binary signal comprising at least first pulses, the first pulses being distant from the first durations and second pulses, each first pulse being followed by a second pulse, the first pulses and the following second pulses being distant from the second durations” which, in combination with the other recited features, is not taught and/or suggested either singularly or in combination within the prior art.
Claim 19 are indicated as having allowable subject matter for the same reasons as claim 8.
Conclusion
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/STEPHEN G SHERMAN/
Primary Examiner, Art Unit 2621
20 April 2026
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