Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 6 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 6 recites the limitation " the protruding portion on the first surface " in line 4. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claim (s) 1-3,5, and 8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Harazono et al. (US 2019/0132962 hereinafter Harazono).
Regarding claim 1, Harazono discloses a wiring board (Fig.1), comprising: a first insulation layer (2b;Fig.1 and 4) comprising a first surface (top surface of 2b) and an electrical conductor layer (4b and 4a) located on the first surface, wherein the first insulation layer comprises an insulating resin (see resin 2b in Fig.3) and a plurality of insulating particles (see 3) dispersed in the insulating resin, the plurality of insulating particles comprises a first insulating particle (3a) comprising a first region exposed from the insulating resin in the first surface (see exposed surface of 3a in Fig.3)and a second region other than the first region when the first surface is viewed in a top surface view ( see bottom surface of 3a that is not exposed), and the electrical conductor layer is located on a surface of the first region and a surface of the insulating resin (see 4a and 4b on top surface of 2b;Fig.4), and is not located below the first region and between the second region and the insulating resin (4a and 4b comes in contact with the exposed portion of 3a and does not contact the other side of 3a that is embedded in 2b;Fig.3).
Regarding claim 2, Harazono discloses a second insulation layer (2a;Fig.1) comprising a second surface (see top surface of 2a; Fig.1, wherein at least one layer of the first insulation layer is located on the second surface (2b is mounted on top of 2a).
Regarding claim 3 Harazono discloses the electrical conductor layer comprises a protruding portion (see 5b and 8b ;Fig.4) protruding into the insulating resin (2b;Fig.4).
Regarding claim 5 Harazono discloses wherein a contact portion between the electrical conductor layer and the insulating particle comprises a non-crystalline structure ( resin 3a is a sphere in contact with conductor layer 4b).
Regarding claim 8 Harazono discloses an electronic component (see S or M;Fig.1) located at a mounting region of the wiring board (see mounting region o top surface of wiring board 20 in Fig.1).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim (s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Harazono as applied to claim 1 above, and further in view of Nakasato et al. (US 2007/0164349 A1) hereinafter Nakasato.
Regarding claim 6, Harazono is silent with respect to wherein in a cross-sectional view passing through the first surface, the plurality of insulating particles comprise a second insulating particle comprising a third region in contact with the electrical conductor layer and a fourth region in contact with the protruding portion on the first surface, and a portion of the second insulating particle between the third region and the fourth region is coated with the insulating resin.
Nakasato discloses wherein in a cross-sectional view passing through the first surface (see Fig.2E and Fig.2F) , the plurality of insulating particles comprise a second insulating particle (see particles in opening 6;Fig.2E ) comprising a third region (see exposed particle surfaces) in contact with the electrical conductor layer (5) and a fourth region (back portion of particles that are in the resin layer 4) in contact with the protruding portion on the first surface, and a portion of the second insulating particle between the third region and the fourth region is coated with the insulating resin ( middle part of resin particles is covered with the insulating resin layer).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Nakasato with the device of Harazono in order to provide more surface area for adhesion of an electrical conductor layer to an insulating layer.
Claim (s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Harazono.
Regarding claim 7, Harazono fails to specifically disclose wherein a filling ratio of the insulating particles is 50 vol% or more and 90 vol% or less.
It would have been obvious to one of ordinary skill in the art at the time the invention was made to use a filling ratio of the insulating particles is 50 vol% or more and 90 vol% or less in order to improve thermal resistance to the insulating layer of a printed circuit board device, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ233.
Allowable Subject Matter
Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner's statement of reasons for allowance:
Regarding claim 4, The prior art of record neither anticipates norrenders obvious the claimed subject matter of the instant application as a whole eithertaken alone or in combination, in particular, prior art of record does not teach" wherein the protruding portion comprises voids. " in combination with the remaining limitations of the claim 1.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETE LEE whose telephone number is (571) 270-5921. The examiner can normally be reached on Monday-Friday (2nd & 4th Friday Off). If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Timothy Dole can be reached at (571) 272-2229 The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/PETE T LEE/Primary Examiner, Art Unit 2847
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