Prosecution Insights
Last updated: October 01, 2026
Application No. 18/879,139

MULTIFUNCTIONAL SYSTEMS FOR ELECTRONIC DEVICES AND METHODS

Non-Final OA §103§112
Filed
Dec 26, 2024
Priority
Jun 28, 2022 — EU 22382607.4 +1 more
Examiner
O'MALLEY, CONOR AIDAN
Art Unit
Tech Center
Assignee
UNIVERSIDAD DE LAS PALMAS DE GRAN CANARIA
OA Round
1 (Non-Final)
71%
Grant Probability
Favorable
1-2
OA Rounds
1y 1m
Est. Remaining
67%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allowance Rate
30 granted / 42 resolved
+11.4% vs TC avg
Minimal -4% lift
Without
With
+-4.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
16 currently pending
Career history
56
Total Applications
across all art units

Statute-Specific Performance

§101
20.6%
-19.4% vs TC avg
§103
39.0%
-1.0% vs TC avg
§102
21.7%
-18.3% vs TC avg
§112
18.4%
-21.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 42 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: “11” for board bed. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters "250" and "260" have both been used to designate the same kind of auxiliary frame when they are two different auxiliary frames as shown in Figures 5 and 6. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The disclosure is objected to because of the following informalities: Page 5, Line 19, “etc” should be “etc.” Page 16, Lines 2 and 21-22, “fidutial” should be “fiducial” Page 26, clauses 31 and 37, “fidutial” should be “fiducial”. Appropriate correction is required. Claim Objections Claim 60 is objected to because of the following informalities: “fidutial” should be “fiducial”. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 51-52 and 62 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The term “board bed” is indefinite because the specification does not clearly redefine the term. The issue with the terminology board bed is due to issues with the drawings and specification. There are a variety of board beds or auxiliary frames designated in the drawings with several numbers to cover each iteration such as 250, 260, and etc. However, the character used for board bed is, “11” which does not appear in the drawings. Since it is denoted separately, it must be something other than the auxiliary frames. However, the specification nor drawings do nothing to further define the term, and the plain meaning of the term is a bed to hold the board which is covered by the auxiliary frame. So, is it the auxiliary frame that is already claimed, is it a separate alternative auxiliary frame, or a backup auxiliary frame that receives the boards as well? It is unclear and indefinite what separates the board bed from the auxiliary frame which renders the claim indefinite. Claim 52 is similarly rejected as it inherits the issue from claim 51. The term “general workspace image” in claim 62 is a relative term which renders the claim indefinite. The term “general workspace image” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. The term general workspace image is a relative term as what is a general workspace image? Could it not just be a picture of the substrate holding device holding a substrate as that is what is being worked on? Would it simply be an image covering the whole machine that performs the work or a picture of the workplace more generally? Would a picture of the building count as a general workspace image? It would be a picture of the workspace generally. However, the system as described could not manage to perform this task. There are a wide variety of potential “general workspace images” with plenty being beyond the capability of the invention, so the term is indefinite. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 47-49, 51-54, 57, 60-63, and 66 are rejected under 35 U.S.C. 103 as being unpatentable over Hirotake et al. (JP 2012234488 A), hereinafter referred to as Hirotake, in view of Diao et al. (US 20190362486 A1), hereinafter referred to as Diao. In regards to claim 47, Hirotake discloses a multifunctional system for electronic devices comprising: a main frame having a receiving portion to removably receive an auxiliary frame (Paragraph 14, Discloses that the frame 30 holds a substrate holding device that is analogous to the auxiliary frame), the auxiliary frame comprising a supporting region to support the electronic device (Paragraph 14, Discloses that the frame 30 holds a substrate holding device that is analogous to the auxiliary frame as it supports the holding of an electronic device or a substrate); an image sensor to obtain a first image of at least a portion of the supporting region (Paragraph 9, Discloses the use of a CCD camera to image the substrate); a controller to receive the first image obtained by the image sensor (Paragraph 11, Discloses a control device/ control computer); partition each of the first copies into cut-outs of a predetermined size, the size referring to a number of pixels (Paragraph 8, The scan window is disclosed to be set to a predetermined size which would contain a predetermined number of pixels and would serve as a cut out or segment of a broader image). Hirotake does not explicitly disclose a driving arm to drive a head assembly over the supporting region, the head assembly having a tool in data communication with the controller; wherein the controller is to generate a plurality of first copies of the first image wherein at least one of the first copies has a different pixel density value than the rest of the first copies, apply a first neural network to each of the cut-outs for detecting electronic components, and determine presence and position of an electronic component on the supporting region from the output of the first neural network. However, Diao does disclose a driving arm to drive a head assembly over the supporting region, the head assembly having a tool in data communication with the controller (Paragraphs 42 and 98, Discloses the use of robotic arms that are over the supporting region in paragraph 42 with paragraph 98 disclosing a controller); wherein the controller is to generate a plurality of first copies of the first image wherein at least one of the first copies has a different pixel density value than the rest of the first copies (Paragraph 51, Discloses an image processing module that compresses the images to a lower resolution and crops or cuts out portions of the image), apply a first neural network to each of the cut-outs for detecting electronic components (Paragraph 51, Discloses a segmentation model that is used to identify components), and determine presence and position of an electronic component on the supporting region from the output of the first neural network (Paragraphs 4 and 9, Determines the positions of electronic components). It would have been obvious to combine the teachings of Hirotake and Diao. Reducing the resolution of the image to compress the size would lead to a predictable increase in processing efficiency as the compressed images with lower resolutions would allow for faster processing and less storage space being required. As such, it would be prima facie obvious to combine these two arts. In regards to claim 48, Hirotake discloses wherein the auxiliary frame comprises a dedicated device, the main frame having a main connector connectable to an auxiliary connector of the auxiliary frame, in such a way that an electrical connection is achieved between the main connector and the auxiliary connector in a coupled position of the main frame and the auxiliary frame (Paragraphs 9-11 and Figure 30, Hirotake discloses that the data collection, control apparatus, and mounting module are connected physically as shown in Figure 30 along with figure 11 disclosing that each computer is connected to each other and a host computer), the dedicated device being electrically connected to the auxiliary connector (Paragraphs 9-11 and Figure 30, The physical connections are electrical connections in an electrical circuit assembly system). In regards to claim 49, Hirotake discloses wherein the auxiliary frame has a board connector to be connected to a printed circuit board and the board connector is electrically connected to the dedicated device (Paragraphs 9-11 and Figure 30, The physical connections are electrical connections in an electrical circuit assembly system). In regards to claim 51, Hirotake discloses wherein the supporting region comprises a board bed to receive a printed circuit board and a tray to receive the electronic component (Paragraphs 14 and 20, Discloses that the frame 30 holds a substrate holding device that is analogous to the auxiliary frame as it supports the holding of an electronic device or a substrate with paragraph 20 disclosing that electronic components are on a tray). In regards to claim 52, Hirotake discloses wherein the tray is configured to receive electronic components randomly arranged on the tray (Paragraph 20, The objects can be arranged randomly on the tray as there is no necessary order specified). In regards to claim 53, Hirotake discloses wherein the portion of the supporting region includes, at least, a portion of the printed board circuit (Paragraph 14, Discloses that the frame 30 holds a substrate holding device that is analogous to the auxiliary frame as it supports the holding of an electronic device or a substrate which covers the claim). In regards to claim 54, Hirotake discloses wherein the head assembly comprises a mounting tool configured to mount an electronic component (Paragraphs 21-22, Discloses a mounting head that uses a suction nozzle to move electronic pieces), the mounting tool being in data communication with the controller (Paragraph 11, Discloses a control device/ control computer). In regards to claim 57, it is similar to claim 47, and it is rejected similarly. In regards to claim 60, Hirotake discloses comprising: receiving, by the controller, a second image of the supporting region (Paragraph 8, Hirotake discloses in the first two lines that multiple images are taken during the image capturing process); identifying, by the controller, a high-interest region in the first image or the second image by applying a second neural network to the second image (Paragraph 8, Hirotake discloses that a neural network is used in identifying the reference marks), the high-interest comprising at least one of printed circuit board, a tray, an electronic component, a fidutial mark, a feeder or a combination thereof (Paragraph 8, Hirotake discloses that a neural network is used in identifying the reference marks with these reference marks being analogous to fiducial marks). In regards to claim 61, Hirotake discloses comprising: computing, by the controller, a path to be followed by a head camera of the head assembly for capturing the identified high-interest regions (Paragraphs 36-37, Discloses that the scan window goes along a path that is predetermined for the reference marks). In regards to claim 62, Hirotake discloses comprising: generating, by the controller, a composition of captured images into general workspace image (Paragraph 9, Discloses the use of a CCD camera to image the substrate which is within the general workspace). In regards to claim 63, Hirotake discloses comprising: providing a set of training cut-outs of training first copies, wherein the training cut-outs are of a predetermined size, the size referring to a number of pixels (Paragraph 8, The scan window is disclosed to be set to a predetermined size which would contain a predetermined number of pixels and would serve as a cut out or segment of a broader image). Hirotake does not explicitly disclose training the first neural network with the set of training cut-outs with an associated classification label. However, Diao does disclose training the first neural network with the set of training cut-outs with an associated classification label (Paragraphs 105-106, Diao discloses training their system using labelled data). In regards to claim 66, it is similar to claim 47, and it is similarly rejected. Claim 50 is rejected under 35 U.S.C. 103 as being unpatentable over Hirotake et al. (JP 2012234488 A), hereinafter referred to as Hirotake, in view of Diao et al. (US 20190362486 A1), hereinafter referred to as Diao, as applied to claims 47-49, 51-54, 57, 60-63, and 66 above, and further in view of Salman et al. (“DESIGN AND IMPLELMENTATION A PC BASED SYSTEM FOR CIRCUIT TESTING”), hereinafter referred to as Salman. In regards to claim 50, neither Hirotake nor Diao explicitly disclose wherein the dedicated device is an active testing circuit configured to feed the printed circuit board in an operation status with an input signal and to receive an output signal from the printed circuit board, and the controller is configured to control the active testing circuit. However, Salman does explicitly disclose wherein the dedicated device is an active testing circuit configured to feed the printed circuit board in an operation status with an input signal and to receive an output signal from the printed circuit board (Abstract and pages 2145-2151, Discloses the resistor testing circuit in the abstract which is described in more detail on pages 2145-2151), and the controller is configured to control the active testing circuit (Pages 2145-2151, These pages, particularly, pages 2147-2151 depict in the figures a program for controlling the testing circuit from a controller or computer with pages 2146-2149 detailing the user interface for such a program). It would be prima facie obvious to combine the teachings of these arts as having an explicit circuit to conduct testing would lead to a predictable increase in accuracy of fault detection. The usage of a test circuit would allow for testing to occur that could detect objects that have been attached poorly or of flawed components being attached such as faulty resistors or other related issues. Therefore it would have been obvious to combine the teachings of these arts. Claims 55-56 and 64 are rejected under 35 U.S.C. 103 as being unpatentable over Hirotake et al. (JP 2012234488 A), hereinafter referred to as Hirotake, in view of Diao et al. (US 20190362486 A1), hereinafter referred to as Diao, as applied to claims 47-49, 51-54, 57, 60-63, and 66 above, and further in view of Bamehama et al. (US 20210133496 A1), hereinafter referred to as Bamehama. In regards to claim 55, Diao discloses and the controller is to compute a layout of a printed circuit board from an output of the first neural network (Paragraphs 112-113, Discloses that the system uses predefined layouts and determines the layout via photos of the PCB) and determine a test to be performed on the printed circuit board by comparing the layout of the printed circuit board with pre-determined layouts and associated tests (Paragraphs 102-103, Discloses that the sub portions are tested where the sub-portions correspond to specific parts of the PCB that were part of the layout). Neither Diao or Hirotake explicitly disclose wherein the head assembly comprises an electrical probe. Bamehama discloses wherein the head assembly comprises an electrical probe (Paragraphs 76 and 81, Bamehama discloses an electrical probe used to electrically test the board). It would have been obvious to combine the teachings of these two arts as the inclusion of an electrical probe would lead to a predictable increase in accuracy as the electrical probe would allow for more accurate fault detection as it could test the electrical issues from misplaced chips in the board. As such, it would be prima facie obvious to combine. In regards to claim 56, Hirotake discloses wherein the head assembly comprises a mounting tool and the supporting region comprises a tray for receiving electronic components to be mounted, and the controller is configured to control the operation of the driving arm (Paragraphs 11, 14, and 20-22, Discloses a control device/ control computer and 21-22 disclose a mounting head that uses a suction nozzle to move electronic pieces with 14 and 20 disclosing that the frame 30 holds a substrate holding device that is analogous to the auxiliary frame as it supports the holding of an electronic device or a substrate with paragraph 20 disclosing that electronic components are on a tray). In regards to claim 64, Diao discloses comprising: computing, by the controller, a layout of a printed circuit board from the output of the first neural network (Paragraphs 112-113, Discloses that the system uses predefined layouts and determines the layout via photos of the PCB); determining, by the controller, a test to be performed on the printed circuit board, by comparing the printed circuit board layout with pre-determined pattern layouts and associated tests (Paragraphs 102-103, Discloses that the sub portions are tested where the sub-portions correspond to specific parts of the PCB that were part of the layout). Neither Diao nor Hirotake disclose operating, by the controller, a head assembly having an electrical probe to measure an electrical parameter or signal on an electronic component. However, Bamehama does disclose operating, by the controller, a head assembly having an electrical probe to measure an electrical parameter or signal on an electronic component (Paragraphs 76 and 81, Bamehama discloses an electrical probe used to electrically test the board). It would have been obvious to combine the teachings of these two arts as the inclusion of an electrical probe would lead to a predictable increase in accuracy as the electrical probe would allow for more accurate fault detection as it could test the electrical issues from misplaced chips in the board. As such, it would be prima facie obvious to combine. Claim 65 is rejected under 35 U.S.C. 103 as being unpatentable over Hirotake et al. (JP 2012234488 A), hereinafter referred to as Hirotake, in view of Diao et al. (US 20190362486 A1), hereinafter referred to as Diao and Bamehama et al. (US 20210133496 A1), hereinafter referred to as Bamehama, as applied to claims 55-56 and 64 above, and further in view of Rudd et al. (US 20160078610 A1), hereinafter referred to as Rudd. In regards to claim 65, Hirotake, Diao, and Bamehama do not explicitly disclose comprising: driving the head assembly to mount electronic components stored in trays onto the printed circuit board by pick and place. However, Rudd does disclose comprising: driving the head assembly to mount electronic components stored in trays onto the printed circuit board by pick and place (Paragraph 3, Discloses that their training system can be utilized with pick and place machines). It would have been obvious to combine the teachings of these arts. It would be simple substitution to combine these arts. The placement method of Hirotake is not explicitly disclosed to be a pick and place machine, pick and place machines have been used for assembling PCB boards since the 1960s. Simply substituting the mechanism of Hirotake for that of a pick and place machine would be prima facie obvious as both are analogous systems for moving machine parts around a PCB board. Allowable Subject Matter Claim 59 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CONOR AIDAN O'MALLEY whose telephone number is (571)272-0226. The examiner can normally be reached Monday - Friday 9:00 am. - 5:00 pm. EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Gregory Morse can be reached at 5712723838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CONOR A O'MALLEY/Examiner, Art Unit 2675 /GREGORY A MORSE/Supervisory Patent Examiner, Art Unit 2698
Read full office action

Prosecution Timeline

Dec 26, 2024
Application Filed
Sep 08, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
71%
Grant Probability
67%
With Interview (-4.3%)
2y 10m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 42 resolved cases by this examiner. Grant probability derived from career allowance rate.

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