Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-15 are presented for Examination.
DETAILED ACTION
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5, 8-15 are rejected under 35 U.S.C. 103 as being unpatentable over Konnail et.al. (U.S Patent Application Publication 2018/0018012; hereinafter “Konnail”; )
Regarding Claims 1, 12, 15, Konnail discloses, An electronic circuit for powering multiple electronic systems of an electronic control unit of a vehicle, the electronic circuit comprising [0009; Fig.1];
a power input detector, which is configured to detect an input voltage and to generate a first set signal at an output of the power input detector depending on the detected input voltage [ “the power control system 50 can be implemented in a power system (e.g., the power system 10) that can be implemented as a vehicular power system, an industrial power system, or any of a variety of other power systems, such as powered via a battery. In the example of FIG. 2, the power control system 50 is configured to activate and deactivate an enable signal EN based on an ignition signal IGN, which can correspond to a vehicle ignition signal (e.g., provided on an ignition pin of an associated integrated circuit (IC))”, 0015; “The activation controller 52 includes a trigger detection circuit 56 that is configured to detect when the ignition signal IGN has an amplitude that is greater than a predetermined threshold amplitude, demonstrated as a signal IGN_TH in the example of FIG. 2, and to assert a trigger signal TRG in response to the ignition signal IGN having a predetermined amplitude relative to the predetermined threshold amplitude IGN_TH…”, 0016; “the ignition signal IGN may increase in amplitude very slowly (0.5V/min), such as based on being included in a power system in which the IGN pin is connected directly to a battery.”, 0017];
wherein the latch is associated with one of the multiple electronic systems, wherein the output of the power input detector is connected to a respective set input of the latch [Fig.1, 2; ( i.e connection between trigger detector 56 and SR-latch 60); “The set signal SET is provided to a set-input of an SR-latch 60 that is configured to assert the enable signal EN at an output in response to the assertion of the trigger signal TRG. The SR-latch 60 also includes a reset-input that receives the reset signal RES. The enable signal EN can be output from the power control system 50 to activate a power supply that is configured to generate a power voltage V.sub.SEC (e.g., the power voltage V.sub.SEC generated via the second power supply 16 in the example of FIG. 1). Therefore, in response to the trigger signal TRG being asserted, the enable signal EN is latched until the reset signal RES is asserted. .., 0017], wherein each of the multiple latches is configured to generate a respective enable signal at an output of the respective latch depending on the first set signal [“…Therefore, the trigger detection circuit 56 asserts the trigger signal TRG to assert the enable signal EN only when the ignition signal IGN achieves a sufficient amplitude, and the SR-latch 60 latches the enable signal EN to de-bounce the ignition signal IGN”, 0017] and
power management circuitry[ “power supply2 16”, Fig.1] ,
wherein the latch is associated to the power management circuitry [ “.. the power control system 12 provides the enable signal EN, upon being activated, to the second power supply 16 to activate the second power supply 16 to generate the second power voltage V.sub.SEC at a corresponding output thereof…”, 0012],
wherein output of the latch is connected to its associated power management circuitry, wherein power management circuitries is associated to one of the multiple electronic systems and configured to power its associated electronic system depending on the enable signal [ “The second power voltage V.sub.SEC, in addition to being provided to the power control system 12, is configured to provide power from its output to one or more ancillary electronic devices 18. As an example, the ancillary electronic device(s) 18 can correspond to any of a variety of vehicle electronic systems, which can be implemented on one or more integrated circuit (IC) chips, such as driver controls, navigation, stereo, illumination, temperature and environment controls, or a variety of other electronic systems.”, 0012; 0014; “the power control system 50 can thus comply with strict low power consumption requirements by implementing separate power supplies for the activation controller 52 and the deactivation controller 54. Thus, the enable signal EN is provided to a separate power supply that generates the second power voltage V.sub.SEC (e.g., the second power supply 16) from the power supply that generates the first power voltage V.sub.PRI (e.g., the first power supply 14)…”, 0023; ( i.e activating the devices / electronic systems based on the enable signal from the latch to the second power supply)].
Konnail also discloses an electronic control unit, wherein the electronic control unit comprises the multiple electronic systems the electronic control arrangement comprises an electronic control unit, which comprises the electronic circuit according to wherein the electronic circuit comprises the multiple electronic systems[0012; Fig.1] (as laid out in claim 15).
However, Konnail does not expressly disclose multiple latches, multiple power management circuitries. Specifically, Konnail teaches a latch circuitry associated to a power management circuitry and associated devices / electronic systems. Konnail does not teach multiple latches associated to respective power management circuitries with corresponding electronic systems.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Konnail to implement ” multiple latches, wherein each of the multiple latches is associated with one of the multiple electronic systems ; multiple power management circuitries, wherein each of the multiple latches is associated to one of the multiple power management circuitries, wherein each of the multiple power management circuitries is associated to one of the multiple electronic systems and configured to power its associated electronic system depending on the enable signal”, since it has been held that mere duplication of parts has no patentable significance unless a new and unexpected result is produced and it involves only routine skill in the art., In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960).
Regarding Claims 2, 14, Konnail discloses, The electronic circuit according to claim 1, further comprising a reset input of the latch, wherein the reset input is connectable to a first output of the associated electronic system, wherein latch is configured to switch off the enable signal depending on a first reset signal at the reset input [ “The SR-latch 60 also includes a reset-input that receives the reset signal RES. The enable signal EN can be output from the power control system 50 to activate a power supply that is configured to generate a power voltage V.sub.SEC (e.g., the power voltage V.sub.SEC generated via the second power supply 16 in the example of FIG. 1). Therefore, in response to the trigger signal TRG being asserted, the enable signal EN is latched until the reset signal RES is asserted.”, 0017; “..Accordingly, in response to an under-voltage condition with respect to the first power voltage V.sub.PRI, the reset signal RES is asserted to de-assert the enable signal EN. Accordingly, in response to de-asserting the enable signal EN, the power control system 50 can deactivate the second power supply 16 during the under-voltage condition of the first power voltage V.sub.PRI.”, 0018; “therefore, in response to assertion of the level-shifted disable signal DIS_LV, and corresponding to the disable signal DIS, the logic-OR gate 66 asserts the reset signal RES to reset the latch 60 and thereby de-assert the enable signal EN (e.g., to logic-low).”, 0019] .
However, Konnail does not expressly disclose multiple latches, wherein each latch is configured to switch off the enable signal depending on a first reset signal at the respective reset input.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Konnail to implement ” multiple latches, wherein each latch is configured to switch off the enable signal depending on a first reset signal at the respective reset input ”, since it has been held that mere duplication of parts has no patentable significance unless a new and unexpected result is produced and it involves only routine skill in the art., In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960).
Regarding Claim 3, Konnail discloses , wherein the first set signal and/or the first reset signal comprises a momentary signal pulse, preferably an active low signal pulse [0019].
Regarding Claim 4, Konnail discloses , The electronic circuit according to claim 1 comprises further comprising a computing unit, which is connected to the set input of a first latch of the multiple latches and configured to generate a second set signal, wherein the first latch is configured to generate the respective enable signal depending on the second set signal [“ The second power voltage V.sub.SEC, in addition to being provided to the power control system 12, is configured to provide power from its output to one or more ancillary electronic devices 18. As an example, the ancillary electronic device(s) 18 can correspond to any of a variety of vehicle electronic systems, which can be implemented on one or more integrated circuit (IC) chips, such as driver controls, navigation, stereo, illumination, temperature and environment controls, or a variety of other electronic systems.”, 0012-0013; ( i.e generating the enable signal to power the devices. It is apparent to generate the second set signal based on the trigger signal to activate the enable signal)].
Regarding Claim 5, Konnail discloses , the electronic circuit according to claim 4, comprises further comprising the multiple electronic systems, wherein a first electronic system of the multiple electronic systems, which is associated to the first latch, comprises the computing unit [0012] .
Regarding Claim 8, Konnail discloses a power supply unit, which is connected to a power input of the electronic circuit and configured to supply the power input detector and/or the multiple latches and/or the computing unit with an operating voltage derived from the input voltage provided by the power input [0015-0017; Fig.1]
Regarding Claim 9, Konnail discloses wherein power management circuitry is connected to the power input and configured to provide an operating voltage to the respective associated electronic system derived from the input voltage provided by the power input [0017; Fig.1].
However, Konnail does not expressly disclose multiple power management circuitries.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Konnail to implement ” multiple power management circuitries” since it has been held that mere duplication of parts has no patentable significance unless a new and unexpected result is produced and it involves only routine skill in the art., In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960).
Regarding Claim 10, Konnail discloses wherein the output of the power input detector and/or the first output and/or the second output and/or the third output comprises an open drain circuit which is configured to provide the momentary signal pulse, or an open collector circuit, which is configured to provide the momentary signal pulse[0019-0020; Fig.2].
Regarding claim 11, Konnail discloses each of the multiple electronic systems comprises one or more processor cores [0012-0013; 0022]
Regarding Claim 13, Konnail discloses , wherein the latch latches receives the first set signal from the power input detector [[(5)]] in parallel [0015-0017; Fig.2].
However, Konnail does not expressly disclose wherein each of the multiple latches to receive the first set signal in parallel .
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Konnail to implement for each of the multiple latches to receive the first set signal in parallel”, since it has been held that mere duplication of parts has no patentable significance unless a new and unexpected result is produced and it involves only routine skill in the art., In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960).
Allowable Subject Matter
Claims 6 and 7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Neves et al., U.S Patent 10,831,938, teaches techniques for parallel power down processing of an integrated circuit (IC) design are described , includes performing power down processing of net drivers in the plurality of nets, wherein the power down processing of at least a subset of the plurality of nets is performed in parallel.
Chapel et al., U.S Patent Application Publication 2018/0101206, teaches systems and methods are provided for reliable redundant power distribution. Some embodiments include micro Automatic Transfer Switches (micro-ATSs), including various components and techniques for facilitating reliable auto-switching functionality in a small footprint (e.g., less than ten cubic inches, with at least one dimension being less than a standard NEMA rack height). Other embodiments include systems and techniques for integrating a number of micro-ATSs into a parallel auto-switching module for redundant power delivery to a number of devices. Implementations of the parallel auto-switching module are configured to be mounted in, on top of, or on the side of standard equipment rack
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GAYATHRI SAMPATH whose telephone number is (571)272-5489. The examiner can normally be reached on Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jaweed Abbaszadeh can be reached on 5712701640. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/GAYATHRI SAMPATH/ Examiner, Art Unit 2176
/JAWEED A ABBASZADEH/ Supervisory Patent Examiner, Art Unit 2176
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