Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Claims 1-10 in the reply filed on March 26, 2026 is acknowledged. It was noted that the claims were incorrectly grouped in the Restriction requirement mailed March 12, 2026. The proper designations are Group I (Claims 1-10), Group II (Claims 11-18), and Group III (Claims 19-20). Claims 11-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on .
Remarks
The Office has cited particular columns, line numbers, paragraph numbers, references, or figures in the references applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses to fully consider the reference in entirety, as potentially teaching all or part of the claimed invention. See MPEP § 2141.02 and § 2123.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, and 9 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Burns et al. (US 7,821,280 B2, hereinafter referred to as Burns).
Regarding claim 1, Burns discloses a semiconductor device comprising (col. 3, lines 55+, Fig. 1);
an amplifier circuit (optional scaling amplifier 210) biased by a reference current or a reference voltage and configured to amplify an input signal (“optional scaling amplifier 210 receives the selected sense signal 252 from multiplexer 208 and scales selected sense signal 252 according to the dynamic range of digitizer 212 to produce a scaled sense signal 260”, col. 5, ll. 55+; Figs. 2; Fig. 3);
a process monitoring circuit (process monitor module 182) configured to output a control code signal to compensate a manufacturing process deviation of the semiconductor device (Abstract; col. 4, ll. 27+; Fig. 1 and Fig. 2);
and a bias circuit (bias circuit 204) configured to receive the control code signal and to change the reference current or the reference voltage based on the control code signal (“Bias circuit 204 includes one or more current generators for generating one or more bias currents 218”, col. 4, ll. 45+; controller 114 generates one or more digital control signals 120 to adjust operational circuit parameters including bias currents, col. 4, ll. 10+).
Regarding claim 2, Burns discloses the semiconductor device of claim 1, wherein the bias circuit comprises a variable resistor whose resistance value changes based on the control code signal to change the reference current or the reference voltage (“Bias circuit 204 includes one or more current generators for generating one or more bias currents 218”, col. 4, ll. 45+; controller 114 generates one or more digital control signals 120 to adjust operational circuit parameters including bias currents, col. 4, ll. 10+; current generators 304-307 in Fig. 3 and 510, 514, 518 in Fig. 5 use resistors in the reference paths that are effectively trimmed/adjusted via the digital control signals from the process monitor output).
Regarding claim 9, Burns discloses the semiconductor device of claim 1, wherein the control code signal is a digital code signal (“process monitor module 182 produces one or more digital signals 164”, col. 4, ll. 6+, or codes representative of the one or more of sense signals 230, col. 4, ll. 51+).
Allowable Subject Matter
Claims 3-8 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Gk et al. (US7388419 B2) discloses PVT variation detection and compensation circuit. Khan et al. (US7495465 B2) discloses variation detection and compensation circuit.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL D CHANG whose telephone number is (571)272-1801. The examiner can normally be reached M-F 8-5 EST.
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/DANIEL D CHANG/ Primary Examiner, Art Unit 2845
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