DETAILED ACTION
This Office action responds to Applicant’s invention filed on 09/11/2024.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Amendment Status
The present Office action is made with all previously suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-20.
Specification Objection
The specification has been checked to the extend necessary to determine the presence of possible minor errors. However, the Applicant’s cooperation is requested in correcting any errors of which Applicant may become aware in the specification.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims.
Therefore, the electron transport layer under the protective layer recited in claim 17 must be shown in the drawings or the feature(s) canceled from the claim(s).
No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 16 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim (US 2024/0179955).
Regarding claim 16, Kim shows (see, e.g., Kim: figs. 12-13) all aspects of a method of manufacturing a display device 1_2 (see, e.g., Kim: par. [0201]), comprising:
Forming a first electrode layer PXE
Forming a hole injection layer HILa_2/ HILb_2 on the first electrode layer PXE
Forming a hole UDA_2 in the hole injection layer HILa_2/ HILb_2
Forming a hole transport layer HTL on the hole injection layer HILa_2/ HILb_2 and filling the hole UDA_2 with the hole transport layer HTL
Forming an emission layer EML1/EML2/EML3 on the hole transport layer HTL
Forming an electron transport layer ETL on the emission layer EML1/EML2/EML3
Forming a second electrode layer CE on the electron transport layer ETL
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-15, and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Cho (US 2023/0064771) in view of Kim (US 2024/0179955).
Regarding claim 1, Cho shows (see, e.g., Cho: figs. 1A-1C, 4, and 6) most aspects of a display device 100 (see, e.g., Cho: par. [0062]), comprising:
A substrate SUB on which a normal area NA allowing a plurality of first pixels to be disposed and having a first resolution and an optical area OA1/OA2 allowing a plurality of second pixels to be disposed and having a second resolution lower than the first resolution are defined see, e.g., Cho: par. [0080] – [0081])
A first electrode layer AE on the substrate SUB
A bank layer BANK on the substrate SUB, covering a portion of the first electrode layer AE, and comprising an opening area EA
However, Cho fails (see, e.g., Cho: figs. 1A-1C, 4, and 6) to show a hole injection layer on the first electrode layer AE. Kim, in a similar device to Cho, shows (see, e.g., Kim: figs. 12-13) a hole injection layer HILb_2 on the first electrode layer PXE. Kim also shows (see, e.g., Kim: figs. 12-13) that the hole injection layer HILb_2 is provided on the pixel electrodes PXE for the purpose of promoting injection of holes from the pixel electrodes PXE to the light emitting layers EML1/EML2/EML3 (see, e.g., Kim: par. [0004]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use a hole injection layer on the first electrode layer of Kim in the device of Cho in order to promote injection of holes from the pixel electrodes to the light emitting layers.
Cho in view of Kim shows (see, e.g., Kim: figs. 12-13):
The hole injection layer HILa_2/ HILb_2 on the first electrode layer PXE and the bank layer PDLa/PDLb_2, and comprising at least one hole UDA_2 on the bank layer PDLa/PDLb_2
A hole transport layer HTL on the hole injection layer HILa_2/ HILb_2
An emission layer EML1/EML2/EML3 on the hole transport layer HTL
Regarding claim 2, Cho in view of Kim shows (see, e.g., Kim: figs. 12-13) that the at least one hole UDA_2 has the hole transport layer HTL therein.
Regarding claim 3, Cho in view of Kim shows (see, e.g., Kim: figs. 12-13) that the hole transport layer HTL contacts the bank layer PDLa/PDLb_2 at the at least one hole UDA_2.
Regarding claim 4, Cho in view of Kim shows (see, e.g., Kim: figs. 12-13) that the at least one hole UDA_2 is located in an area other than the opening area (see, e.g., Kim: par. [0145]).
Regarding claim 5, Cho in view of Kim shows (see, e.g., Cho: figs. 1A-1C, 4, and 6, and see, e.g., Kim: figs. 12-13) that:
The plurality of first pixels or the plurality of second pixels comprises a plurality of red subpixels, a plurality of green subpixels, and a plurality of blue subpixels (see, e.g., Cho: par. [0141])
wherein:
The at least one hole UDA_2 is located in at least one of a portion of the bank layer PDLa/PDLb_2 between a red subpixel PX1 among the plurality of red subpixels PX1 and a green subpixel PX2 adjacent to the red subpixel PX1 among the plurality of green subpixels PX2, a portion of the bank layer PDLa/PDLb_2 between the green subpixel PX2 among the plurality of green subpixels PX2 and a blue subpixel PX3 adjacent to the green subpixel PX2 among the plurality of blue subpixels PX3, and a portion of the bank layer PDLa/PDLb_2 between the blue subpixel PX3 among the plurality of blue subpixels PX3 and the red subpixel PX1 adjacent to the blue subpixel PX3 among the plurality of red subpixels PX1 (see, e.g., Kim: par. [0111])
Regarding claim 6, Cho in view of Kim shows (see, e.g., Kim: figs. 12-13) that the at least one hole UDA_2 is located in the portion of the bank layer PDLa/PDLb_2 between the blue subpixel PX3 and the red subpixel PX1 (see, e.g., Kim: par. [0111]).
Regarding claim 7, Cho in view of Kim shows (see, e.g., Kim: figs. 12-13) that the at least one hole UDA_2 is located on at least one of a line connecting a center point of the red subpixel PX1 and a center point of the green subpixel PX2, a line connecting a center point of the green subpixel PX2 and a center point of the blue subpixel PX3, and a line connecting a center point of the blue subpixel PX3 and a center point of the red subpixel PX1 (see, e.g., Kim: figs.4 and 12-13; direction DR2).
Regarding claim 8, Cho in view of Kim shows (see, e.g., Kim: figs. 12-13) that at least one hole UDA_2 is located on the line connecting the center point of the blue subpixel PX3 and the center point of the red subpixel PX1 (see, e.g., Kim: figs.4 and 12-13; direction DR2).
Regarding claim 9, Cho in view of Kim shows (see, e.g., Kim: figs. 12-13) that the at least one hole is located in the normal area DA or the optical area.
Regarding claim 10, Cho in view of Kim shows (see, e.g., Cho: figs. 1A-1C, 4, and 6) that the optical area OA2 comprises a transmissive area TA1 and a non-transmissive area OA2-TA2, and the second electrode layer CE is located on the emission layer EL in the non-transmissive area.
Regarding claim 11, Cho in view of Kim shows (see, e.g., Cho: figs. 1A-1C, 4, and 6) that a protective layer PAS1 disposed on the emission layer EL in the transmissive area TA1.
Regarding claim 12, Cho in view of Kim shows (see, e.g., Cho: figs. 1A-1C, 4, and 6) that the protective layer PAS1 and the second electrode layer CE are disposed in a same layer.
Regarding claim 13, Cho in view of Kim shows (see, e.g., Kim: figs. 12-13) that the hole injection layer HIL comprises a p-type dopant (see, e.g., Kim: par. [0159]; NDP-9 is a p-type dopant).
Regarding claim 14, Cho in view of Kim shows (see, e.g., Kim: figs. 12-13) that the at least one hole UDA_2 is located in an inclined portion or a flat portion of the bank layer PDLa/PDLb_2.
Regarding claim 15, Cho in view of Kim shows (see, e.g., Kim: figs. 12-13) that the display device 1 comprises a plurality of holes UDA_2, the plurality of holes UDA_2 are separated from each other, overlapped with each other, or provided in a line shape.
Regarding claim 19, Cho shows (see, e.g., Cho: figs. 1A-1C, 4, and 6) most aspects of a display device 100 (see, e.g., Cho: par. [0062]), comprising:
A substrate SUB on which a normal area NA disposed with a plurality of first pixels and having a first resolution and an optical area OA1/OA2 disposed with a plurality of second pixels and having a second resolution lower than the first resolution are defined see, e.g., Cho: par. [0080] – [0081])
wherein:
At least one of the normal area NA and the optical area OA1/OA2 comprises a plurality of subpixels, each of the plurality of subpixels comprises a light emitting element ED above the substrate SUB
The light emitting element ED comprises:
A first electrode layer AE
However, Cho fails (see, e.g., Cho: figs. 1A-1C, 4, and 6) to show a hole injection layer on the first electrode layer AE. Kim, in a similar device to Cho, shows (see, e.g., Kim: figs. 12-13) a hole injection layer HILb_2 on the first electrode layer PXE. Kim also shows (see, e.g., Kim: figs. 12-13) that the hole injection layer HILb_2 is provided on the pixel electrodes PXE for the purpose of promoting injection of holes from the pixel electrodes PXE to the light emitting layers EML1/EML2/EML3 (see, e.g., Kim: par. [0004]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use a hole injection layer on the first electrode layer of Kim in the device of Cho in order to promote injection of holes from the pixel electrodes to the light emitting layers.
Cho in view of Kim shows (see, e.g., Kim: figs. 12-13):
The hole injection layer HILa_2/ HILb_2 on the first electrode layer PXE and comprising at least one hole UDA_2
A hole transport layer HTL on the hole injection layer HILa_2/ HILb_2
An emission layer EML1/EML2/EML3 on the hole transport layer HTL
A second electrode layer CE on the emission layer EML1/EML2/EML3
Regarding claim 20, Cho in view of Kim shows (see, e.g., Kim: figs. 12-13) the display device 1_2 also comprises a bank layer PDLa/PDLb_2 between the first electrode layer PDLa/PDLb_2 and the hole injection layer HILa_2/ HILb_2 , and a portion of the bank layer PDLa/PDLb_2 corresponding to a light emitting area of each subpixel forms an opening area, and wherein the at least one hole UDA_2 is located between opening areas of adjacent subpixels.
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Maeda (US 2019/0280239).
Regarding claim 17, Kim shows (see, e.g., Kim: figs. 12-13) a method step of forming an electron transport layer ETL.
However, Kim fails (see, e.g., Kim: figs. 12-13) to show the method step of forming a protective layer on the electron transport layer ETL before forming the second electrode layer CE. Maeda, in a similar method to Kim, shows (see, e.g., Maeda: fig. 4) the method step of forming a protective layer 108 on the electron transport layer 102c (see, e.g., Maeda: par. [0040]) before forming the second electrode layer 104 (see, e.g., Maeda: par. [0041]). Maeda also shows (see, e.g., Maeda: fig. 4) that the protective layer 108 prevents the movement of carriers from the upper electrode 104 to the organic material layer 102 (see, e.g., Maeda: par. [0041]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use the method step of forming a protective layer of Maeda on the electron transport layer before forming the second electrode layer in the method of Kim in order to prevent the movement of carriers from the upper electrode to the organic material layer.
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Maeda in further view of Saito (US 2024/0023366).
Regarding claim 18, Kim in view of Maeda shows (see, e.g., Maeda: fig. 4) the method step of forming the protective layer 108.
However, Kim in view of Maeda fails (see, e.g., Maeda: fig. 4) to show a method step of removing the protective layer 108 after the second electrode layer 104 is formed. Saito, in a similar method to Kim in view of Maeda, shows (see, e.g., Saito: fig. 9C) a method step of removing the protective layer 17 after the second electrode layer 16 is formed. Saito also shows (see, e.g., Saito: fig. 9C) that removing the protective layer 17 after the second electrode layer 16 is formed is to form a groove 27 filled with moisture-proof film 29 that protects both the peripheral region 110B and the display area 110A (see, e.g., Saito: par. [0099] and [0055]).
Therefore, it would have been obvious at the time of the invention to one of ordinary skill in the art to use the method step of removing the protective layer of Saito after the second electrode layer is formed in the method of Kim in view of Maeda in order to form a groove filled with moisture-proof film that protects both the peripheral region and the display area.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIBERIU DAN ONUTA whose telephone number is (571) 270-0074 and between the hours of 9:00 AM to 5:00 PM (Eastern Standard Time) Monday through Friday or by e-mail via Tiberiu.Onuta@uspto.gov. If attempts to reach the examiner by telephone or email are unsuccessful, the examiner's supervisor, Wael Fahmy, can be reached on (571) 272-1705.
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/TIBERIU DAN ONUTA/Examiner, Art Unit 2814
/WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
