DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION. —The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 19-20 recites the limitation "the first external electrode" in the capacitor of claim 17. There is insufficient antecedent basis for this limitation in the claim.
Claims 19-20 recites the limitation "the second external electrode" in the capacitor of claim 17. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kamlya (US 2006/0284227).
Regarding claim 1, Kamlya discloses a capacitor (Fig. 1-15) comprising: a substrate (Fig. 1A, 12); and a plurality of unit capacitor cells (Fig. 1A, 16/24) disposed on the substrate (Fig. 1), wherein each of the plurality of unit capacitor cells includes: a lower electrode (Fig. 1A, 16); and an upper electrode (Fig. 1A, 18) disposed on the lower electrode (Fig. 1A), and the lower electrode included in a first unit capacitor cell among the plurality of unit capacitor cells is connected to the upper electrode included in a second unit capacitor cell among the plurality of unit capacitor cells (Fig. 1A, 24a to 16b).
Regarding claim 2, Kamlya further discloses: a first external electrode (Fig. 1A, 28); and a second external electrode (Fig. 1A, 38) disposed spaced apart in a longitudinal direction from the first external electrode (Fig. 1A), wherein the first external electrode is connected to the lower electrode included in a first connection capacitor cell disposed at a first end of the longitudinal direction among the plurality of unit capacitor cells (Fig. 1A), and the second external electrode is connected to the upper electrode included in a second connection capacitor cell (Fig. 1A) disposed at a second end of the longitudinal direction among the plurality of unit capacitor cells (Fig. 1A).
Regarding claim 3, Kamlya further discloses: a first external connection layer connecting the first external electrode and the lower electrode included in the first connection capacitor cell (Fig. 1A, a1 connects 16a to 28); and a second external connection layer connecting the second external electrode and the upper electrode included in the second connection capacitor cell (Fig. 1A, d2 connects 24d to 38).
Regarding claim 4, Kamlya further discloses: a first pad portion (Fig. 1A, 28) disposed between the first external connection layer (Fig. 1A, a1) and the first external electrode (Fig. 1A, T1); and a second pad portion (Fig. 1A, 36) disposed between the second external connection layer (Fig. 1A, c2) and the second external electrode (Fig. 1A, T2).
Regarding claim 5, Kamlya further discloses that the first external electrode and the second external electrode have a bump structure (Fig. 1A).
Regarding claim 6, Kamlya further discloses that the capacitor comprises a plurality of first external electrodes and a plurality of second external electrodes (Fig. 1A, 28/30/32/34/36/38).
Regarding claim 7, Kamlya further discloses: a first external electrode (Fig. 1A, 28); and a second external electrode (Fig. 1A, 36) disposed spaced apart in a longitudinal direction from the first external electrode (Fig. 1A), wherein the first external electrode is connected to the lower electrode included in a first connection capacitor cell disposed at a first end of a longitudinal direction among the plurality of unit capacitor cells (Fig. 1A, connected to 16a), and the second external electrode is connected to the lower electrode included in a second connection capacitor cell disposed at a second end of the longitudinal direction among the plurality of unit capacitor cells (Fig. 1A, connected to 16d).
Regarding claim 8, Kamlya further discloses: a first external electrode (Fig. 1A, 30); and a second external electrode (Fig. 1A, 38) disposed spaced apart in a longitudinal direction from the first external electrode (Fig. 1A), wherein the first external electrode is connected to the upper electrode included in a first connection capacitor cell disposed at a first end of a longitudinal direction among the plurality of unit capacitor cells (Fig. 1A), and the second external electrode is connected to the upper electrode included in a second connection capacitor cell disposed at a second end of the longitudinal direction among the plurality of unit capacitor cells (Fig. 1A).
Regarding claim 9, Kamlya further discloses an internal connection layer (Fig. 1A, 30) configured to have a via structure (Fig. 1A, a2) and to connect the lower electrode included in the first unit capacitor cell (Fig. 1A, 16b) and the upper electrode included in the second unit capacitor cell (Fig. 1A, 24a).
Regarding claim 10, Kamlya further discloses that the lower electrode included in the first unit capacitor cell includes a lower exposed portion without the upper electrode at an upper side (Fig. 1A, 16b at b1), and the upper electrode included in the second unit capacitor cell includes an upper protrusion protruding toward the lower exposed portion (Fig. 1A, right sides of 24a), and the internal connection layer is disposed between the lower exposed portion and the upper protrusion (Fig. 1A, 30 is connected between them).
Regarding claim 11, Kamlya further discloses that the internal connection layer includes: a first internal connection layer connected to the lower electrode (Fig. 1A, b1); a second internal connection layer connected to the upper electrode (Fig. 1A, a2); and a third internal connection layer connecting the first internal connection layer and the second internal connection layer (Fig. 1A, 30).
Regarding claim 12, Kamlya further discloses that the third internal connection layer has a plate-shaped structure (Fig. 1A).
Regarding claim 13, Kamlya discloses a capacitor (Fig. 1-15) comprising: a substrate (Fig. 1A, 12); and a plurality of unit capacitor cells (Fig. 1A, 16/24a-b) disposed on the substrate (Fig. 1A), wherein each of the plurality of unit capacitor cells includes: a lower electrode (Fig. 1A, 16); and an upper electrode (Fig. 1A, 24) disposed on the lower electrode, wherein the lower electrodes included in each of the plurality of unit capacitor cells are separated from each other (Fig. 1A), the upper electrodes included in each of the plurality of unit capacitor cells are separated from each other (Fig. 1A), and the plurality of unit capacitor cells are connected to each other in series (Fig. 1A).
Regarding claim 14, Kamlya further discloses that a plurality of electrode buried spaces having a groove structure are formed in the substrate (Fig. 1A, groove at 16/24), and a region where the electrode buried spaces are formed is divided into a plurality of unit cell areas (Fig. 1A), and one of the plurality of unit capacitor cells is disposed on one of the unit cell areas (Fig. 1A).
Regarding claim 15, Kamlya further discloses that the plurality of unit capacitor cells are connected along a unit cell connection direction that passes through each of the unit cell areas once (Fig. 1A, T2 touches each cell once).
Regarding claim 16, Kamlya further discloses that each of the unit cells areas includes: a plurality of first unit cell areas (Fig. 1A, 16a-b); and a plurality of second unit cell areas (Fig. 1A, 16 c-d), the plurality of unit capacitor cells disposed on the first unit cell areas are connected along a first unit cell connection direction passing through the first unit cell areas (Fig. 1A, 30), and the plurality of unit capacitor cells disposed on the second unit cell areas are connected along a second unit cell connection direction passing through the second unit cell areas (Fig. 1A, 36).
Claim(s) 17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nakamura et al (US 4723194).
Regarding claim 17, Nakamura discloses a capacitor (Fig. 1-3) comprising: a substrate (Fig. 2, 50); and a plurality of unit capacitor cells (Fig. 2, 101-107) disposed on the substrate (Fig. 2), wherein each of the plurality of unit capacitor cells includes: a lower electrode (Fig. 2, 3/7/11); and an upper electrode (Fig. 2, 2/4/8/12) disposed on the lower electrode, the lower electrode incudes a part on which the upper electrode is not disposed (Fig. 2, gap between electrodes), the upper electrode includes a part on which the lower electrode is not disposed (Fig. 2, gap between electrodes), two adjacent of the plurality of unit capacitor cells are connected with each other through the part of the lower electrode on which the upper electrode is not disposed and the part of the upper electrode disposed on which the lower electrode is not disposed (Fig. 2, at 15/17/19).
Allowable Subject Matter
Claims 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 18, the prior art fails to teach or make obvious, alone or in combination, the limitation of “a first external electrode; and a second external electrode disposed spaced apart in a longitudinal direction from the first external electrode, wherein the first external electrode is connected to the lower electrode through the part of the lower electrode on which the upper electrode is not disposed, and the second external electrode is connected to the upper electrode through the part of the upper electrode on which the lower electrode is not disposed” in combination with the other claim limitations.
Regarding claims 19-20, the prior art fails to teach or make obvious, alone or in combination, the limitation of “a first external connection layer connecting the first external electrode and the part of the lower electrode on which the upper electrode is not disposed; and a second external connection layer connecting the second external electrode and the part of the upper electrode on which the lower electrode is not disposed” in combination with the other claim limitations.
Additional Relevant Prior Art:
SHIN et al (US 2018/0061573) teaches relevant art in Fig. 1-5.
HARAGUCHI et al (US 2021/0050410) teaches relevant art in Fig. 1-46.
TAKE et al (US 2022/0384113) teaches relevant art in Fig. 1-13.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL P MCFADDEN whose telephone number is (571)270-5649. The examiner can normally be reached M-Thur 8am-9pm PST.
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/MICHAEL P MCFADDEN/Primary Examiner, Art Unit 2847
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