DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2005/0276547 to Wang et al. in view of US 2024/0361541 to Krichevsky et al.
Wang discloses in figures 9-13, an optical module assembly comprising:
An electric sub-assembly including a PCB and an electronic device mounted on the PCB (unlabeled chip in figure 11); and
An optical module (transceiver; abstract) including an interposer (66; figure 10) that includes a transparent material (paragraph 80), an optical sub-assembly (portion connected by optical coupling portion 84; figure 12, and a cover (housing 89),
Wherein one end portion of the PCB is inserted into the optical sub-assembly through an inserting hole formed on the sidewall of the optical sub-assembly, and the optical components and a substrate electrode formed on a surface of the one end portion of the PCB are electrically connected to each other by the interposer (Figure 13 depicts a sandwiched “slot” that couples a flex board with a rigid board that houses electro-optic components via the interposer portion 66).
It is noted that current claims do not detail the “inserting hole” in relation to the detailed portions of the interposer as shown in applicant figures.
However, Wang fails to show a detailed view of the interposer to show electrical contacts. With regard to dependent claims 2-12, these claims add various common components such as vias, heat sinks or alignment arrangements. It is noted that claims 10-12 discloses certain intermediate method steps for manufacturing the device and these are not positive limitations in an apparatus.
Krichevsky discloses in figure 9, an interposer section that details electrical traces, vias and associated electro-optic transmission components. Paragraph 25 discloses heat spreaders with metal casings and paragraph 84 discloses epoxy resins with the materials claimed in claim 9.
It would have been obvious to one having ordinary skill in the art to use an interposer as taught by Krichevsky to simplify and optimize the interposer in Wang for packaging depending on the intended use.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 2023/0317694 (carrier to interposer; figure 3).
US 2023/0299520 (general pluggable transceiver).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Eric K Wong whose telephone number is (571)272-2363. The examiner can normally be reached M-Tu, Th-F 8A-6P.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas Hollweg can be reached on 571-270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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ERIC K. WONG
Primary Examiner
Art Unit 2874
/Eric Wong/Primary Examiner, Art Unit 2874
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