DETAILED ACTION
This Office action is in response to the amendment of 10/30/2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 2 is objected to because of the following informalities: Line 2 recites “the IO devices” which should be –the plurality of IO devices--.
Claims 3-5 similarly recites instances of “the IO devices” and should be corrected
Appropriate correction is required.
Claim 3 is objected to because of the following informalities: Lines 10, 12, 14 recites “the IO devices” which should be –the one or more storage devices--.
Claims 3-5 similarly recites instances of “the IO devices” and should be corrected
Appropriate correction is required.
Claim 4 recites the limitations “…transmits data to be stored in the storage devices to the storage devices via the connecting cable of the second enclosure, and receives data output by the storage devices from the storage devices via the connecting cable of the second group,” of which the italicized phrase is unclear. It is suggested this limitation is simplified to --transmits to-be-stored data
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 3-5 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 3 recites “the processor controls…” (see Line 4) and “the processor further controls…” (see Line 10). There is no antecedent basis for this limitation in the claim. It is unclear as to whether the claimed processor is referring to the one or more processors that control the storage system, or a different processor altogether. For the purposes of examination, this shall be interpreted as the one or more processors of claim 1.
Claims 4 and 5 similarly recites “the processor” and is rejected under 35 USC 112(b) for the same reasons as claim 3, as outlined above.
Claim 3 recites “the storage device” (see Line 12 and 14), and there is no antecedent basis for this limitation in the claim. It is unclear as to whether the claimed storage device is referring to the one or more storage devices of claim 1, or a different storage device altogether. For the purposes of examination, this shall be interpreted as “transmits to-be-stored data to the [one or more] storage devices.”
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-5 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kakihara et al. (US 2013/0232377 A1) hereinafter Kakihara et al.
Regarding claim 1, Kakihara et al. teaches a storage system that is connected to a host machine and inputs or outputs data according to a request from the host machine (storage subsystem 1 is connected to HOST 40 Paragraph [0045] which sends I/O access requests Paragraph [0066]), the storage system comprising:
a first enclosure (controller housing Figure 1, #2) in which a plurality of controllers including a one or more processors that control the storage system are mounted (controller housing has controller units 20, 21 includes CPUs/control units which are processors for controlling the storage sub-system Paragraphs [0049], [0052]); and
a second enclosure (drive housing Figure 1, #3) in which one or more storage devices that store data transmitted from the host machine are mounted (drive housing is composed of enclosure units and a plurality of HDD Paragraphs [0049]),
a plurality of input/output (IO) devices (a plurality of EXP control units 3002, 3012, 3102, 3112 and its corresponding expander 3001, 3011, 3101, 3111, where EXP control unit uses control programs such as disk I/O program/control info to control the EXP and control accesses from the controller housing to the HDD Paragraph [0061], [0026]) that connect the storage system with the host machine, process a transmission protocol with the host machine, receive data to be stored in the storage system from the host machine and transmit data output by the storage system to the host machine are further provided (See Fig. 9 where the bolded and dotted lines which depicts processing of I/O accesses from the host to the storage sub-system where the plurality of EXPs under control of the EXP control units connect and enable the transmission of I/Os from host 40 to storage sub-system 500-550 for writes, and transmit data output from the LU back to the hosts for reads. Note that the IO devices can utilize an SAS or SATA-based communication protocol, or another type of protocol compatible with the storage sub-system Paragraph [0060]), and
the plurality of IO devices are mounted in the second enclosure (the EXP control unit is mounted in the drive housing as part of the enclosure unit Paragraph [0061]).
Regarding claim 2, Kakihara et al. teaches all the features with respect to claim 1, as outlined above.
Kakihara et al. further teaches wherein the IO devices are collectively mounted in the second enclosure (Fig. 1 depicts a plurality of EXP control units 3002-3112 and its corresponding EXP 3001-3111 which are mounted in the drive housing Figure 1, #3).
Regarding claim 3, Kakihara et al. teaches all the features with respect to claim 1, as outlined above.
Kakihara et al. further teaches wherein the first enclosure and the second enclosure are connected by a connecting cable (connection lines 20400-20411 Paragraph [0310] connect the controller housing 2 to drive housing 3),
the processor controls the IO device mounted on the second enclosure via the connecting cable, receives data received by the IO device from the host machine from the IO device via the connecting cable, and transmits data to be transmitted to the host machine to the IO device via the connecting cable, and the processor further controls the storage device mounted in the second enclosure via the connecting cable, transmits data to be stored in the storage device to the storage device via the connecting cable, and receives data output by the storage device from the storage device via the connecting cable (the internal CPUs are in charge of both write access requests Paragraphs [0089]-[0103] as well as read access requests Paragraphs [0104]-[0110]).
Regarding claim 4, Kakihara et al. teaches all the features with respect to claim 1, as outlined above.
Kakihara et al. further teaches wherein the first enclosure and the second enclosure are connected by a connecting cable of a first group, and a connecting cable of a second group different from the first group (controller housing 2 and drive housing 3 are connected by at least connection line 20400 and connection line 20411),
the processor controls the IO device mounted on the second enclosure via the connecting cable of the first group, receives data received by the IO device from the host machine from the IO device via the connecting cable of the first group, and transmits data to be transmitted to the host machine to the IO device via the connecting cable of the first group (CPU directly controls the processing of read/write requests [0089]-[0110] via the connection lines coupled to EXP control units Paragraph [0060]-[0061]), and the processor further controls the storage device mounted in the second enclosure via the connecting cable of the second group, transmits data to be stored in the storage device to the storage device via the connecting cable of the second enclosure, and receives data output by the storage device from the storage device via the connecting cable of the second group (CPU indirectly controls HDDs of the drive housing via the connection lines via EXP control units Paragraph [0060]-[0061]).
Regarding claim 5, Kakihara et al. teaches all the features with respect to claim 1, as outlined above.
Kakihara et al. further teaches wherein the first enclosure has two or more of the controllers mounted (controller housing has controller units 20, 21 includes CPUs/control units which are processors for controlling the storage sub-system Paragraphs [0049], [0052]), the IO device mounted in the second enclosure is controlled by the processor included in one controller of the two or more controllers mounted in the first enclosure, transmits data received by the IO device from the host machine to the processor of the one controller, and receives data to be transmitted to the host machine from the processor of the one controller (CPU directly controls the processing of read/write requests [0089]-[0110] via the connection lines coupled to EXP control units Paragraph [0060]-[0061]), and the storage device mounted in the second enclosure is controlled by the processors of two or more controllers among the controllers mounted in the first enclosure, receives data to be stored in the storage device from the processors of the two or more controllers, and transmits data output from the storage device to the processors of the two or more controllers (CPU indirectly controls HDDs of the drive housing via the connection lines via EXP control units Paragraph [0060]-[0061]).
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed on 12/3/2025.
Response to Amendment
With respect to applicant's amendment to the title of the invention, objections with respect to the same have been withdrawn.
Response to Arguments
Applicant's arguments filed 10/30/2025 have been fully considered but they are not persuasive. Specifically, it is argued (see page 9 of the Remarks), that Kakihara fails to teach the amended features of a plurality of input/output (IO) devices that connect the storage system with the host machine, process a transmission protocol with the host machine. Examiner disagrees. Kakihara teaches a plurality of EXP control units 3002, 3012, 3102, 3112 and its corresponding expander 3001, 3011, 3101, 3111 that control accesses from the controller housing to the storage sub-system. These IO devices of Kakihara enable the transmission of I/Os from host 40 to storage sub-system 500-550 for writes and transmit data output from the LU back to the hosts for reads, and utilize a communication protocol compatible with the storage sub-system such as SAS or SATA-based.
Examiner notes that the amended claims raise various new claim objections and rejections under 35 USC 112(b), as outlined above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Arroyo et al. (US 2017/0147525 A1) teaches that components of the computer and IO devices can reside in different enclosures/chassis, and utilize a PCIe-based communication protocol.
Hartman et al. (US 2016/0147699 A1) teaches an information handling system with a separate remote chassis and a plurality of I/O slots.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JANE W BENNER whose telephone number is (571)270-0067. The examiner can normally be reached Mon - Thurs (8 AM - 5 PM).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, REGINALD BRAGDON can be reached at (571) 272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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JANE W. BENNER
Primary Examiner
Art Unit 2131
/JANE W BENNER/Primary Examiner, Art Unit 2139
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