DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This Office Action has been issued in response to amendments filed 16 December 2025.
Claims 1 – 21 are pending.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1 – 21 are rejected on the ground of nonstatutory double patenting as being unpatentable over the following claims of U.S. Patent No. 10,942,843 in view of Bauchot. The claims at issue are obvious as outlined below.
Instant Application
Patent 10,942,843
9. A method for operating a system, comprising:
[receiving, at a host system,] a memory shape indicating a quantity of contiguous columns and a quantity of contiguous rows associated with storing one or more data elements at a memory system;
allocating[, by the host system,] a set of memory cells according to the memory shape, the set of memory cells comprising a multidimensional physical portion of a memory array of the memory system;
storing, at the memory system and in accordance with allocating the set of memory cells, a first data element in a first subset of memory cells of the set of memory cells; and
storing, at the memory system and in accordance with storing the first data element in the first subset of memory cells, a second data element in a second subset of memory cells of the set of memory cells, the second subset of memory cells being directly adjacent to the first subset of memory cells.
1. A method, comprising:
allocating a plurality of physically contiguous memory cells of a memory array, wherein the plurality of physically contiguous memory cells correspond to a user-defined quantity of physically contiguous columns and a user-defined quantity of physically contiguous rows of the memory array;
storing only a first data element of a first length in a first column of the plurality of physically contiguous memory cells according to a major dimension corresponding to a dimension of the plurality of physically contiguous memory cells by which data is written to the plurality of physically contiguous memory cells; and
subsequently storing only a second data element of a second length in a second column of the plurality of physically contiguous memory cells according to the major dimension, wherein the first length is different than the second length and the first column is adjacent to the second column.
9. A method for operating a memory system, comprising:
[receiving, at a host system,] a memory shape indicating a quantity of contiguous columns and a quantity of contiguous rows associated with storing one or more data elements at the memory system;
allocating[, by the host system] a set of memory cells according to the memory shape, the set of memory cells comprising a multidimensional physical portion of a memory array of the memory system;
storing, at the memory system and in accordance with allocating the set of memory cells, a first data element in a first subset of memory cells of the set of memory cells; and
storing, at the memory system and in accordance with storing the first data element in the first subset of memory cells, a second data element in a second subset of memory cells of the set of memory cells, the second subset of memory cells being directly adjacent to the first subset of memory cells.
6. A method, comprising:
allocating a plurality of physically contiguous memory cells of a memory array, wherein the plurality of physically contiguous memory cells correspond to a user-defined quantity of physically contiguous columns and a user-defined quantity of physically contiguous rows of the memory array;
storing only a first data element of a first length in a first row of the plurality of physically contiguous memory cells according to a major dimension corresponding to a dimension of the plurality of physically contiguous memory cells by which data is written to the plurality of physically contiguous memory cells; and
subsequently storing only a second data element of a second length in a second row of the plurality of physically contiguous memory cells according to the major dimension, wherein the first length is different than the second length and the first row is adjacent to the second row.
10. The method of claim 9, wherein [the memory shape indicates a vertical major dimension associated with the memory shape], wherein the vertical major dimension indicates for the memory system to store data elements column wise.
1. storing only a first data element of a first length in a first column of the plurality of physically contiguous memory cells according to a major dimension corresponding to a dimension of the plurality of physically contiguous memory cells by which data is written to the plurality of physically contiguous memory cells
11. The method of claim 10, wherein:
the first subset of memory cells comprises a first column of memory cells of the set of memory cells in accordance with the vertical major dimension, and
the second subset of memory cells comprises a second column of memory cells of the set of memory cells in accordance with the vertical major dimension
1. storing only a first data element of a first length in a first column of the plurality of physically contiguous memory cells according to a major dimension corresponding to a dimension of the plurality of physically contiguous memory cells by which data is written to the plurality of physically contiguous memory cells
subsequently storing only a second data element of a second length in a second column of the plurality of physically contiguous memory cells according to the major dimension, wherein the first length is different than the second length and the first column is adjacent to the second column
12. The method of claim 9, wherein [the memory shape indicates a horizontal major dimension associated with the memory shape,] wherein the horizontal major dimension indicates for the memory system to store data elements row wise.
6. storing only a first data element of a first length in a first row of the plurality of physically contiguous memory cells according to a major dimension corresponding to a dimension of the plurality of physically contiguous memory cells by which data is written to the plurality of physically contiguous memory cells
13. The method of claim 12, wherein:
the first subset of memory cells comprises a first row of memory cells of the set of memory cells in accordance with the horizontal major dimension, and
the second subset of memory cells comprises a second row of memory cells of the set of memory cells in accordance with the horizontal major dimension.
6. storing only a first data element of a first length in a first row of the plurality of physically contiguous memory cells according to a major dimension corresponding to a dimension of the plurality of physically contiguous memory cells by which data is written to the plurality of physically contiguous memory cells
subsequently storing only a second data element of a second length in a second row of the plurality of physically contiguous memory cells according to the major dimension, wherein the first length is different than the second length and the first row is adjacent to the second row
14. The method of claim 9, wherein the first data element and the second data element have a same length, or the first data element and the second data element have a different length.
1. wherein the first length is different than the second length
15. The method of claim 9, wherein a type of the first data element is equivalent to a type of the second data element, or the type of the first data element is different than the type of the second data element.
3. The method of claim 2, wherein the first data element is of a first type, the second data element is of a second type, and the first type is different than the second type.
16. The method of claim 9, wherein a type of the first data element and a type of the second data element comprises an integer, a floating point, or a string.
4. The method of claim 3, wherein the first type is an integer and the second type is a floating point or a string.
Regarding claim 9, Patent 843 teaches a method of storing to memory cells that are allocated based on memory shape but does not appear to explicitly teach said memory cells are allocated by host system that received said memory shape wherein said shape also indicates whether data element(s) is to be stored exclusively in column/row. However, Bauchot teaches defining (receiving) a two-dimensional shape (memory shape) having pad width (quantity of contiguous columns) and pad height (quantity of contiguous rows), and storing (allocate) said two-dimensional shape in persistent memory (memory array) wherein, i) CPU (host system) (coupled to said persistent memory via bus) performs these functions and ii) said two-dimensional shape includes initial direction of east (row wise) that results in data element 0000 (one or more data element) being stored only (exclusively) in a horizontal direction (row wise) (see claim 1 mapping below). In view of Bauchot, Patent 843 is modified such that said memory cells are allocated by CPU (host system) that defines (receiving) said memory shape wherein said memory shape also indicates a data element is to be stored only in horizontal direction (row wise).
Patent 843 and Bauchot are analogous art to the instant specification because they are in the same field of endeavor, storage management.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which said subject matter pertains to modify Patent 843 in the manner described supra because it would provide an encoding/decoding method that provides good tradeoff between power and computer resource (Bauchot, col 1 ln 12-24).
Regarding claim 10, Patent 843 in view of Bauchot teach the method of claim 9 with vertical major dimension. Bauchot also teaches two-dimensional shape (memory shape) having turn direction (vertical major dimension) (see claim 2 mapping below). In view of Bauchot, modified Patent 843 is further modified such that said memory shape also includes said vertical major dimension.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which said subject matter pertains to modify Patent 843 in the manner described supra because it would provide an encoding/decoding method that provides good tradeoff between power and computer resource (Bauchot, col 1 ln 12-24).
Regarding claim 12, Patent 843 in view of Bauchot teach the method of claim 9 with horizontal major dimension. Bauchot also teaches two-dimensional shape (memory shape) having turn direction (horizontal major dimension) (see claim 4 mapping below). In view of Bauchot, modified Patent 843 is further modified such that said memory shape also includes said vertical major dimension.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which said subject matter pertains to modify Patent 843 in the manner described supra because it would provide an encoding/decoding method that provides good tradeoff between power and computer resource (Bauchot, col 1 ln 12-24).
Claim 1 is the system claim corresponding to method claim 9 and is rejected on the same grounds as claim 9.
Claim 2 is the system claim corresponding to method claim 10 and is taught by combining Bauchot in the same manner as claim 10.
Claim 3 is the system claim corresponding to method claim 11 and is rejected on the same grounds as claim 11.
Claim 4 is the system claim corresponding to method claim 12 and is taught by combining Bauchot in the same manner as claim 12.
Claim 5 is the system claim corresponding to method claim 13 and is rejected on the same grounds as claim 13.
Claim 6 is the system claim corresponding to method claim 14 and is rejected on the same grounds as claim 14.
Claim 7 is the system claim corresponding to method claim 15 and is rejected on the same grounds as claim 15.
Claim 8 is the system claim corresponding to method claim 16 and is rejected on the same grounds as claim 16.
Claim 17 is the system claim corresponding to method claim 9 and is rejected on the same grounds as claim 9.
Claim 18 is the system claim corresponding to method claim 10 and is taught by combining Bauchot in the same manner as claim 10.
Claim 19 is the system claim corresponding to method claim 11 and is rejected on the same grounds as claim 11.
Claim 20 is the system claim corresponding to method claim 12 and is taught by combining Bauchot in the same manner as claim 12.
Claim 21 is the system claim corresponding to method claim 13 and is rejected on the same grounds as claim 13.
Claims 1 – 21 are rejected on the ground of nonstatutory double patenting as being unpatentable over the following claims of U.S. Patent No. US 11,494,296 in view of Bauchot. The claims at issue are obvious as outlined below.
Instant Application
Patent 11,494,296
9. A method for operating a memory system, comprising:
receiving[, at a host system,] a memory shape indicating a quantity of contiguous columns and a quantity of contiguous rows associated with storing one or more data elements at a memory system [that is coupled with the host system, the memory shape further indicating whether the one or more data elements are to be stored exclusively column wise at the memory system or exclusively row wise at the memory system];
allocating[, by the host system,] a set of memory cells according to the memory shape, the set of memory cells comprising a multidimensional physical portion of a memory array of the memory system;
storing, at the memory system and in accordance with allocating the set of memory cells, a first data element in a first subset of memory cells of the set of memory cells; and
storing, at the memory system and in accordance with storing the first data element in the first subset of memory cells, a second data element in a second subset of memory cells of the set of memory cells, the second subset of memory cells being directly adjacent to the first subset of memory cells.
1. A method, comprising:
receiving a user definition of a memory shape including:
a quantity of contiguous columns of a memory array;
a quantity of contiguous rows of the memory array; and
allocating a multidimensional, contiguous, physical portion of the memory array according to the user definition, wherein the physical portion comprises a plurality of memory cells;
storing a first data element and a second data element in the multidimensional, contiguous, physical portion corresponding to the memory shape;
storing only the first data element in a first column of the multidimensional, contiguous, physical portion; and
storing only the second data element in a second column of the multidimensional, contiguous, physical portion, wherein the first column is adjacent to the second column.
9. A method for operating a memory system, comprising:
receiving[, at a host system,] a memory shape indicating a quantity of contiguous columns and a quantity of contiguous rows associated with storing one or more data elements at the memory system;
allocating[, at the host system,] a set of memory cells according to the memory shape, the set of memory cells comprising a multidimensional physical portion of a memory array of the memory system;
storing, at the memory system and in accordance with allocating the set of memory cells, a first data element in a first subset of memory cells of the set of memory cells; and
storing, at the memory system and in accordance with storing the first data element in the first subset of memory cells, a second data element in a second subset of memory cells of the set of memory cells, the second subset of memory cells being directly adjacent to the first subset of memory cells.
18. A method, comprising:
receiving a user definition of a memory shape including:
a quantity of contiguous columns of a memory array;
a quantity of contiguous rows of the memory array; and
allocating a multidimensional, contiguous, physical portion of the memory array according to the user definition, wherein the physical portion comprises a plurality of memory cells;
storing a first data element and a second data element in the multidimensional, contiguous, physical portion corresponding to the memory shape;
storing only the first data element in a first row of the multidimensional, contiguous, physical portion; and
storing only the second data element in a second row of the multidimensional, contiguous, physical portion, wherein the first row is adjacent to the second row.
10. The method of claim 9, wherein the memory shape indicates a vertical major dimension associated with the memory shape, wherein the vertical major dimension indicates for the memory system to store data elements column wise.
1. receiving a user definition of a memory shape including:
a major dimension of the memory shape corresponding to a dimension of the memory shape by which data is written to the contiguous columns and contiguous rows of the memory array;
11. The method of claim 10, wherein:
the first subset of memory cells comprises a first column of memory cells of the set of memory cells in accordance with the vertical major dimension, and
the second subset of memory cells comprises a second column of memory cells of the set of memory cells in accordance with the vertical major dimension
1. receiving a user definition of a memory shape including:
a major dimension of the memory shape corresponding to a dimension of the memory shape by which data is written to the contiguous columns and contiguous rows of the memory array;
allocating a multidimensional, contiguous, physical portion of the memory array according to the user definition, wherein the physical portion comprises a plurality of memory cells;
storing a first data element and a second data element in the multidimensional, contiguous, physical portion corresponding to the memory shape;
storing only the first data element in a first column of the multidimensional, contiguous, physical portion; and
storing only the second data element in a second column of the multidimensional, contiguous, physical portion, wherein the first column is adjacent to the second column.
12. The method of claim 9, wherein the memory shape indicates a horizontal major dimension associated with the memory shape, wherein the horizontal major dimension indicates for the memory system to store data elements row wise.
18. receiving a user definition of a memory shape including:
a major dimension of the memory shape corresponding to a dimension of the memory shape by which data is written to the contiguous columns and contiguous rows of the memory array;
13. The method of claim 12, wherein:
the first subset of memory cells comprises a first row of memory cells of the set of memory cells in accordance with the horizontal major dimension, and
the second subset of memory cells comprises a second row of memory cells of the set of memory cells in accordance with the horizontal major dimension.
18. receiving a user definition of a memory shape including:
a major dimension of the memory shape corresponding to a dimension of the memory shape by which data is written to the contiguous columns and contiguous rows of the memory array;
allocating a multidimensional, contiguous, physical portion of the memory array according to the user definition, wherein the physical portion comprises a plurality of memory cells;
storing a first data element and a second data element in the multidimensional, contiguous, physical portion corresponding to the memory shape;
storing only the first data element in a first row of the multidimensional, contiguous, physical portion; and
storing only the second data element in a second row of the multidimensional, contiguous, physical portion, wherein the first row is adjacent to the second row
Regarding claim 9, Patent 296 teaches a method of storing to memory cells that are allocated based on memory shape but does not appear to explicitly teach said memory cells are allocated by host system that received said memory shape wherein said memory also indicates whether data element(s) is to be stored exclusively in column/row. However, Bauchot teaches defining (receiving) a two-dimensional shape (memory shape) having pad width (quantity of contiguous columns) and pad height (quantity of contiguous rows), and storing (allocate) said two-dimensional shape in persistent memory (memory array) wherein, i) CPU (host system) (coupled to said persistent memory via bus) performs these functions and ii) said two-dimensional shape includes initial direction of east (row wise) that results in data element 0000 (one or more data element) being stored only (exclusively) in a horizontal direction (row wise) (see claim 1 mapping below). In view of Bauchot, Patent 296 is modified such that said memory cells are allocated by CPU (host system) that defines (receiving) said memory shape wherein said memory shape also indicates a data element is to be stored only in horizontal direction (row wise).
Patent 296 and Bauchot are analogous art to the instant specification because they are in the same field of endeavor, storage management.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which said subject matter pertains to modify Patent 296 in the manner described supra because it would provide an encoding/decoding method that provides good tradeoff between power and computer resource (Bauchot, col 1 ln 12-24).
Regarding claim 14, Patent 296 teaches a method of writing first and second data elements but does not appear to explicitly teach said first and second data elements are same/different length. However, Bauchot teaches storing data elements of same lengths (see claim 6 mapping below). In view of Bauchot, Patent 296 is modified such that said first and data elements, being stored, are of same lengths.
Patent 296 and Bauchot are analogous art to the instant specification because they are in the same field of endeavor, storage management.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which said subject matter pertains to modify Patent 296 in the manner described supra because it would provide an encoding/decoding method that provides good tradeoff between power and computer resource (Bauchot, col 1 ln 12-24).
Regarding claim 15, Patent 296 teaches a method of writing first and second data elements but does not appear to explicitly teach said first and second data elements are same/different type. However, Bauchot teaches storing data elements of same type (see claim 7 mapping below). In view of Bauchot, Patent 296 is modified such that said first and data elements, being stored, are of same type.
Patent 296 and Bauchot are analogous art to the instant specification because they are in the same field of endeavor, storage management.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which said subject matter pertains to modify Patent 296 in the manner described supra because it would provide an encoding/decoding method that provides good tradeoff between power and computer resource (Bauchot, col 1 ln 12-24).
Regarding claim 16, Patent 296 teaches a method of writing first and second data elements but does not appear to explicitly teach said first and second data elements are integer/floating point/string. However, Bauchot teaches storing data elements of numerical/string (see claim 8 mapping below). In view of Bauchot, Patent 296 is modified such that said first and data elements, being stored, are numbers/strings.
Patent 296 and Bauchot are analogous art to the instant specification because they are in the same field of endeavor, storage management.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which said subject matter pertains to modify Patent 296 in the manner described supra because it would provide an encoding/decoding method that provides good tradeoff between power and computer resource (Bauchot, col 1 ln 12-24).
Claim 1 is the system claim corresponding to method claim 9 and is rejected on the same grounds as claim 9.
Claim 2 is the system claim corresponding to method claim 10 and is rejected on the same grounds as claim 10.
Claim 3 is the system claim corresponding to method claim 11 and is rejected on the same grounds as claim 11.
Claim 4 is the system claim corresponding to method claim 12 and is rejected on the same grounds as claim 12.
Claim 5 is the system claim corresponding to method claim 13 and is rejected on the same grounds as claim 13.
Claim 6 is the system claim corresponding to method claim 14 and taught by combining Bauchot in the same manner as claim 14.
Claim 7 is the system claim corresponding to method claim 15 and is taught by combining Bauchot in the same manner as claim 15.
Claim 8 is the system claim corresponding to method claim 16 and is taught by combining Bauchot in the same manner as claim 16.
Claim 17 is the system claim corresponding to method claim 9 and is rejected on the same grounds as claim 9.
Claim 18 is the system claim corresponding to method claim 10 and is rejected on the same grounds as claim 10.
Claim 19 is the system claim corresponding to method claim 11 and is rejected on the same grounds as claim 11.
Claim 20 is the system claim corresponding to method claim 12 and is rejected on the same grounds as claim 12.
Claim 21 is the system claim corresponding to method claim 13 and is rejected on the same grounds as claim 13.
Claims 1 – 5, 9 – 13 and 17 – 21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 11 of U.S. Patent No. 12,117,929. The claims at issue are anticipated by Patent ‘929 as outlined below.
Instant Application
Patent 12,117,929
1. A system, comprising:
at least one memory array of a memory system; and
a host system coupled with the at least one memory array of the memory system, wherein the memory system and the host system are configured to:
receive, at the host system, a memory shape indicating a quantity of contiguous columns and a quantity of contiguous rows associated with storing one or more data elements at the memory system, the memory shape further indicating whether the one or more data elements are to be stored exclusively column wise at the memory system or exclusively row wise at the memory system;
allocate, by the host system, a set of memory cells according to the memory shape, the set of memory cells comprising a multidimensional physical portion of he at least one memory array of the memory system;
store, by the memory system and in accordance with allocating the set of memory cells, a first data element in a first subset of memory cells of the set of memory cells; and
store, by the memory system and in accordance with storing the first data element in the first subset of memory cells, a second data element in a second subset of memory cells of the set of memory cells, the second subset of memory cells being directly adjacent to the first subset of memory cells.
11. A system, comprising:
a memory system comprising a plurality of memory devices
a host coupled to the memory system and configured to allocate, from respective single physical memory components of the plurality of memory devices, contiguous columns of memory cells and contiguous rows of memory cells according to:
a first user definition specifying a major dimension of a memory shape by which data is written to the memory shape; and
a second user definition specifying a plurality of the memory shape,
wherein the memory system is configured to:
responsive to the first user definition specifying a vertical major dimension:
store only a first data element in a first one of the contiguous columns of memory cells of the respective single physical memory components; and
store only a second data element in a second one of the contiguous columns of memory cells that is adjacent to the first one of the contiguous columns of memory cells; and
responsive to the first user definition specifying a horizontal major dimension:
store only the first data element in a first one of the contiguous rows of memory cells of the respective single physical memory components; and
store only the second data element in a second one of the contiguous rows of memory cells that is adjacent to the first one of the contiguous rows of memory cells
2. The system of claim 1, wherein the memory shape indicates a vertical major dimension associated with the memory shape, wherein the vertical major dimension indicates for the memory system to store data elements column wise.
11. responsive to the first user definition specifying a vertical major dimension:
store only a first data element in a first one of the contiguous columns of memory cells of the respective single physical memory components; and
store only a second data element in a second one of the contiguous columns of memory cells that is adjacent to the first one of the contiguous columns of memory cells
3. The system of claim 2, wherein:
the first subset of memory cells comprises a first column of memory cells of the set of memory cells in accordance with the vertical major dimension, and
the second subset of memory cells comprises a second column of memory cells of the set of memory cells in accordance with the vertical major dimension.
11. responsive to the first user definition specifying a vertical major dimension:
store only a first data element in a first one of the contiguous columns of memory cells of the respective single physical memory components; and
store only a second data element in a second one of the contiguous columns of memory cells that is adjacent to the first one of the contiguous columns of memory cells
4. The system of claim 1, wherein the memory shape indicates a horizontal major dimension associated with the memory shape, wherein the horizontal major dimension indicates for the memory system to store data elements row wise.
11. responsive to the first user definition specifying a horizontal major dimension:
store only the first data element in a first one of the contiguous rows of memory cells of the respective single physical memory components; and
store only the second data element in a second one of the contiguous rows of memory cells that is adjacent to the first one of the contiguous rows of memory cells.
5. The system of claim 4, wherein:
the first subset of memory cells comprises a first row of memory cells of the set of memory cells in accordance with the horizontal major dimension, and
the second subset of memory cells comprises a second row of memory cells of the set of memory cells in accordance with the horizontal major dimension.
11. responsive to the first user definition specifying a horizontal major dimension:
store only the first data element in a first one of the contiguous rows of memory cells of the respective single physical memory components; and
store only the second data element in a second one of the contiguous rows of memory cells that is adjacent to the first one of the contiguous rows of memory cells
Claim 9 is the method claim corresponding to system claim 1 and is rejected on the same grounds as claim 1.
Claim 10 is the system claim corresponding to method claim 2 and is rejected on the same grounds as claim 2.
Claim 11 is the system claim corresponding to method claim 3 and is rejected on the same grounds as claim 3.
Claim 12 is the system claim corresponding to method claim 4 and is rejected on the same grounds as claim 4.
Claim 13 is the system claim corresponding to method claim 5 and is rejected on the same grounds as claim 5.
Claims 17 – 21 are substantially similar to claims 1 – 5 (same scope of invention but worded differently). Therefore, claims 17 – 21 are rejected on the same grounds as claims 1 – 5.
Claims 1, 7 – 9 and 15 – 17 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 4 – 6 of U.S. Patent No. 12,117,929 in view of Bauchot. The claims at issue are obvious as outlined below.
Instant Application
Patent 12,117,929
9. A method for operating a memory system, comprising:
receiving, at a host system, a memory shape indicating a quantity of contiguous columns and a quantity of contiguous rows associated with storing one or more data elements at a memory system [that is coupled with the host system, the memory shape further indicating whether the one or more data elements are to be stored exclusively column wise at the memory system or exclusively row wise at the memory system];
allocating, by the host system, a set of memory cells according to the memory shape, the set of memory cells comprising a multidimensional physical portion of a memory array of the memory system;
storing, at the memory system and in accordance with allocating the set of memory cells, a first data element in a first subset of memory cells of the set of memory cells; and
storing, at the memory system and in accordance with storing the first data element in the first subset of memory cells, a second data element in a second subset of memory cells of the set of memory cells, the second subset of memory cells being directly adjacent to the first subset of memory cells.
1. A method, comprising:
receiving, by a host coupled to a memory system, a user definition of a memory shape indicative of:
a quantity of contiguous columns of a memory device of the memory system;
a quantity of contiguous rows of the memory device
allocating, by the host, a multidimensional, physical portion of the memory device according to the user definition
storing, by the memory system, only a first data element in a first column of memory cells or a first row of memory cells of the allocated multidimensional, physical portion of the memory device
responsive to storing the first data element in the first column of memory cells, storing, by the memory system, only a second data element in a second column of memory cells of the allocated multidimensional, physical portion of the memory device, wherein the second column of memory cells is directly adjacent to the first column of memory cells
15. The method of claim 9, wherein [a type of the first data element is equivalent to a type of the second data element,] or the type of the first data element is different than the type of the second data element.
4. The method of claim 1, wherein the first data element is of a first type, the second data element is of a second type that is different than the first type.
16. The method of claim 9, wherein a type of the first data element and a type of the second data element comprises an integer, a floating point, or a string.
5. The method of claim 4, wherein the first type is an integer and the second type is a floating point or a string.
6. The method of claim 4, wherein the first type is a string and the second type is a floating point or an integer.
Regarding claim 9, Patent 929 teaches a method of allocating memory cells based on memory shape but does not appear to explicitly teach said memory shape also indicates whether data element(s) is to be stored exclusively in column/row. However, Bauchot teaches defining a two-dimensional shape (memory shape) having pad width (quantity of contiguous columns) and pad height (quantity of contiguous rows) wherein said two-dimensional shape includes initial direction of east (row wise) that results in data element 0000 (one or more data element) being stored only (exclusively) in a horizontal direction (row wise) (see claim 1 mapping below). In view of Bauchot, Patent 929 is modified such that said memory shape (used to allocate memory cells) also indicates a data element is to be stored only in horizontal direction (row wise).
Patent 929 and Bauchot are analogous art to the instant specification because they are in the same field of endeavor, storage management.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which said subject matter pertains to modify Patent 929 in the manner described supra because it would provide an encoding/decoding method that provides good tradeoff between power and computer resource (Bauchot, col 1 ln 12-24).
Claim 1 is the system claim corresponding to method claim 15 and is rejected on the same grounds as claim 15.
Claim 7 is the system claim corresponding to method claim 15 and is rejected on the same grounds as claim 16.
Claim 8 is the system claim corresponding to method claim 1 and is rejected on the same grounds as claim 16.
Claim 17 is the system claim corresponding to method claim 9 and is rejected on the same grounds as claim 9.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 – 21 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Bauchot (US 9350382).
Regarding claim 1, Bauchot teaches
A system, comprising:
at least one memory array (at least one memory array = Fig. 1 volatile memory 32 + persistent memory 34) of a memory system (memory system = Fig. 1 memory 30); and
a host system (a host system = Fig. 1 central processing unit (CPU) 22) coupled with the at least one memory array of the memory system, wherein the memory system and the host system are configured to: (Bauchot teaches using bus to couple CPU 22 and memory 30 (see col 4 ln 8-9) wherein said CPU 22 performs operations (see col 3 ln 59-60).)
receive, at the host system, a memory shape indicating a quantity of contiguous columns and a quantity of contiguous rows associated with storing one or more data elements at the memory system, the memory shape further indicating whether the one or more data elements are to be stored [exclusively column wise at the memory system] or exclusively row wise at the memory system;
allocate, at the host system, a set of memory cells according to the memory shape, the set of memory cells comprising a multidimensional physical portion of the at least one memory array of the memory system; (Bauchot teaches defining (receive), in an initialization method, a two-dimensional shape (memory shape) having pad width (PW) of cells (set of memory cells) and pad height (PH) of cells (set of memory cells) (col 5 ln 35-41). Bauchot also teaches said two-dimensional shape has said PW of 8 contiguous columns (a quantity of contiguous columns) and said PH of 8 contiguous rows (a quantity of contiguous rows) storing data 0000 (one or more data elements) (see Fig. 5B, 6A-6B, col 9 ln 16-21) where said two dimensional (multidimensional) shape is stored (allocate) in persistent memory 34 (the at least one memory array) (such as solid-state (physical portion) drive) (see col 4 ln 24-27) in said memory 30 (memory system) (see Fig. 1). Bauchot further teaches that said two-dimensional shape (memory shape) also includes initial direction (ID) (see col 5 ln 35-41) that is east (row wise) which results in (indicating whether) data 0000 (one or more data elements) being stored horizontally (row wise) as indicated by said initial direction of east (see Fig. 5B, 6A-6B col 9 ln 16-21). Note that data 0000 is only (exclusively) stored in a horizontal manner.)
store, by the memory system and in accordance with allocating the set of memory cells, a first data element in a first subset of memory cells of the set of memory cells; and
store, by the memory system and in accordance with storing the first data element in the first subset of memory cells, a second data element in a second subset of memory cells of the set of memory cells, the second subset of memory cells being directly adjacent to the first subset of memory cells (Bauchot teaches subsequent to (in accordance) defining said two-dimensional shape stored (allocate) in said persistent memory, storing in said two-dimensional shape (memory shape) (see Fig. 3A and corresponding paragraphs), i) data 0000 (first data element) in first portion of first row (first subset of memory cells) and subsequent (in accordance) to storing data 0000, storing data 0001 (second data element) in second portion of said first row (second subset of memory cells) that is next to (adjacent) said first portion of said first row (see Fig. 6A (state 1-2), col 9 ln 18-19) and ii) data 1100 (first data element) in first column (first subset of memory) and subsequent (in accordance) to storing data 1100, storing data 1101 (second data element) in second column (second subset of memory) that is next to (adjacent) said first column (see Fig. 6A (state 13-14), col 9 ln 18-19).)
Claim 9 is the method claim corresponding to system claim 1 and is rejected on the same grounds as claim 1.
Regarding claim 2, Bauchot teaches the system of claim 1 where Bauchot also teaches
wherein the memory shape indicates a vertical major dimension associated with the memory shape, wherein the vertical major dimension indicates for the memory system to store data elements column wise (Bauchot teaches defining two-dimensional shape (memory shape) having turn direction (vertical major dimension) (see col 5 ln 35-41, col 6 ln 11-14) wherein, for data 1100, said TD points to north (vertical) and 00 (data elements) is written to (store) first column (column wise) (see Fig. 6A (state 13), col 10 ln 63-67).)
Claim 10 is the method claim corresponding to system claim 2 and is rejected on the same grounds as claim 2.
Regarding claim 3, Bauchot teaches the system of claim 2 where Bauchot also teaches
the first subset of memory cells comprises a first column of memory cells of the set of memory cells in accordance with the vertical major dimension, and (Bauchot teaches, for data 1100, writing 00 to first column (first subset of memory cells comprises a first column of memory cells) based on TD (vertical major dimension) changed to north (vertical) (see Fig. 6A (state 13), col 10 ln 63-65).)
the second subset of memory cells comprises a second column of memory cells of the set of memory cells in accordance with the vertical major dimension (Bauchot teaches, for data 1101, writing 101 to second column (second subset of memory cells comprises a second column of memory cells) based on TD (vertical major dimension) changed to south (vertical) (see Fig. 6A (state 14), col 11 ln 3-5).)
Claim 11 is the method claim corresponding to system claim 3 and is rejected on the same grounds as claim 3.
Regarding claim 4, Bauchot teaches the system of claim 1 where Bauchot also teaches
wherein the memory shape indicates a horizontal major dimension associated with the memory shape, wherein the horizontal major dimension indicates for the memory system to store data elements row wise (Bauchot teaches defining two-dimensional shape (memory shape) having turn direction (horizontal major dimension) (see col 5 ln 35-41, col 6 ln 11-14) wherein, for data 0000, said TD points to east (horizontal) and 0000 (data elements) is written to (store) first row (row wise) (see Fig. 6A (state 1), col 9 ln 16-21, col 9 ln 31-37).)
Claim 12 is the method claim corresponding to system claim 4 and is rejected on the same grounds as claim 4.
Regarding claim 5, Bauchot teaches the system of claim 1 where Bauchot also teaches
the first subset of memory cells comprises a first row of memory cells of the set of memory cells in accordance with the horizontal major dimension, and (Bauchot teaches, for data 0000, writing 0000 to first portion of first row (first subset of memory cells comprises a first column of memory cells) based on TD (vertical major dimension) indicating east (horizontal) (see Fig. 6A (state 1), col 9 ln 16-21, col 9 ln 31-37).)
the second subset of memory cells comprises a second row of memory cells of the set of memory cells in accordance with the horizontal major dimension (Bauchot teaches, for data 0001, writing 0001 to second portion of first row (second subset of memory cells comprises a first column of memory cells) based on TD (vertical major dimension) indicating east (horizontal) (see Fig. 6A (state 2), col 9 ln 39-45).)
Claim 13 is the method claim corresponding to system claim 5 and is rejected on the same grounds as claim 5.
Regarding claim 6, Bauchot teaches the system of claim 1 where Bauchot also teaches
wherein the first data element and the second data element have a same length, [or the first data element and the second data element have a different length] (Baucho teaches data 0000 (first data element) and data 0001 (second data element) both (same) have lengths (length) of four bits (see Fig. 6A (state 1-2)).)
Claim 14 is the method claim corresponding to system claim 6 and is rejected on the same grounds as claim 6.
Regarding claim 7, Bauchot teaches the system of claim 1 where Bauchot also teaches
wherein a type of the first data element is equivalent to a type of the second data element, [or the type of the first data element is different than the type of the second data element] (Bauchot teaches data 0000 (first data element) and data 0001 (second data element) are both (equivalent) input string (type) (see col 9 ln 28-30).)
Claim 15 is the method claim corresponding to system claim 7 and is rejected on the same grounds as claim 7.
Regarding claim 8, Bauchot teaches the system of claim 1 where Bauchot also teaches
wherein a type of the first data element and a type of the second data element comprises an integer, [a floating point], or a string (Bauchot teaches data 0000 (first data element) and data 0001 (second data element) are both i) ascending numbers (integer) (see col 10 ln 11-13) and ii) input string (string) (see col 9 ln 28-30).)
Claim 16 is the method claim corresponding to system claim 8 and is rejected on the same grounds as claim 8.
Regarding claim 17, Bauchot teaches
A system (system = Fig. 1), comprising:
a host device (host device = Fig. 1 CPU 22) coupled with a memory system (memory system = Fig. 1 memory 30) and configured to: (Bauchot teaches using bus to couple CPU 22 and memory 30 (see col 4 ln 8-9) wherein said CPU 22 performs operations (see col 3 ln 59-60).)
receive a memory shape indicating a quantity of contiguous columns and a quantity of contiguous rows associated with storing one or more data elements at the memory system, the memory shape further indicating whether the one or more data elements are to be stored exclusively column wise at the memory system or exclusively row wise at the memory system; and
allocate a set of memory cells according to the memory shape, the set of memory cells comprising a multidimensional physical portion of a memory array of the memory system; (As noted in claim 1, Bauchot teaches host device (or system) performing these limitations.)
wherein the memory system is configured to:
store, in accordance with allocating the set of memory cells, a first data element in a first subset of memory cells of the set of memory cells; and
store, in accordance with storing the first data element in the first subset of memory cells, a second data element in a second subset of memory cells of the set of memory cells, the second subset of memory cells being directly adjacent to the first subset of memory cells (As noted in claim 1, Bauchot teaches memory system performing these limitations.)
Regarding claim 18, Bauchot teaches the system of claim 17 where Bauchot also teaches the limitations of claim 18 (see claim 2).
Regarding claim 19, Bauchot teaches the system of claim 18 where Bauchot also teaches the limitations of claim 19 (see claim 3).
Regarding claim 20, Bauchot teaches the system of claim 17 where Bauchot also teaches the limitations of claim 20 (see claim 4).
Regarding claim 21, Bauchot teaches the system of claim 17 where Bauchot also teaches the limitations of claim 18 (see claim 5).
Response to Remarks
Applicant’s remarks, with respect to double patenting rejections, have been considered but are not persuasive. As noted supra, the claims are still rejected under double patenting rejections. In addition, additional double patenting rejections are made, in view of Applicant’s amendments, to parent application 17/955,371 (now patent US 12,117,929).
Applicant’s amendments addressed 112(a) written description. Therefore, 112(a) rejections are hereby withdrawn.
Applicant’s remarks, with respect to prior art rejection, have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of newly cited portion of Bauchot. It is noted that Applicant alleges that Bauchot does not teach newly amended limitations because Bauchot writes in both column wise and row wise. However, Applicant’s remarks are not commensurate in scope with the claims. The claims do not recite that all data are written in only column wise or row wise in entirety of memory shape. Rather, the claims merely require one data element to be written column wise (or row wise). Also, there is no actual data being written, merely an indication of data being written column wise or row wise. Therefore, as recited, Bauchot still teaches the claims as noted supra.
Additional Remarks
It is noted that claims 17 – 21 are substantial duplicates of claims 1 – 15. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim (see MPEP § 608.01(m)). As such, in the event the claims are allowable, claims 17 – 21 would be objected to.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHIE YEW whose telephone number is (571)270-5282. The examiner can normally be reached Monday - Thursday and alternate Fridays.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald Bragdon can be reached at (571) 272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CHIE YEW/ Primary Examiner, Art Unit 2139