DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 3-5, 7-9, 13-15 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hiroyuki (WO 02/31892A1, see English machine translation provided for mapping).
Regarding claim 1, Hiroyuki discloses a device in Figure 13A comprising:
a silicon core (silicon substrate 1, [76]) comprising a textured surface comprising a plurality of pyramidal features (pyramids shown in Figure 2A and [79]);
a dielectric layer (insulating layer 3) comprising a first thickness ([81]),
a silicon layer (10) comprising a second thickness (Figure 13A and [98], layer 10 can be silicon oxide or silicon nitride which contains silicon and reads on a “silicon layer”),
a plurality of channels filled with a silicon material (the channels are the portions of the pyramids of the silicon substrate passing through and above the dielectric layer 3 which are made of silicon material, Figure 13A),
wherein: the dielectric layer (3) is positioned between the silicon core (1) and the silicon layer (10) (Figure 13A),
the silicon layer (10) maintains the textured shape of the textured silicon core (Figure 13A),
wherein each pyramidal feature is characterized by a tip and a trough separated by a distance, H (Figure 2A, [76] and [81], each pyramid has a tip and a valley),
each channel begins closer to the tip than the trough (the channels are the portions of the pyramids passing through and above the dielectric layer 3 which are closer to the tip of the pyramids than the trough) and passes through an entirety of the second thickness (Figure 13A, the channels are interpreted as the portions under the electrodes 7 which pass entirely through layers 3 and 10) and at least a portion of the first thickness (dielectric layer thickness 3) (As shown in Figure 13A, [23], [26] and [85]).
Regarding claim 3, Hiroyuki discloses all of the claim limitations as set forth above. Hiroyuki additionally discloses that each channel passes completely through the first thickness (Figure 13A).
Regarding claim 4, Hiroyuki discloses all of the claim limitations as set forth above. Hiroyuki additionally discloses that the dielectric layer (insulating layer 3) comprises at least one of a silicon oxide, an aluminum oxide, or a silicon nitride, or a combination thereof ([81]).
Regarding claim 5, Hiroyuki discloses all of the claim limitations as set forth above. Hiroyuki additionally discloses that H is between 100 nm and 10 µm ([115], see height of 5µm).
Regarding claim 7, Hiroyuki discloses all of the claim limitations as set forth above. Hiroyuki additionally discloses that each pyramidal feature is further characterized by: at least three facets that meet to form the tip (Figure 2A and [79]), and each channel is positioned substantially at or near the tip (Figures 2A, 7A-C and 13A).
Regarding claim 8, Hiroyuki discloses all of the claim limitations as set forth above. Hiroyuki additionally discloses that the silicon core (crystalline silicon substrate 1) comprises crystalline silicon ([114] and [76]).
Regarding claim 9, Hiroyuki discloses all of the claim limitations as set forth above. Hiroyuki additionally discloses the first thickness is between 1.0 nm and 20 nm (thickness of dielectric layer 3 is 5nm, [101]).
Regarding claim 13, Hiroyuki discloses all of the claim limitations as set forth above. Hiroyuki additionally discloses a metal grid ([91], electrode 7 is a silver electrode with a busbar and finger electrodes which reads on a metal grid), wherein the silicon layer (10) is positioned between the metal grid (7) and the dielectric layer (3) (Figures 5 and 13A).
Regarding claim 14, Hiroyuki discloses all of the claim limitations as set forth above. Hiroyuki additionally discloses that each channel is positioned under the metal grid (7) (Figure 13A, the exposed portion of the substrate under the electrode 7 are the channels which are located under the grid).
Regarding claim 15, Hiroyuki discloses all of the claim limitations as set forth above. Since the device of Hiroyuki is the same as the device required by claim 1, one having ordinary skill in the art at the time the invention was filed would have a reasonable expectation that the device of Hiroyuki would have the claimed properties of “a sheet resistance, Rs, between 576 Ω/sq and 719 Ω/sq”.
As discussed in MPEP 2112.01, “When the structure recited in the reference is substantially identical to that of the claims, claimed properties or functions are presumed to be inherent.
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Where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977). "When the PTO shows a sound basis for believing that the products of the applicant and the prior art are the same, the applicant has the burden of showing that they are not." In re Spada, 911 F.2d 705, 709, 15 USPQ2d 1655, 1658 (Fed. Cir. 1990). Additionally, if the composition is physically the same, it must have the same properties. "Products of identical chemical composition cannot have mutually exclusive properties." In re Spada, 911 F.2d 705, 709, 15 USPQ2d 1655, 1658 (Fed. Cir. 1990). A chemical composition and its properties are inseparable. Therefore, if the prior art teaches the identical chemical structure, the properties applicant discloses and/or claims are necessarily present”.
Regarding claim 20, Hiroyuki discloses all of the claim limitations as set forth above. Hiroyuki additionally discloses that the silicon material filling each channel has a composition different from a composition of at least one of the silicon layer or the silicon core (As discussed in [76] and [98], the silicon material filling the channels is n-type, the silicon material of the core is p-type and the silicon material of the silicon layer is silicon oxide, thus the composition of each of the materials is different).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 10-12 are rejected under 35 U.S.C. 103 as being unpatentable over Hiroyuki (WO 02/31892A1, see English machine translation provided for mapping), as applied to claim 1 above.
Regarding claim 10, Hiroyuki discloses all of the claim limitations as set forth above. Hiroyuki does not disclose that the second thickness is between 5 nm and 300 nm. However, it would have been obvious to one having ordinary skill in the art at the time the invention was filed to change the second thickness in the device of Hiroyuki, since such a modification would have involved a mere change in the size (or dimension) of a component. A change in size (dimension) is generally recognized as being within the level of ordinary skill in the art. In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955).
Regarding claim 11, Hiroyuki discloses all of the claim limitations as set forth above. Hiroyuki does not disclose that each channel has a diameter of less than 1000 nm. However, it would have been obvious to one having ordinary skill in the art at the time the invention was filed to change the diameter of the channels in the device of Hiroyuki, since such a modification would have involved a mere change in the size (or dimension) of a component. A change in size (dimension) is generally recognized as being within the level of ordinary skill in the art. In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955).
Regarding claim 12, Hiroyuki discloses all of the claim limitations as set forth above. Hiroyuki does not disclose that the plurality of channels are present at a concentration between 1 x 104 solid channels/cm2 and 1 x 1010 solid channels/cm2. However, changing the number of channels would merely require a change in the size of the channels. It would have been obvious to one having ordinary skill in the art at the time the invention was filed to change the size and number of the channels in the device of Hiroyuki, since such a modification would have involved a mere change in the size (or dimension) of a component. A change in size (dimension) is generally recognized as being within the level of ordinary skill in the art. In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955).
Response to Arguments
Applicant's arguments filed 6/25/2026 have been fully considered but they are not persuasive.
Applicant argues that Hiroyuki does not disclose the claimed “silicon layer comprising a second thickness” and that the silicon oxide or silicon nitride insulating film as disclosed by Hiroyuki does not read on the claimed silicon layer.
Examiner respectfully disagrees. The claimed “silicon layer” is not limited to a polycrystalline or amorphous silicon layer or a conductive or semiconductive silicon layer. A “silicon layer” merely required a layer including a silicon material, which is satisfied by the device of Hiroyuki. The claims are not limited by the materials listed in the instant specification. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Further, the instant specification discloses in [67], “The wafer of any one of Examples 1-13, wherein the silicon layer comprises at least one of a polycrystalline silicon, a silicon carbide, an amorphous silicon, a transparent conducting oxide, a silicon oxide, a doped silicon oxide, or a combination thereof”. Thus, the interpretation of a silicon oxide layer reading on the claimed “silicon layer” is supported by and consistent with the instant specification.
In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., the solid channel formed by melting, material transfer, and solidification producing a channel filled with a filled with a silicon material having a composition that is different from the starting features and surrounding materials) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LINDSEY A BUCK whose telephone number is (571)270-1234. The examiner can normally be reached Monday-Friday 9am-5:30pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Martin can be reached at (571)270-7871. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LINDSEY A BUCK/Primary Examiner, Art Unit 1728
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