DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The Information Disclosure Statement (IDS) received on September 16th, 2024 has been considered by the examiner.
Drawings
The drawings are objected to because:
Instance 137 in Fig. 1 is not detailed in the specification.
Instance 450 in Fig. 4 is not detailed in the specification.
Instance 650 in Fig. 6 is not detailed in the specification.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 1 is objected to because of the following informalities: The phase “configured to mix the at least one test and the LO signal” appears to be missing the word “signal”. For examination, this will be interpreted as “configured to mix the at least one test signal and the LO signal”. Appropriate correction is required.
Claim 12 is objected to because of the following informalities: The acronym “LO” is used, but is not defined within the claim. This acronym is defined as “local oscillator” in claim 1, but because claim 12 is an independent claim it must restated. For examination, the acronym will be interpreted as a “local oscillator”.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 and 11-12 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kohtani et al. (US 20210208246 A1), hereinafter Kohtani.
Regarding claim 1, Kohtani discloses (Note: what is not clearly disclosed is strike-through):
An integrated radar transceiver circuit, comprising:
a local oscillator (LO) circuit configured to provide an LO signal having a LO frequency (Kohtani [0030] “The PLL 9 uses a reference clock CLK input from a reference oscillation circuit (not shown), and adjusts parameters such as a multiplication factor of the reference clock CLK to obtain, for example, for synchronous generation of a first signal to a third signal of the frequency in the GHz band, along with synchronous generation of a fourth signal in the MHz band. ”);
a test signal generator circuit configured to generate at least one test signal having at least one test signal frequency component (Kohtani [0034] “Further, the general-purpose multi-channel IC 2 can generate the self-diagnosis clock signal CLK1 having a frequency fBIST_CLK in synchronization with the above-mentioned first to third output signals LO1 to LO3.”);
an up-conversion circuit configured to mix the at least one test and the LO signal to obtain an up-converted test signal (Kohtani [0062] “As shown in FIG. 2, the IQ orthogonal mixer 51 is provided for up-converting a signal based on the third output signal LO3 and the self-diagnosis clock signal CLK1, and has a λ/4 line 52 and a first frequency converter 53, and a second frequency converter 54.”);
at least one receive channel, comprising a down-conversion circuit configured to mix the up-converted test signal and the LO signal to obtain a down-converted test signal (Kohtani [0063] “The adder circuit 55 adds the outputs of: (i) the first frequency converter 53, and (ii) the second frequency converter 54, and then outputs a composite signal to the mixer 56. In one embodiment, the mixer 56 may facilitate phase inspection by down-converting to help generate the self-diagnosis monitor signal BIST-OUT.”);
a phase detector circuit configured to determine a phase of the down-converted test signal; and
Kohtani, Abstract “… a composite signal of the transmission channel, and (B) analyzes a phase of the self-diagnosis monitor signal. ”, further, Kohtani [0063] “ In one embodiment, the mixer 56 may facilitate phase inspection by down-converting to help generate the self-diagnosis monitor signal BIST-OUT.”
a processor configured to determine delay information related to the integrated radar transceiver circuit based on the phase of the down-converted test signal (Kohtani [0087] “The delayer 59 is provided to compensate for a phase error or the like based on individual variations of the IQ signal generator 50, the IQ orthogonal mixer 51, the adder circuit 55, and the mixer 56, which are configured in the self-diagnosis signal generation unit 328. That is, the delayer 59 is capable of compensating the error.”).
Regarding claim 11, Kohtani discloses the integrated radar transceiver circuit of claim 1. Kohtani further discloses:
a compensation circuit configured to perform phase compensation in the at least one receive channel based on the determined delay information (Kohtani [0087] “The delayer 59 is provided to compensate for a phase error or the like based on individual variations of the IQ signal generator 50, the IQ orthogonal mixer 51, the adder circuit 55, and the mixer 56, which are configured in the self-diagnosis signal generation unit 328. That is, the delayer 59 is capable of compensating the error.”).
Regarding claim 12, Kohtani discloses:
A method for measuring group delay (Kohtani [0087] “The delayer 59 is provided to compensate for a phase error or the like based on individual variations of the IQ signal generator 50, the IQ orthogonal mixer 51, the adder circuit 55, and the mixer 56, which are configured in the self-diagnosis signal generation unit 328. That is, the delayer 59 is capable of compensating the error.”)
in an integrated radar transceiver circuit, the method comprising (Kohtani [0029] “The general-purpose multi-channel IC 2 is, for example, an FMCW/FCM (Frequency Modulated Continuous Wave/Fast Chirp Modulation) transceiver IC used in the millimeter wave band (76 GHz-81 GHz)”):
generating at least one test signal having at least one test signal frequency component (Kohtani [0034] “Further, the general-purpose multi-channel IC 2 can generate the self-diagnosis clock signal CLK1 having a frequency fBIST_CLK in synchronization with the above-mentioned first to third output signals LO1 to LO3.”);
mixing the at least one test signal and an LO signal having an LO frequency to obtain an up-converted test signal (Kohtani [0062] “As shown in FIG. 2, the IQ orthogonal mixer 51 is provided for up-converting a signal based on the third output signal LO3 and the self-diagnosis clock signal CLK1, and has a λ/4 line 52 and a first frequency converter 53, and a second frequency converter 54.”);
determining a phase of the down-converted test signal; and Kohtani, Abstract “… a composite signal of the transmission channel, and (B) analyzes a phase of the self-diagnosis monitor signal. ”, further, Kohtani [0063] “ In one embodiment, the mixer 56 may facilitate phase inspection by down-converting to help generate the self-diagnosis monitor signal BIST-OUT.”
determining delay information related to the integrated radar transceiver circuit based on the phase of the down-converted test signal (Kohtani [0087] “The delayer 59 is provided to compensate for a phase error or the like based on individual variations of the IQ signal generator 50, the IQ orthogonal mixer 51, the adder circuit 55, and the mixer 56, which are configured in the self-diagnosis signal generation unit 328. That is, the delayer 59 is capable of compensating the error.”).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 2, 4-5, 13-16, and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kohtani et al. (US 20210208246 A1), hereinafter Kohtani, in view of Hasch et al. (EP 2293096 A2), hereinafter Hasch.
Regarding claim 2, Kohtani discloses the integrated radar transceiver circuit of claim 1. Kohtani further discloses [Note: what is not clearly disclosed is strike-through]:
the down-conversion circuit is configured to mix the second up-converted test signal and the LO signal to obtain a second down-converted test signal (Kohtani [0063] “The λ/4 line 52 is used as a 90° phase shifter, and the input signal LO_Q of the third output signal LO3 of the general-purpose multi-channel IC 2 is phase-shifted by 90° and is output to the second frequency converter 54. The first frequency converter 53 mixes the input signal LO_Q of the third output signal LO3 and the self-diagnosis I signal CLK_I, and outputs the mixture to the adder circuit 55. The second frequency converter 54 mixes the output signal LO_1 of the λ/4 line 52 and the self-diagnosis Q signal CLK_Q, and outputs the mixture to the adder circuit 55.”);
the processor is configured to determine a group delay related to the integrated radar transceiver circuit based on the phase of the down-converted test signal and the second phase of the second down-converted test signal (Kohtani [0087] “The delayer 59 is provided to compensate for a phase error or the like based on individual variations of the IQ signal generator 50, the IQ orthogonal mixer 51, the adder circuit 55, and the mixer 56, which are configured in the self-diagnosis signal generation unit 328. That is, the delayer 59 is capable of compensating the error.”).
Kohtani fails to disclose the limitations below. Hasch discloses,
the test signal generator circuit is configured to generate a second test signal having a second test signal frequency component different from the at least one test signal frequency component (Hasch [0042] “The method may further provide for generating a second reference signal having a second reference frequency, wherein the second reference frequency is shifted relative to the first intermediate frequency by a second intermediate frequency or wherein the second intermediate frequency signal has the second intermediate frequency. ”);
the up-conversion circuit is configured to mix the second test signal and the LO signal to obtain a second up-converted test signal (Hasch Fig. 4a, further Hasch [0043] “By mixing the second reference signal with that of the first intermediate frequency signal or with the received intermediate frequency signal, the useful signal may be converted to another carrier having the second intermediate frequency, for example.”, further Hasch [0132] “By division with the dividing element 402, the clock signal generated by the clock generator 209 is made available to the mixer M3 as a second intermediate frequency signal with the frequency f ”);
the phase detector circuit is configured to determine a second phase of the second down-converted test signal (Hasch [110] “In this standard PLL circuit, the high-frequency signal f .sub.Mod is regulated to the external crystal frequency f .sub.Q 208 via a frequency divider and a phase detector (PFD). The frequency divider and the phase detector of PLL1 are in Fig. 2a not shown. ”); and
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Hasch into the invention of Kohtani. Both Kohtani and Hasch are considered analogous arts to the claimed invention as they both disclose the analysis of radar signals mixed with reference signals to determine phase errors. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the apparatus for determining phase errors in a radar circuit using a reference/test signal as disclosed by Kohtani to incorporate a second test signal of a different frequency, then perform the same signal mixing procedure as the first testing signal, as taught by Hasch. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to incorporate a second test signal in order to compensate for phase errors of that originate from local oscillators (See Hasch, Paragraphs [0139] and [0092] ).
Regarding claim 4, Kohtani in view of Hasch discloses the integrated radar transceiver circuit of claim 1. Kohtani fails to disclose the limitation below. Hasch discloses,
wherein the test signal generator circuit is configured to generate the at least one test signal as a sinusoidal signal having the at least one test signal frequency component and to subsequently generate a second test signal as a sinusoidal signal having a second test signal frequency component (Hasch [0042] “The method may further provide for generating a second reference signal having a second reference frequency, wherein the second reference frequency is shifted relative to the first intermediate frequency by a second intermediate frequency or wherein the second intermediate frequency signal has the second intermediate frequency. ”).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Hasch into the invention of Kohtani. Both Kohtani and Hasch are considered analogous arts to the claimed invention as they both disclose the analysis of radar signals mixed with reference signals to determine phase errors. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the method of determining phase errors in a radar circuit using a reference/test signal as disclosed by Kohtani to incorporate a second test signal of a different frequency, as well as to have said signals be sinusoidal, as taught by Hasch. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to incorporate a second test signal in order to account for phase errors introduced by local oscillators (See Hasch, Paragraphs [0139] and [0092] ). Additionally, sinusoidal signals are well known in the context of clocks and are used in Hasch (See Hasch [0032] and [0033]).
Regarding claim 5, Kohtani teaches [Note: what is not clearly taught is strike-through]:
The integrated radar transceiver circuit of claim 1, wherein:
the processor is configured to determine a group delay related to the integrated radar based on the respective phases of the plurality of test signal frequency components (Kohtani [0087] “The delayer 59 is provided to compensate for a phase error or the like based on individual variations of the IQ signal generator 50, the IQ orthogonal mixer 51, the adder circuit 55, and the mixer 56, which are configured in the self-diagnosis signal generation unit 328. That is, the delayer 59 is capable of compensating the error.”).
Kohtani fails to disclose the limitations below. Hasch discloses:
the test signal generator circuit is configured to generate the at least one test signal as a non-sinusoidal signal having a plurality of test signal frequency components (Hasch [0049] “The transmission signal preferably has a constant amplitude and can in frequency modulated (eg stepped ramp, sawtooth, FMCW (frequency modulated continuous wave signal), etc.)”);
the phase detector circuit is configured to determine respective phases of the plurality of test signal frequency components of the down-converted test signal; and (Hasch [0110] “In this standard PLL circuit, the high-frequency signal f .sub.Mod is regulated to the external crystal frequency f .sub.Q 208 via a frequency divider and a phase detector (PFD). The frequency divider and the phase detector of PLL1 are in Fig. 2a not shown. ”)
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Hasch into the invention of Kohtani. Both Kohtani and Hasch are considered analogous arts to the claimed invention as they both disclose the analysis of radar signals mixed with reference signals to determine phase errors. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the method of determining phase errors in a radar circuit using a reference/test signal as disclosed by Kohtani to utilize a non-sinusoidal test signal, and to use a phase detector circuit to determine the respective phases of the test frequency components of the down-converted test-signal, as taught by Hasch. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to utilize a non-sinusoidal signal having a plurality of test-frequency components, as waveforms such as square waves and chirped pulses as well known in the context of FMCW radars which utilize frequency bands comprised of a range of frequencies (See Kohtani, Paragraph [0029]). Additionally, one would be motivated to include a phase detector circuit as knowledge of the phase of the down-converted test signal is required to compute the overall delay of the circuit. This is motivated through the abstract of Kohtani (“analyzes a phase of the self-diagnosis monitor signal).
Regarding claim 13, Kohtani in view of Hasch discloses the method of claim 12. Kohtani further discloses [Note: what is not clearly disclosed is strike-through]:
mixing the second up-converted test signal and the LO signal to obtain a second down-converted test signal (Kohtani [0063] “The λ/4 line 52 is used as a 90° phase shifter, and the input signal LO_Q of the third output signal LO3 of the general-purpose multi-channel IC 2 is phase-shifted by 90° and is output to the second frequency converter 54. The first frequency converter 53 mixes the input signal LO_Q of the third output signal LO3 and the self-diagnosis I signal CLK_I, and outputs the mixture to the adder circuit 55. The second frequency converter 54 mixes the output signal LO_1 of the λ/4 line 52 and the self-diagnosis Q signal CLK_Q, and outputs the mixture to the adder circuit 55.”);
determining the delay information based on the phase of the down-converted test signal and the second phase (Kohtani [0087] “The delayer 59 is provided to compensate for a phase error or the like based on individual variations of the IQ signal generator 50, the IQ orthogonal mixer 51, the adder circuit 55, and the mixer 56, which are configured in the self-diagnosis signal generation unit 328. That is, the delayer 59 is capable of compensating the error.”).
Kohtani fails to disclose the limitations below. Hasch discloses,
generating a second test signal having a second test signal frequency component different from the at least one test signal frequency component (Hasch [0042] “The method may further provide for generating a second reference signal having a second reference frequency, wherein the second reference frequency is shifted relative to the first intermediate frequency by a second intermediate frequency or wherein the second intermediate frequency signal has the second intermediate frequency. ”);
mixing the second test signal and the LO signal to obtain a second up-converted test signal; (Hasch Fig. 4a, further Hasch [0043] “By mixing the second reference signal with that of the first intermediate frequency signal or with the received intermediate frequency signal, the useful signal may be converted to another carrier having the second intermediate frequency, for example.”, further Hasch [0132] “By division with the dividing element 402, the clock signal generated by the clock generator 209 is made available to the mixer M3 as a second intermediate frequency signal with the frequency f ”)
determining a second phase of the second down-converted test signal (Hasch [110] “In this standard PLL circuit, the high-frequency signal f .sub.Mod is regulated to the external crystal frequency f .sub.Q 208 via a frequency divider and a phase detector (PFD). The frequency divider and the phase detector of PLL1 are in Fig. 2a not shown. ”)
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Hasch into the invention of Kohtani. Both Kohtani and Hasch are considered analogous arts to the claimed invention as they both disclose methods for the analysis of radar signals mixed with reference signals to determine phase errors. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the method of determining phase errors in a radar circuit using a reference/test signal as disclosed by Kohtani to incorporate a second test signal of a different frequency, then perform the same signal mixing procedure as the first testing signal, as taught by Hasch. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to incorporate a second test signal in order to compensate for phase errors of that originate from local oscillators (See Hasch, Paragraphs [0139] and [0092] ).
Regarding claim 14, Kohtani in view of Hasch discloses the method of claim 13. Kohtani fails to disclose the limitations below. Hasch discloses,
wherein the at least one test signal is generated as a sinusoidal signal having the at least one test signal frequency component and the second test signal is generated as a sinusoidal signal having the second test signal frequency component (Hasch [0042] “The method may further provide for generating a second reference signal having a second reference frequency, wherein the second reference frequency is shifted relative to the first intermediate frequency by a second intermediate frequency or wherein the second intermediate frequency signal has the second intermediate frequency. ” The examiner notes that sinusoidal signal from clock frequencies is well-known to those in the art. Additionally, there are no signals with a single frequency that are not sinusoidal.).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Hasch into the invention of Kohtani. Both Kohtani and Hasch are considered analogous arts to the claimed invention as they both disclose the analysis of radar signals mixed with reference signals to determine phase errors. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the method of determining phase errors in a radar circuit using a reference/test signal as disclosed by Kohtani to incorporate a second test signal of a different frequency, as well as to have said signals be sinusoidal, as taught by Hasch. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to incorporate a second test signal in order to account for phase errors introduced by local oscillators (See Hasch, Paragraphs [0139] and [0092] ). Additionally, sinusoidal signals are well known in the context of clocks and are used in Hasch (See Hasch [0032] and [0033]).
Regarding claim 15, Kohtani in view of Hasch discloses the method of claim 12. Kohtani further discloses [Note: what is not clearly disclosed is strike-through]:
determining a group delay related to the integrated radar transceiver circuit based on the respective phases of the plurality of test signal frequency components (Kohtani [0087] “The delayer 59 is provided to compensate for a phase error or the like based on individual variations of the IQ signal generator 50, the IQ orthogonal mixer 51, the adder circuit 55, and the mixer 56, which are configured in the self-diagnosis signal generation unit 328. That is, the delayer 59 is capable of compensating the error.”).
Kohtani fails to disclose the limitations below. Hasch discloses:
generating the at least one test signal as a non-sinusoidal signal having a plurality of test signal frequency components(Hasch [0049] “The transmission signal preferably has a constant amplitude and can in frequency modulated (eg stepped ramp, sawtooth, FMCW (frequency modulated continuous wave signal), etc.)”)
determining respective phases of the plurality of test signal frequency components of the down-converted test; and (Hasch [0110] “In this standard PLL circuit, the high-frequency signal f .sub.Mod is regulated to the external crystal frequency f .sub.Q 208 via a frequency divider and a phase detector (PFD). The frequency divider and the phase detector of PLL1 are in Fig. 2a not shown. ”)
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Hasch into the invention of Kohtani. Both Kohtani and Hasch are considered analogous arts to the claimed invention as they both disclose the analysis of radar signals mixed with reference signals to determine phase errors. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the method of determining phase errors in a radar circuit using a reference/test signal as disclosed by Kohtani to utilize a non-sinusoidal test signal, and to use a phase detector circuit to determine the respective phases of the test frequency components of the down-converted test-signal, as taught by Hasch. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to utilize a non-sinusoidal signal having a plurality of test-frequency components, as waveforms such as square waves and chirped pulses as well known in the context of FMCW radars which utilize frequency bands comprised of a range of frequencies (See Kohtani, Paragraph [0029]). Additionally, one would be motivated to include a phase detector circuit as knowledge of the phase of the down-converted test signal is required to compute the overall delay of the circuit. This is motivated through the abstract of Kohtani (“analyzes a phase of the self-diagnosis monitor signal).
Regarding claim 16, Kohtani in view of Hasch teaches the method of claim 15. Kohtani further teaches:
wherein the respective phases of the plurality of test signal frequency components are determined based on a Fast Fourier Transform of the down-converted test signal (Kohtani [0069] The self-diagnosis monitor signal BIST_OUT is processed by the FFT 17a of the signal processor 17. The signal processor 17 diagnoses the accuracy of the phase value of the phase shifter 25 by analyzing the self-diagnosis monitor signal BIST_OUT after the processing of the FFT 17a.).
Regarding claim 19, Kohtani discloses [Note: what is not clearly taught is strike-through]:
A radar transceiver circuit integrated in a semiconductor chip, comprising (Kohtani [0029] “The general-purpose multi-channel IC 2 is, for example, an FMCW/FCM (Frequency Modulated Continuous Wave/Fast Chirp Modulation) transceiver IC used in the millimeter wave band (76 GHz-81 GHz)”)
a test signal generator circuit configured to generate at least one baseband test signal having at least one test signal frequency component (Kohtani [0034] “Further, the general-purpose multi-channel IC 2 can generate the self-diagnosis clock signal CLK1 having a frequency fBIST_CLK in synchronization with the above-mentioned first to third output signals LO1 to LO3.”);
at least one receive channel comprising a node to receive the at least one baseband test signal, the at least one receive channel configured to process the at least one baseband test signal to generate a processed test signal; (Kohtani [0062] “As shown in FIG. 2, the IQ orthogonal mixer 51 is provided for up-converting a signal based on the third output signal LO3 and the self-diagnosis clock signal CLK1, and has a λ/4 line 52 and a first frequency converter 53, and a second frequency converter 54.”)
a processor configured to determine delay information related to the integrated radar transceiver circuit based on the determined phase (Kohtani [0087] “The delayer 59 is provided to compensate for a phase error or the like based on individual variations of the IQ signal generator 50, the IQ orthogonal mixer 51, the adder circuit 55, and the mixer 56, which are configured in the self-diagnosis signal generation unit 328. That is, the delayer 59 is capable of compensating the error.”).
Kohtani fails to disclose the limitation below. Hasch discloses:
a phase detector circuit configured to determine a phase of the processed test signal; and (Hasch [0110] “In this standard PLL circuit, the high-frequency signal f .sub.Mod is regulated to the external crystal frequency f .sub.Q 208 via a frequency divider and a phase detector (PFD). The frequency divider and the phase detector of PLL1 are in Fig. 2a not shown. ”)
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Hasch into the invention of Kohtani. Both Kohtani and Hasch are considered analogous arts to the claimed invention as they both disclose the analysis of radar signals mixed with reference signals to determine phase errors. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the radar delay determination method as disclosed by Kohtani to include a phase determination circuit as taught by Hasch. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to include a phase determination circuit in order to perform an analysis of the down-converted signal in order to determine the overall group delay of the circuit. Kohtani motivates doing this, but does not explicitly disclose a circuit for doing so (Kohtani [0063], “In one embodiment, the mixer 56 may facilitate phase inspection by down-converting to help generate the self-diagnosis monitor signal BIST-OUT.”).
Regarding claim 20, Kohtani in view of Hasch teaches the radar transceiver circuit of claim 19. Kohtani fails to teach the limitation below. Hasch discloses:
wherein the test signal generator circuit is configured to generate a first baseband test signal having a first frequency and a second baseband test signal having a second frequency (Hasch [0042] “The method may further provide for generating a second reference signal having a second reference frequency, wherein the second reference frequency is shifted relative to the first intermediate frequency by a second intermediate frequency or wherein the second intermediate frequency signal has the second intermediate frequency. ”).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Hasch into the invention of Kohtani. Both Kohtani and Hasch are considered analogous arts to the claimed invention as they both disclose the analysis of radar signals mixed with reference signals to determine phase errors. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the radar delay determination method as disclosed by Kohtani to generate a second baseband test signal of a different frequency as taught by Hasch. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to generate a second test signal with a different frequency in order to perform a cancellation of phase errors introduced by local oscillators. (See Hasch [0088]).
Claim(s) 3, 6-7 and 17-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kohtani et al. (US 20210208246 A1), hereinafter Kohtani, in view of Hasch et al. (EP 2293096 A2), hereinafter Hasch, and further in view of Belkin et al., (US 20210258025 A1), hereinafter Belkin.
Regarding claim 3, Kohtani in view of Hasch discloses the integrated radar transceiver circuit of claim 2. Kohtani in view of Hasch fails to disclose the following limitation. Belkin discloses:
wherein the test signal generator circuit is configured to:
generate the at least one test signal with the at least one test signal frequency component at a lower frequency end of an operation baseband frequency range and to generate the second test signal with the second test signal frequency component at an upper frequency end of the operation baseband frequency range, or
generate the at least one test signal with the at least one test signal frequency component at the upper frequency end of the operation baseband frequency range and to generate the second test signal with the second test signal frequency component at the lower frequency end of the operation baseband frequency range (Belkin Fig. 2, instances 290 and 310, further Belkin [0064] The input RF spectrum has one side (USB) filtered in the first two-mixer cell, then its spectrum is reversed and its LSB is filtered in the second two-mixer cell.)
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Belkin into the invention of Kohtani in view of Hasch. The set of Kohtani, Hasch, and Belkin are considered analogous arts to the claimed invention as they both disclose radar calibration circuits using reference signal(s). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the radar transceiver circuit as disclosed by Kohtani in view of Hasch to utilize a first frequency component at the lower band of a frequency comb and a second frequency component at the upper band of a frequency comb as taught by Belkin. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to generate test signals using low and high frequency components in order to account for the group delay originating from the transit time difference between low and high frequency signals (See Belkin [0096]).
Regarding claim 6, Kohtani in view of Hasch teaches the following [Note: what is not clearly taught is strike-through]:
The integrated radar transceiver circuit of claim 1, wherein:
the phase detector circuit is configured to determine a second phase of the second down-converted test signal; and (Hasch [0110] “In this standard PLL circuit, the high-frequency signal f .sub.Mod is regulated to the external crystal frequency f .sub.Q 208 via a frequency divider and a phase detector (PFD). The frequency divider and the phase detector of PLL1 are in Fig. 2a not shown. ”)
the processor is configured to determine the delay information based on the phase of the down-converted test signal and the second phase of the second down-converted test signal. (Kohtani [0087] “The delayer 59 is provided to compensate for a phase error or the like based on individual variations of the IQ signal generator 50, the IQ orthogonal mixer 51, the adder circuit 55, and the mixer 56, which are configured in the self-diagnosis signal generation unit 328. That is, the delayer 59 is capable of compensating the error.”)
Kohtani in view of Hasch fails to disclose the limitation the below. Belkin discloses,
the LO circuit is configured to provide a second LO signal having a second LO frequency different from the LO frequency (Belkin [0062] “The controllable local oscillators are at different frequencies as shown, producing an output signal that has been cleaned and also is at a controllable different frequency than the input. ”);
the up-conversion circuit is configured to mix the at least one test signal and the second LO signal to obtain a second up-converted test signal (See below Belkin [0062] citation);
the down-conversion circuit is configured to mix the second up-converted test signal and the second LO signal to obtain a second down-converted test signal (Belkin [0062] "Down conversion is shown in this figure; however, it may be any conversion, e.g., down- or up-conversion, with the same filtering effects." In this embodiment, the input signal undergoes preliminary filtering by a broadband BPF, then is downconverted by LMIX1 to a lower point in the spectrum for efficient cleaning of one side of the spectrum by an HPF. The signal is then upconverted by LMIX2, the output of which passes through an LPF to clean the other side of the spectrum.);
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Belkin into the invention of Kohtani in view of Hasch. The set of Kohtani, Hasch, and Belkin are considered analogous arts to the claimed invention as they both disclose radar calibration circuits using reference signal(s). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the radar transceiver circuit as disclosed by Kohtani in view of Hasch to configure a local oscillator circuit to provide a second LO frequency, then use said second frequency in a mixer with the at least one test signal as taught by Belkin. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to utilize a second local oscillator frequency in order to permit tuning of local filter parameters, thus allowing for the selection of a high and low frequency signal, as taught by Belkin (See Belkin [0021], [0036]) .
Regarding claim 7, Kohtani in view of Hasch, and further in view of Belkin teaches the integrated radar transceiver of claim 6. Kohtani in view of Hasch fails to teach the limitation below. Belkin teaches:
wherein the LO circuit is configured to provide the LO signal with the LO frequency at a lower frequency end of a FMCW frequency ramp and the second LO signal with the second LO frequency at an upper frequency end of the FMCW frequency ramp (Belkin [0065] “The choice of the LO frequencies is important.”, further [0067] “Equations (2) and (3) show that the difference between two LO frequencies is equal to double the ΔF value that is equal to the filter bandwidth BW.”, further [0067] “Changing the ΔF for both LOs equally will change the bandwidth symmetrically. Changing the ΔF separately and unequally for LO1 and LO2 will change the bandwidth asymmetrically and can be used when useful. Therefore, this embodiment of the present invention allows dynamically tunable filtering with electronically controlled parameters.”. Further, Belkin [0096] “Because the present invention can separate the signal spectrum on lower and upper spectrum parts and develops them separately, there is an opportunity to include a group delay equalizer into one of these circuit paths, reducing the harmful effect of group delay. Because the high-frequency part has a more pronounced delay, it is preferred to include known equalization means into the lower frequency part.”).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Belkin into the invention of Kohtani in view of Hasch. The set of Kohtani, Hasch, and Belkin are considered analogous arts to the claimed invention as they both disclose radar calibration circuits using reference signal(s). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the radar transceiver circuit as disclosed by Kohtani in view of Hasch to configure a second local oscillator, where the first oscillator signal is at a lower frequency end of a FMCW frequency ramp and the second oscillator signal is at a higher frequency end of a FMCW frequency ramp as taught by Belkin. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to select local oscillator frequencies based on a desire to examine the high and low ends of a frequency spectrum in a signal, such as an FMCW signal, as taught by Belkin (See Belkin Fig. 5, further Belkin [0065], [006], and [0096]) .
Regarding claim 17, Kohtani in view of Hasch discloses the method of claim 12. Kohtani in view of Hasch further teaches [Note: what is not clearly disclosed is strike-through]:
(Belkin [0062] “The controllable local oscillators are at different frequencies as shown, producing an output signal that has been cleaned and also is at a controllable different frequency than the input. ”);
determining a second phase of the second down-converted test signal; and (Hasch [0110] “In this standard PLL circuit, the high-frequency signal f .sub.Mod is regulated to the external crystal frequency f .sub.Q 208 via a frequency divider and a phase detector (PFD). The frequency divider and the phase detector of PLL1 are in Fig. 2a not shown. ”)
determining the delay information based on the phase of the down-converted test signal and the second phase.(Kohtani [0087] “The delayer 59 is provided to compensate for a phase error or the like based on individual variations of the IQ signal generator 50, the IQ orthogonal mixer 51, the adder circuit 55, and the mixer 56, which are configured in the self-diagnosis signal generation unit 328. That is, the delayer 59 is capable of compensating the error.”)
Belkin discloses,
providing a second LO signal having a second LO frequency different from the LO frequency (Belkin [0062] “The controllable local oscillators are at different frequencies as shown, producing an output signal that has been cleaned and also is at a controllable different frequency than the input. ”);
mixing the at least one test signal and the second LO signal to obtain a second up-converted test signal;(See below Belkin [0062] citation);
mixing the second up-converted test signal and the second LO signal to obtain a second down-converted test signal;(Belkin [0062] "Down conversion is shown in this figure; however, it may be any conversion, e.g., down- or up-conversion, with the same filtering effects. "In this embodiment, the input signal undergoes preliminary filtering by a broadband BPF, then is downconverted by LMIX1 to a lower point in the spectrum for efficient cleaning of one side of the spectrum by an HPF. The signal is then upconverted by LMIX2, the output of which passes through an LPF to clean the other side of the spectrum.);
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Belkin into the invention of Kohtani in view of Hasch. The set of Kohtani, Hasch, and Belkin are considered analogous arts to the claimed invention as they both disclose radar calibration circuits using reference signal(s). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the radar delay method as disclosed by Kohtani in view of Hasch to configure a local oscillator circuit to provide a second LO frequency, then use said second frequency in a mixer with the at least one test signal as taught by Belkin. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to utilize a second local oscillator frequency in order to permit tuning of local filter parameters, thus allowing for the selection of a high and low frequency signal, as taught by Belkin (See Belkin [0021], [0036]) .
Regarding claim 18, Kohtani in view of Hasch, further in view of Belkin discloses the method of claim 17. Kohtani in view of Hasch fails to disclose the limitation below. Belkin discloses:
wherein the LO signal is provided with the LO frequency at a lower frequency end of a FMCW frequency ramp and the second LO signal is provided with the second LO frequency at an upper frequency end of the FMCW frequency ramp, or (Belkin Fig. 2, instances 290 and 310, further Belkin [0064] The input RF spectrum has one side (USB) filtered in the first two-mixer cell, then its spectrum is reversed and its LSB is filtered in the second two-mixer cell.)
wherein the LO signal is provided with the LO frequency at the upper frequency end of the FMCW frequency ramp and the second LO signal is provided with the second LO frequency at the lower frequency end of the FMCW frequency ramp.
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Belkin into the invention of Kohtani in view of Hasch. The set of Kohtani, Hasch, and Belkin are considered analogous arts to the claimed invention as they both disclose radar calibration circuits using reference signal(s). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the radar delay method as disclosed by Kohtani in view of Hasch to configure a local oscillator circuit to provide a second LO frequency, then use said second frequency in a mixer with the at least one test signal as taught by Belkin. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to utilize a second local oscillator frequency in order to permit tuning of local filter parameters, thus allowing for the selection of a high and low frequency signal, as taught by Belkin (See Belkin [0021], [0036]) .
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kohtani et al. (US 20210208246 A1), hereinafter Kohtani, in view of Jin et al., (CN 113055108 A), hereinafter Jin.
Regarding claim 8, Kohtani discloses the integrated radar transceiver circuit of claim 1. Kohtani fails to disclose the limitations below. Jin discloses:
wherein the test signal generator circuit is configured to generate the at least one test signal as at least one digital test signal, and (Jin, Pg. 2 lines 70-71 “the main controller sets the initial frequency of the chirp signal; the cut-off frequency and the chirp coefficient are input to the FPGA broadband digital chirp signal generator;”)
wherein the integrated radar transceiver circuit further comprises digital-to-analog conversion circuitry configured to convert the at least one digital test signal from digital to analog signal domain (Jin Claim 1 - “A mixer group time delay measuring method and device, wherein comprising a broadband digital chirp signal generator based on FPGA, a mixer to be tested, an intermediate frequency band-pass filter, a broadband bridge, an analog-to-digital converter (AD), a main controller; ”).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Jin into the invention of Kohtani. Both Kohtani and Jin are considered analogous arts to the claimed invention as they both disclose radar devices for the analysis of errors in said devices using reference signals. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the integrated radar circuit as disclosed by Kohtani to generate a digital test signal and utilize a digital-to-analog conversion circuit as taught by Jin. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to utilize a digital test signal and a digital-to-analog conversion circuit in order to generate a chirped signal with adjustable frequency bands as used in many modern FMCW radar systems. Digital test signals are easily configurable to match desired frequency and other signal characteristics, for example if one desires to produce orthogonal test signals (See Jin Pg. 2 lines 87-91).
Claim(s) 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kohtani et al. (US 20210208246 A1), hereinafter Kohtani, in view of Jin et al., (CN 113055108 A), hereinafter Jin, and further in view of Skyworks Si5351 A/B/C-B Specification Sheet, hereinafter Skyworks.
Regarding claim 9, Kohtani in view of Jin discloses the integrated radar transceiver circuit of claim 8. Kohtani in view of Jin further discloses [Note: what is not clearly disclosed is strike-through]:
The integrated radar transceiver circuit of claim 8, wherein the test signal generator circuit is configured to generate the at least one digital test signal (Kohtani [0034] “Further, the general-purpose multi-channel IC 2 can generate the self-diagnosis clock signal CLK1 having a frequency fBIST_CLK in synchronization with the above-mentioned first to third output signals LO1 to LO3.”)
Skyworks discloses,
signal based on a clock signal having a clock spread lower than 200 ps over a range of supply voltage of +/- 10% of a nominal supply voltage and a range of temperature of -40 to 135 degree C (Skyworks table 5, center spread from 10 ps to 150 ps over voltage range, further Skyworks Table 13, junction temperature range -55 C to 150 C.).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to incorporate the features as disclosed by Skyworks into the invention of Kohtani. Both Kohtani and Skyworks are considered analogous arts to the claimed invention as they both disclose clock signal generators. It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to design the test signal generator circuit as disclosed by Kohtani to utilize a clock circuit with the characteristics as disclosed by Skyworks. One of ordinary skill in the art prior to the effective filing date of the claimed invention would have been motivated to utilize the clock circuit as disclosed by Skyworks in order to achieve the desired clock frequency performance as disclosed in the claim. This is a simple insertion of a commercial clock circuit into the invention, which is obvious to those in the art.
Regarding claim 10, Kohtani in view of Jin, and further in view of Skyworks discloses the integrated radar transceiver circuit of claim 9. Kohtani further discloses:
The integrated radar transceiver circuit of claim 9, wherein the at least one receive channel comprises analog-to-digital conversion circuitry configured to convert the down-converted test signal from analog to digital signal domain, and (Kohtani, Fig. 2 instance 62, further Kohtani [0081] “After the signal processor 17 obtains the A/D-converted self-diagnosis monitor signal BIST_OUT by the A/D converter 62 and the digital data of the signal BIST_OUT is FFT-processed by the FFT 17a”)
wherein the integrated radar transceiver circuit is configured to synchronize the test signal generator circuit, the digital-to-analog conversion circuitry, and the analog-to-digital conversion circuitry based on the clock signal (Kohtani [0034] “Further, the general-purpose multi-channel IC 2 can generate the self-diagnosis clock signal CLK1 having a frequency fBIST_CLK in synchronization with the above-mentioned first to third output signals LO1 to LO3.”, further, Kohtani [0082] “The signal processor 17 can perform the diagnosis of the phase value of the phase shifter 25 at a relatively low frequency (for example, 20 MHz) that is dependent on the self-diagnosis clock signal BIST_CLK, and as a result, the phase error of the phase shifter 25 can be determined with high accuracy.”).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kolinko et al. (US 20120249363 A1) discloses a long rage radar imaging system that utilizes doubly mixed signals (feeding the output of a down-converted signal into a further down-converting mixer), which is relevant to the configuration of the applicant’s disclosure. Delwar et al. Sensors 2022, 22, 594, discloses a duplex radar system which up-converts signals for short-ranged radar applications, using local oscillators as references.
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/T.J.H./Examiner, Art Unit 3648
/RESHA DESAI/Supervisory Patent Examiner, Art Unit 3648
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