DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of US 12095495. Although the claims at issue are not identical, they are not patentably distinct from each other because all the claims in the pending Application are transparently found in US 12095495 with obvious wording variations. See below for mapping:
Claim 1: A transmitter, comprising: a transmitter electrically coupled to an amplifier; and a switching network electrically coupled to the transformer, the switching network configured to activate a first switch to apply a first phase shift to a first
signal input to the amplifier, and activate a second switch to apply a second phase shift to a second signal input to the amplifier (at least claims 1 and 15 of U.S. Patent No. 12,095,495. Pending claim 1 is not patentably distinct from the patented claims because the patented claims recite the corresponding transmitter/transmit circuitry, transformer, switching network, first switch, second switch, and first and second phase shifts.)
Claim 2: The transmitter of claim 1, wherein the switching network is coupled between the transformer and a single-ended transmission line. (at least claims 8 and 9 of U.S. Patent No. 12,095,495. Pending claim 2 is not patentably distinct from the patented claims because the patented claims recite phase shifters and one or more single-ended transmission lines coupled to the first and second switches)
Claim 3: The transmitter of claim 1, comprising an inductor coupled between the switching network and processing circuitry. (at least claims 6 and 20 of U.S. Patent No. 12,095,495. Pending claim 3 is not patentably distinct from the patented claims because the patented claims recite an inductor coupled between the phase-shifting/switching circuitry and processing circuitry.)
Claim 4: The transmitter of claim 3, wherein the inductor comprises an inductance of between 100 picohenries and 150 picohenries (at least claim 7 of U.S. Patent No. 12,095,495. Pending claim 4 is not patentably distinct from the patented claim because the patented claim recites the same 100 picohenries to 150 picohenries inductance range.)
Claim 5: The transmitter of claim 3, wherein the inductor is configured to absorb reactive power associated with the first switch and the second switch (at least claims 6 and 20 of U.S. Patent No. 12,095,495. Pending claim 5 is not patentably distinct from the patented claims because the patented claims recite an inductor configured to absorb excess reactive power of the first and second switches.)
Claim 6: The transmitter of claim 1, comprising phase shifting circuitry coupled between the switching network and processing circuitry, the phase shifting circuitry configured to apply a 45-degree phase shift, a 90-degree phase shift, or a
135-degree phase shift to the first signal or the1second signal (at least claim 8 of U.S. Patent No. 12,095,495. Pending claim 6 is not patentably distinct from the patented claim because the patented claim recites one or more phase shifters coupled between the phase-shifting/switching circuitry and processing circuitry and configured to shift a signal phase.)
Claim 7: The transmitter of claim 1, wherein tine first phase shift comprises a 180-degree phase shift (at least claims 3 and 17 of U.S. Patent No. 12,095,495. Pending claim 7 is not patentably distinct from the patented claims because the patented claims recite a corresponding 180-degree phase shift.)
Claim 8: The transmitter of claim 1, wherein lhe second phase shift comprises a 0-degree phase shift (at least claims 2 and 16 of U.S. Patent No. 12,095,495. Pending claim 8 is not patentably distinct from the patented claims because the patented claims recite a corresponding 0-degree phase shift.)
Claim 9: The transmitter of claim 1, wherein the switching network is disposed between a differential transmission line and processing circuitry (at least claims 8 and 10 of U.S. Patent No. 12,095,495. Pending claim 9 is not patentably distinct from the patented claims because the patented claims recite phase-shifting circuitry coupled to processing circuitry and differential transmission lines coupled to the switching/phase-shifting arrangement).
Claim 10: A phased array system, comprising: transmit circuitry comprising a power amplifier; at least one phase shifter configured to shift a phase of a signal input to the power amplifier; and a switching network, comprising: a first switch configured to couple a processor to a first end of an inductor of the power amplifier; and a second switch configured to couple the processor to a second end of the inductor of the power amplifier (at least claims 8, 15, and 20 of U.S. Patent No. 12,095,495. Pending claim 10 is not patentably distinct from the patented claims because the patented claims recite a phased array system including transmit circuitry, phase shifters, a switching network, first and second switches, and an inductor associated with the switching arrangement.)
Claim 11: The phased array system of claim 10, comprising a differential transmission line configured to couple the switching network to a port of the power amplifier (at least claims 10 and 15 of U.S. Patent No. 12,095,495. Pending claim 11 is not patentably distinct from the patented claims because the patented claims recite a phased array system with switching circuitry and differential transmission lines coupled to the phase- shifting arrangement.)
Claim 12: The phased array system of claim U, wherein the switching network is coupled to another inductor (at least claims 6, 7, and 20 of U.S. Patent No. 12,095,495. Pending claim 12 is not patentably distinct from the patented claims because the patented claims recite an inductor coupled to the phase-shifting/switching circuitry.)
Claim 13: The phased array system of claim 12, wherein the other inductor has an inductance of 50 picohenries to 100 picohenries (at least claim 7 of U.S. Patent No. 12,095,495. Pending claim 13 is not patentably distinct from the patented claim because the patented claim recites a corresponding inductor range of 100 picohenries to 150 picohenries, which overlaps at 100 picohenries.)
Claim 14: The phased array system of claim 12, wherein the switching network comprises a first shunt switch and a second shunt switch (at least claims 1 and 15 of U.S. Patent No. 12,095,495. Pending claim 14 tis not patentably distinct from the patented claims because the patented claims recite the corresponding switching network/switching circuitry including first and second switches for applying first
and second phase shifts.)
Claim 15: The phased array system of claim 14, wherein the first shunt switch and the second shunt switch are disposed 100 micrometers to 250 micrometers from the port of the power amplifier (at least claims 15 and 20 of U.S. Patent No. 12,095,495. Pending claim 15 is not patentably distinct from the patented claims because the patented claims recite the corresponding phased array system, switching network, first and second switches, and inductor arrangement, with the claimed switch placement being an obvious implementation detail of the same switching arrangement.)
Claim 16. The phased array system of claim 10, comprising a differential transmission line that couples a first shunt switch and a second shunt switch to the first switch and the second switch (at least claims 10 and 15 of U.S. Patent No. 12,095,495. Pending claim 16 is not patentably distinct from the patented claims because the patented claims recite the corresponding phased array system, switching network/switching circuitry, and differential transmission line arrangement.)
Claim 17: The phased array system of claim 16, wherein the first shunt switch and the second shunt switch are coupled to a port of the power amplifier (at least claim 15 of U.S. Patent No. 12,095,495. Pending claim 17 is not patentably distinct from the patented claim because the patented claim recites the corresponding phased array system and switching network associated with the transmit circuitry.)
Claim 18: A method, comprising: receiving a first indication to send a first signal via a transmitter; closing a first switch to couple processing circuitry to a first end of an inductor of the transmitter and opening a second switch to decouple the processing circuitry from a second end of the inductor to apply a first phase shift to the first signal based on receiving the first indication; receiving a second indication to send a second signal via the transmitter; and closing the second switch to couple the processing circuitry to the second end of the inductor and opening the first switch to decouple the processing circuitry from the first end of the inductor to apply a second phase shift to the second signal based on receiving the second indication (at least claims 11 and 12 of U.S. Patent No. 12,095,495. Pending claim l81is not patentably distinct from the patented claims because the patented claims recite activating the first switch to cause a first phase shift, deactivating the second switch, activating the second switch to cause a second phase shift, and deactivating the first switch.)
Claim 19: The method of claim 18, comprising closing a first shunt switch configured to generate an electrical short at the second end of the inductor based on the first indication (at least claims 11, 12, and 15 of U.S. Patent No. 12,095,495. Pending claim 19 is not patentably distinct from the patented claims because the patented claims recite the corresponding first-Switch/second-switch phase-shifting operation and switching network arrangement.)
Claim 20: The method of claim 18, comprising closing a second shunt switch configured to generate an electrical short at the first end of the inductor based on the second indication (at least claims 11, 12, and 15 of U.S. Patent No. 12,095,495. Pending claim 20 is not patentably distinct from the patented claims because the patented claims recite the corresponding first-switch/second-switch phase-shifting operation and switching network arrangement.)
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of US 12250019. Although the claims at issue are not identical, they are not patentably distinct from each other because all the claims in the pending Application are transparently found in US 12250019 with obvious wording variations. See below for claim mapping:
Claim 1: A transmitter, comprising: a transformer electrically coupled to an amplifier; and a switching network electrically coupled to the transformer, the switching network configured to activate a first switch to apply a first phase shift to a first
signal input to the amplifier, and activate a second switch to apply a second phase shift to a second signal input to the amplifier (at least claims 1 and 11 of U.S. Patent No. 12,250,019. Pending claim 1 is not patentably distinct from the patented claims because the patented claims recite the corresponding amplifier, transformer, switching network, first switch, second switch, and first and second phase shifts.)
Claim 2: The transmitter of claim 1, wherein the switching network is coupled between the transformer and a single-ended transmission line (at least claims 8 and 10 of U.S. Patent No. 12,250,019. Pending claim 2 is not patentably distinct from the patented claims because the patented claims recite a transmission line coupled between the transformer and switching network, wherein the transmission line may comprise a single-ended transmission line.)
Claim 3: The transmitter of claim 1, comprising an inductor coupled between the switching network and processing circuitry (at least claims 11 and 17 of U.S. Patent No. 12,250,019. Pending claim 3 is not patentably distinct from the patented claims because the patented claims recite the corresponding switching network and processing circuitry coupled to ends of a transformer winding to apply first and second phase shifts.)
Claim 4: The transmitter of claim 3, wherein the inductor comprises an inductance of between 100 picohenries and 150 picohenries (at least claims 11 and 17 of U.S. Patent No. 12,250,019. Pending claim 4 ii, not patentably distinct from the patented claims because the claimed inductance range is an obvious implementation detail of the same switching-network and phase-shifting arrangement.)
Claim 5: The transmitter of claim 3, wherein the inductor is configured to absorb reactive power associated with the first switch and the second switch (at least claims 11 and 17 of U.S. Patent No. 12,250,019. Pending claim 5 is not patentably distinct from the patented claims because the patented claims recite the corresponding first and second switches and phase-shifting arrangement coupled to processing circuitry.)
Claim 6: The transmitter of claim 1, comprising phase shifting circuitry coupled between the switching network and processing circuitry, the phase shifting circuitry configured to apply a 45-degree phase shift, a 90-degree phase shift, or a 135-degree phase shift to the first signal or the second signal (at least claims 11, 14, and 15 of U.S. Patent No. 12,250,019. Pending claim 6 is not patentably distinct from the patented claims because the patented claims recite phase shift circuitry comprising a switching network configured to apply first and second phase shifts to a signal input to the amplifier.)
Claim 7: The transmitter of claim 1, wherein the first phase shift comprises a 180-degree phase shift (at least claims 4, 14, and 19 of U.S. Patent No. 12,250,019. Pending claim 7 is not patentably distinct from the patented claims because the patented claims recite the corresponding 180-degree phase shift.)
Claim 8: The transmitter of claim 1, wherein !be second phase shift comprises a 0-degree phase shift. (at least claims 5, 15, and 20 of U.S. Patent No. 12,250,019. Pending claim is not patentably distinct from the patented claims because the patented claims recite the corresponding 0-degree phase shift.)
Claim 9: The transmitter of claim 1, wherein the switching network is disposed between a differential transmission line and processing circuitry (at least claims 9, 11, and 16 of U.S. Patent No. 12,250,019. Pending claim\9 is not patentably distinct from the patented claims because the patented claims recite the corresponding switching network, processing circuitry, and differential transmission line arrangement.)
Claim 10: A phased array system, comprising: transmit circuitry comprising a power amplifier; at least one phase shifter configured to shift a phase of a signal input to the power amplifier; and a switching network, comprising: a first switch configured to couple a processor to a first endiof an inductor of the power amplifier; and a second switch configured to couple the processor to a second end of the inductor of the power amplifier (at least claims 2, 11, 12, and 17 of U.S. Patent No. 12,250,019. Pending claim 10 is not patentably distinct from the patented claims because the patented claims recite the corresponding phase array system, power amplifier, phase shift circuitry, switching network, first switch, second switch, and processing circuitry.)
Claim 11: The phased array system of claim 10, comprising a differential transmission line configured to couple the switching network to a port of the power amplifier (at least claims 9 and 16 of U.S. Patent No. 12,250,019. Pending claim 11 is not patentably distinct from the patented claims because the patented claims recite the corresponding differential transmission line coupled to the switching network/transformer arrangement.)
Claim 12. The phased array system of claim 11, wherein the switching network is coupled to another inductor (at least claims 11, 16, and 17 of U.S. Patent No. 12,250,019. Pending claim 12 is not patentably distinct from the patented claims because the patented claims recite the corresponding switching network and transformer winding arrangement coupled to processing circuitry for applying phase shifts).
Claim 13. The phased array system of claim 12, wherein the other inductor has an inductance of 50 picohenries to 100 picohenries (at least claims 11, 16, and 17 of U.S. Patent No. 12,250,019. Pending claim 13 is not patentably distinct from the patented claims because the claimed inductance range is an obvious implementation detail of the same switching-network and phase-shifting arrangement.)
Claim 14: The phased array system of claim 12, wherein the switching network comprises a first shunt switch and a second shunt switch (at least claims 11 and 17 of U.S. Patent No. 12,250,019. Pending claim 14 is not patentably distinct from the patented claims because the patented claims recite the corresponding switching network and first and second sets of switches used to apply first and second phase shifts.)
Claim 15: The phased array system of claim 14, wherein the first shunt switch and the second shunt switch are disposed 100 micrometers to 250 micrometers from the port of the power amplifier (at least claims 11, 16, and 17 of U.S. Patent No. 12,250,019. Pending claim 15 is not patentably distinct from the patented claims because the claimed switch placement is an obvious implementation: detail of the same switching-network and phase-shifting arrangement.)
Claim 16: The phased array system of claim 10, comprising a differential transmission line that couples a first shunt switch and a second shunt switch to the first switch and the second switch (at least claims 9, 16, and 17 of U.S. Patent No. 12,250,019. Pending claim 16 is not patentably distinct from the patented claims because the patented claims recite the corresponding differential transmission line and first and second sets of switches used to apply first and second phase shifts.)
Claim 17: The phased array system of claim 16, wherein the first shunt switch and the second shunt switch are coupled to a port of the power amplifier (at least claims 11, 12, 16, and 17 of U.S. Patent No. 12,250,019. Pending claim 17 is not patentably distinct from the patented claims because the patented claims recite the corresponding power amplifier, switching network, differential transmission line, and phase- shifting arrangement.)
Claim 18: A method, comprising: receiving a first indication to send a first signal via a transmitter; closing a first switch to couple processing circuitry to a first end of
An inductor of the transmitter and opening a second switch to decouple the
processing circuitry from a second end of the inductor to apply a first phase shift to the first signal based on receiving the first indication; receiving a second indication lo send a second signal via the transmitter; and closing the second switch to couple the processing 1circuitry to the second end of the inductor and opening the first switch to decouple the processing circuitry from the first end of the inductor to apply a second phase shift to the second signal based on receiving the second indication (at least claims 17, 19, and 20 of U.S. Patent No. 12,250,019. Pending claim 18 is not patentably distinct from the patented claims because the patented claims recite receiving an indication to send a signal via a transmitter and activating/deactivating switches of a switching network to apply first and second phase shifts.)
Claim 19. The method of claim 18, comprising closing a first shunt switch configured to generate an electrical short at the second end of the inductor based on the first indication (at least claim 17 of U.S. Patent No. 12,250,019. Pending claim 19 is not patentably distinct from the patented claim because the patented claim recites activating a first set of switches and deactivating a second set of switches of a switching network to apply a first phase shift.)
Claim 20. The method of claim 18, comprising closing a second shunt switch configured to generate an electrical short at the first end of the inductor based on the second indication (at least claim 17 of U.S. Patent No. 12,250,019. Pending claim 20 is not patentably distinct from the patented claim because the patented claim recites activating a second set of switches and deactivating a first set of switches of a switching network to apply a second phase shift.)
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of the copending application 18814266. Although the claims at issue are not identical, they are not patentably distinct from each other because all the claims in the pending Application are transparently found in copending application 18814266 with obvious wording variations. See the below for the claim mapping: Claim 1: A transmitter, comprising: a transformer electrically coupled to an amplifier; and a switching network electrically coupled to the transformer, the switching network configured to activate a first switch to apply a first phase shift to a first signal input to the amplifier, and activate a second switch to apply a second phase shift to a second signal input to the amplifier (at least claim 15 of copending Application No. 18/814,266. Pending claim 1 is not patentably distinct from the copending claim because the copending claim recites the corresponding receiver-side transformer, amplifier, switching network, first switch, second switch, and first and second phase shifts.)
Claim 2: The transmitter of claim 1, wherein fue switching network is coupled between the transformer and a single-ended transmission line (at least claim 16 of copending Application No. 18/814,266. Pending claim 2 is not patentably distinct from the copending claim because the copending claim recites the corresponding; switching network coupled between the transformer and single-ended transmission lines.)
Claim 3: The transmitter of claim 1, comprisio.g an inductor coupled between the switching network and processing circuitry (at least claim 17 of copending Application No. 18/814,266. Pending claim 3 is not patentably distinct from the copending claim because the copending claim recites the corresponding inductor coupled to the switching network and processing circuitry)
Claim 4: The transmitter of claim 3, wherein the inductor comprises an inductance of between 100 picohenries and 150 picohenries (at least claim 18 of copending Application No. 18/814,266. Pending claim 4 is not patentably distinct from the copending claim because the copending claim recites the same 100 picohenries to 150 picohenries inductance range).
Claim 5: The transmitter of claim 3, wherein the inductor is configured to absorb reactive power associated with the first switch and the second switch (at least claim 19 of copending Application No. 18/814,266. Pending claim 5 is not patentably distinct from the copending claim because the copending claim recites an inductor configured to absorb excess reactive power associated with the first switch and the second switch).
Claim 6: The transmitter of claim 1, comprising phase shifting circuitry coupled between the switching network and processing circuitry, the phase shifting circuitry configured to apply a 45-degree phase shift, a 90-degree phase shift, or a 135-degree phase shift to the first signal or the second signal (at least claim 20 of copending Application No. 18/814,266, pending claim 6 is not patentably distinct from the copending claim because the copending claim recites corresponding phase shifting circuitry coupled between the switching network and a processor and configured to apply a 45-degree phase shift a 90-degree phase shift, or a 135-degree phase shift.)
Claim 7: The transmitter of claim 1, wherein tlli.e first phase shift comprises a 180-degree phase shift (at least claims 2 and 13 of copending Application No. 18/814266. Pending claim 7 is not patentably distinct from the copending claims because the copending claims recite the corresponding 180-degree phase shift.)
Claim 8: The transmitter of claim 1, wherein the second phase shift comprises a 0-degree phase shift (at least claims 3 and 14 of copending Application No. 18/814,266. Pending claim 8 is not patentably distinct from the copending claims because the copending claims recite the corresponding 0-degree phase shift.)
Claim 9: The transmitter of claim 1, wherein the switching network is disposed between a differential transmission line and processing circuitry (at least claims 4 and 8 of copending Application No. 18/814,266. Pending claim 9 is not patentably distinct from the copending claims because the copending claims recite the corresponding switching network, processing circuitry, and differential transmission line arrangement).
Claim 10: A phased array system, comprising: !transmit circuitry comprising a power amplifier; at least one phase shifter configured to shift a phase of a signal input to the power amplifier; and a switching network, comprising: a first switch configured to couple a processor to a first end of an inductor of the power amplifier; and a second switch configured to couple the processor to a second end of the inductor of the power amplifier (at least claim 1 of copending Application No. 18/814,266. Pending claim 10 is not patentably distinct from the copending claim because the copending claim recites the corresponding phased array system, amplifier, phase shift circuitry, switching network, first switch, second switch, processor, and inductor-end coupling arrangement.)
Claim 11: The phased array system of claim 10, comprising a differential transmission line configured to couple the switching network to a port of the power amplifier (at least claim 4 of copending Application No. 18/814,266. Pending claim 11 is not patentably distinct from the copending claim because the copending claim recites the corresponding differential transmission line configured to couple the switching network to a port of the amplifier.)
Claim 12: The phased array system of claim q, wherein the switching network is coupled to another inductor (at least claim 5 of copending Application No. 18/814,266. Pending claim 12 is not patentably distinct from the copending claim because the copending claim recites the switching network coupled to another inductor.)
Claim 13: The phased array system of claim 12, wherein the other inductor has an inductance of 50 picohenries to 100 picohenries (at least claim 6 of copending Application No. 18/814,266. Pending claim 13 is not patentably distinct from the copending claim because the copending claim recites the same 50 picohenries to 100 picohenries inductance range.)
Claim 14: The phased array system of claim 12, wherein the switching network comprises a first shunt switch and a second shunt switch (at least claim 1 of copending Application No. 18/814,266. Pending claim 14 is not patentably distinct from the copending claim because the copending claim recites a switching network comprising a first shunt switch and a second shunt switch.)
Claim 15: The phased array system of claim 141, wherein the first shunt switch and the second shunt switch are disposed 100 micrometers to 250 micrometers from the port of the power amplifier (at least claim 7 of copending Application No. 18/814,266. Pending claim 15 is not patentably distinct from the copending claim because the copending claim recites the first shunt switdh and the second shunt switch disposed 100 micrometers to 250 micrometers from a port of the amplifier.)
Claim 16: The phased array system of claim 10, comprising a differential transmission line that couples a first shunt switch and a second shunt switch to the first switch and the second switch (at least claim 8 of copending Application No. 18/814,266. Pending claim 16 is not patentably distinct from the copending claim because the copending claim recites a differential transmission line configured to couple the first shunt switch and the second shunt switch to the first switch and the second switch).
claim 17: The phased array system of claim 16, wherein the first shunt switch and the second shunt switch are coupled to a port of the power amplifier (at least claim 9 of copending Application No. 18/814,266. Pending claim 17 is not patentably distinct from the copending claim because the copending claim recites the first shunt switch and the second shunt switch coupled to a port of the amplifier.)
Claim 18: A method, comprising: receiving a first indication to send a first signal via a transmitter; closing a first switch to couple processing circuitry to a first end of an inductor of the transmitter and opening a second switch to decouple the processing circuitry from a second end of the inductor to apply a first phase shift to the first signal based on receiving the first indication; receiving a second indication to send a second signal via the transmitter, and closing the second switch to couple the processing circuitry to the second end of the inductor and opening the first switch to decouple the processing circuitry from the first end of the inductor to apply a second phase shift to the second signal based on receiving the second indication (at least claim 10 of copending Application No. 18/814,266. Pending claim 18 is not patentably distinct from the copending claim because the copending claim recites the corresponding method of activating a first switch and deactivating a second switch to apply a first phase shift, and activating the second switch and deactivating the first switch to apply a second phase shift.)
Claim 19: The method of claim 18, comprising closing a first shunt switch configured to generate an electrical short at the second end of the inductor based on the first indication (at least claim 11 of copending Application No. 18/814,266. Pending claim 19 is not patentably distinct from the copending claim because the copending claim recites activating a first shunt switch configured to create a short circuit at the second end of the inductor.)
Claim 20: The method of claim 18, comprising closing a second shunt switch configured to generate an electrical short at the first end of the inductor based on the second indication (at least claim 12 of copending Application No. 18/814,266. Pending claim 20 is not patentably distinct from the copending claim because the copending claim recites activating a second shunt switch configured to create a short circuit at the first end of the inductor.)
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 6-8, 10, 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (US 20220231391, hereinafter “Wang”) and further in view of Varonen et al. (US 20200403584, hereinafter “Varonen”).
Regarding claim 1, Wang discloses,
A transmitter (the system 1000 may include a transmitter 1040 and a plurality of power amplifiers (PAs) 1018, [0074]), comprising:
a transformer electrically coupled to an amplifier (FIG. 10 illustrates four transmit paths (e.g., each including a DSA 1014a, a phase shifter 1016a, and a PA 1018). A phased array system can include any suitable number of paths.. each receive path may include a phase shifter, the switched transformer-based phase shifter circuitries disclosed herein can advantageously reduce the size of a phased array system or a beamforming integrated device [0078]); and
a switching network electrically coupled to the transformer (The phase shifter circuitry 200 may utilize a switched transformer topology to provide two output phase states with a phase difference of about 180 degrees [0036]),
the switching network configured to activate a first switch to apply a first phase shift (the method 1100 may further include closing a first switch coupled between the first node and the positively coupled transformer and opening a second switch coupled between the first node and the negatively coupled transformer to select, in response to the first control signal, the first signal path for transmitting the first signal at 1104. In some aspects, the first switch may correspond to the switch 214a or the switch 214b, and the second switch may correspond to the switch 224a or the switch 224b, [0085]-[0086]), and activate a second switch to apply a second phase shift (the method 1100 may further include opening a first switch coupled between the first node and the positively coupled transformer and closing a second switch coupled between the first node and the negatively coupled transformer to select the second signal path for transmitting the second signal in response to the second control signal at 1108. In some aspects, the first switch may correspond to the switch 214a or the switch 214b, and the second switch may correspond to the switch 224a or the switch 224b, [0085]-[0086]).
However, Wang does not explicitly disclose, the switching network is connected to the first and second input of the amplifier.
In the same field of endeavor, Varonen discloses, the switching network is connected to the first and second input (The secondary windings 514, 519 are connected at one end to a first output port 533, 537 and at the other to a second output port 535, 539. Connected to each end of the secondary winding 514, 519 is a switch 520, 521, 524, 525 connected at one end to the secondary winding, Fig. 5 and Fig. 6 and Para. [0048]-[0052]) of the amplifier (The transformer based switch of FIG. 5 and Fig. 6 would find use across a variety of PALNA applications).
Therefore, it would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify Wang by specifically providing the switching network is connected to the first and second input of the amplifier, as taught by Varonen for the purpose of providing a technique for improved linearity in a compact switch while also providing low-insertion loss, especially useful for PALNA systems [0002].
Regarding claim 6, the combination of Wang and Varonen discloses everything claimed as applied above (see claim 1), further Wang discloses,
phase shifting circuitry coupled between the switching network and a processor, the phase shifting circuitry configured to apply a 45-degree phase shift, a 90-degree phase shift, or a 135-degree phase shift to the first signal or the second signal (the phase shifter circuitry 910 may be configured to provide a phase-shift of 0° or 90° based on a control signal 915 (shown as Vctrl5) being a logic high or a logic low, respectively, or vice versa. The phase shifter circuitry 920 may be configured to provide a phase-shift of 0° or 5.6° based on a control signal 911 (shown as Vctrl1) being a logic high or a logic low, respectively, or vice versa. The phase shifter circuitry 930 may be configured to provide a phase-shift of 0° or 180° based on a control signal 916 (shown as Vctrl6) being a logic high or a logic low, respectively, or vice versa. The phase shifter circuitry 940 may be configured to provide a phase-shift of 0° or 22° based on a control signal 913 (shown as Vctrl3) being a logic high or a logic low, respectively, or vice versa. The phase shifter circuitry 950 may be configured to provide a phase-shift of 0° or 11° based on a control signal 912 (shown as Vctrl2) being a logic high or a logic low, respectively, or vice versa. The phase shifter circuitry 960 may be configured to provide a phase-shift of 0° or 45° based on a control signal 914 [0068]).
Regarding claim 7, the combination of Wang and Varonen discloses everything claimed as applied above (see claim 1), further Wang discloses,
wherein coupling the processor to the first end of the inductor of the low noise amplifier applies a 180-degree phase shift (The present disclosure describes mechanisms for providing a 180 degree phase shifter in a manner that can address the insertion loss, phase flatness [0024]; the phase shifter circuitry 200 may provide two output phase states (a first output phase state from the first signal path 201 and a second output phase state from the second signal path 203) with a relative phase difference of about 180 degrees [0039]) to a signal received at the receive circuitry (The switches 1022 may be selected to couple various antenna elements 1025 to the LNAs 1020. The LNAs 1020 may amplify the received signals. The phase shifters 1016b may be substantially similar to the phase shifters 1016a and may apply various phase shifts (e.g., 45°, 90°, 180°, etc.) to the received signals [0076]).
Regarding claim 8, the combination of Wang and Varonen discloses everything claimed as applied above (see claim 1), further Wang discloses,
wherein coupling the processor to the second end of the inductor of the low noise amplifier applies a 0-degree phase shift (For the positively coupled transformer, the voltage across the primary coil and the voltage across the secondary coil are in-phase (providing a 0 degree phase-shift) [0024]) to a signal received at the receive circuitry (The switches 1022 may be selected to couple various antenna elements 1025 to the LNAs 1020. The LNAs 1020 may amplify the received signals. The phase shifters 1016b may be substantially similar to the phase shifters 1016a and may apply various phase shifts (e.g., 45°, 90°, 180°, etc.) to the received signals [0076]).
Regarding claim 10, Wang discloses,
A phased array system (FIG. 10 is a block diagram illustrating an exemplary phased array system 1000), comprising:
transmit circuitry comprising a power amplifier (the system 1000 may include a transmitter 1040 and a plurality of power amplifiers (PAs) 1018, [0074]);
phase shift circuitry configured to shift a phase of a signal input to the power amplifier (The phase shifters 1016a may each be coupled to one of the DSAs 1014a and controlled to shift the phase of a corresponding signal by a certain phase-shift (e.g., 45°, 90°, 180°, etc.). In some aspects, each phase shifter 1016a may be a multi-bit phase shifter similar to the multi-phase shifter circuitry 900 discussed above with reference to FIG. 9 [0075]),
a switching network (The phase shifter circuitry 200 may utilize a switched transformer topology to provide two output phase states with a phase difference of about 180 degrees [0036]), the switching network comprising
a first switch (Fig. 3A; 214a) and a second switch (Fig. 3A; 224a)
However, Wang does not explicitly disclose, the switching network, comprising: a first switch configured to couple a processor to a first end of an inductor of the power amplifier; and a second switch configured to couple the processor to a second end of the inductor of the power amplifier.
In the same field of endeavor, Varonen discloses, the switching network, comprising: a first switch configured to couple a processor to a first end of an inductor of the power amplifier; and a second switch configured to couple the processor to a second end of the inductor of the power amplifier (The secondary windings 514, 519 are connected at one end to a first output port 533, 537 and at the other to a second output port 535, 539. Connected to each end of the secondary winding 514, 519 is a switch 520, 521, 524, 525 connected at one end to the secondary winding, Fig. 5 and Fig. 6 and Para. [0048]-[0052]; The transformer based switch of FIG. 5 and Fig. 6 would find use across a variety of PALNA applications).
Therefore, it would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify Wang by specifically providing the switching network is connected to the first and second end of the inductor of the low noise amplifier, as taught by Varonen for the purpose of providing a technique for improved linearity in a compact switch while also providing low-insertion loss, especially useful for PALNA systems [0002].
Regarding claim 18, Wang discloses,
A method (FIG. 11 is a flow diagram illustrating an exemplary method 1100 for performing phase-shifting [0080]), comprising:
receiving a first indication to send a first signal via a transmitter (In a transmit direction, the MIMO encoder 1002 may generate a plurality of data streams (e.g., about 2, 4, 8, 16 or more). The DAC 1004 may be coupled to the MIMO encoder and may convert the data streams into analog signals for transmission. The switch 1010 may switch between the transmitter 1040 and the receiver 1050. The multiplier 1012 may multiply (or mix) the transmit analog signals with a PLL signal generated by the PLL 1006 [0075]);
closing a first switch to couple processing circuitry and opening a second switch to decouple the processing circuitry apply a first phase shift to the first signal based on receiving the first indication (the method 1100 may further include closing a first switch coupled between the first node and the positively coupled transformer and opening a second switch coupled between the first node and the negatively coupled transformer to select, in response to the first control signal, the first signal path for transmitting the first signal at 1104. In some aspects, the first switch may correspond to the switch 214a or the switch 214b, and the second switch may correspond to the switch 224a or the switch 224b, [0085]-[0086]);
receiving a second indication to send a second signal via the transmitter (In a transmit direction, the MIMO encoder 1002 may generate a plurality of data streams (e.g., about 2, 4, 8, 16 or more). The DAC 1004 may be coupled to the MIMO encoder and may convert the data streams into analog signals for transmission. The switch 1010 may switch between the transmitter 1040 and the receiver 1050. The multiplier 1012 may multiply (or mix) the transmit analog signals with a PLL signal generated by the PLL 1006 [0075]);
closing the second switch to couple the processing circuitry and opening the first switch to decouple the processing circuitry to apply a second phase shift to the second signal based on receiving the second indication (the method 1100 may further include opening a first switch coupled between the first node and the positively coupled transformer and closing a second switch coupled between the first node and the negatively coupled transformer to select the second signal path for transmitting the second signal in response to the second control signal at 1108. In some aspects, the first switch may correspond to the switch 214a or the switch 214b, and the second switch may correspond to the switch 224a or the switch 224b, [0085]-[0086]); and
However, Wang does not explicitly disclose, the switching network is connected to the first and second end of the inductor of the power amplifier.
In the same field of endeavor, Varonen discloses, the switching network is connected to the first and second end of the inductor (The secondary windings 514, 519 are connected at one end to a first output port 533, 537 and at the other to a second output port 535, 539. Connected to each end of the secondary winding 514, 519 is a switch 520, 521, 524, 525 connected at one end to the secondary winding, Fig. 5 and Fig. 6 and Para. [0048]-[0052]) of the power amplifier (The transformer based switch of FIG. 5 and Fig. 6 would find use across a variety of PALNA applications).
Therefore, it would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify Wang by specifically providing the switching network is connected to the first and second end of the inductor of the power amplifier, as taught by Varonen for the purpose of providing a technique for improved linearity in a compact switch while also providing low-insertion loss, especially useful for PALNA systems [0002].
Regarding claim 19, the combination of Wang and Varonen discloses everything claimed as applied above (see claim 18), further Wang discloses,
closing a first shunt switch configured to create a short circuit at the second end of the inductor based on the first indication (As shown in FIG. 3A, the phase shifter circuitry 300 may further include shunt FETs 314a, 314b, 324a, and 324b shown as N5, N6, N7, and N8, respectively. The shunt FET 314a is arranged on a shunt path coupled to the first signal path 201, for example, at a node between the FET 214a and the positively coupled transformer 212. The shunt FET 314b is arranged on a shunt path coupled to the first signal path 201, for example, at a node between the positively coupled transformer 212 and the FET 214b [0047]-[0048]).
Regarding claim 20, the combination of Wang and Varonen discloses everything claimed as applied above (see claim 18), further Wang discloses,
closing a second shunt switch configured to create a short circuit at the first end of the inductor based on the second indication (As shown in FIG. 3A, the phase shifter circuitry 300 may further include shunt FETs 314a, 314b, 324a, and 324b shown as N5, N6, N7, and N8, respectively. The shunt FET 314a is arranged on a shunt path coupled to the first signal path 201, for example, at a node between the FET 214a and the positively coupled transformer 212. The shunt FET 314b is arranged on a shunt path coupled to the first signal path 201, for example, at a node between the positively coupled transformer 212 and the FET 214b [0047]-[0048]).
Claims 2, 9, 11, 16 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Wang, in view of Varonen, and further in view of WO 2020035634 (hereinafter “Varonen2).
Regarding claim 2, the combination of Wang and Varonen discloses everything claimed as applied above (see claim 1), however the combination Wang and Varonen does not disclose, wherein the switching network is coupled between the transformer and single-ended transmission lines.
In the same field of endeavor, Varonen2 discloses, wherein the switching network is coupled between the transformer and single-ended transmission lines (the differential transmission line based switch 100 comprises a first input port 131 conductively connected to: an input of a first transmission line 111 of a first circuit 101 and an input of a first transmission line 112 of a second circuit 102….. he first switch 122 of the second circuit 102 is conductively connected at one end to an output of the first transmission line 112 of the second circuit 102, the other end of the first switch 122 of the second circuit 102 being configured to be connected to a ground potential, Fig. 1 and [0012]).
Therefore, it would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the combination of Wang and Varonen wherein the switching network is coupled between the transformer and single-ended transmission lines, as taught by Varonen2 for the purpose of providing a transmission line based switch having a much greater linearity than traditional transistor based switches especially in the case of PALNA applications [0011].
Regarding claim 9, the combination of Wang and Varonen discloses everything claimed as applied above (see claim 1), however the combination Wang and Varonen does not disclose, wherein the switching network is disposed between a differential transmission line and processing circuitry.
In the same field of endeavor, Varonen2 discloses, wherein the switching network is disposed between a differential transmission line and processing circuitry (there is provided a differential transmission line based switch configured to be connected to a power amplifier (PA) and/or Low Noise Amplifier (LNA), said transmission line [0004]; FIGURE 2 shows a differential transmission lined based switch 200 according to certain embodiments of the present invention. In contrast to the embodiment of figure 1, the first 201 and second 202 circuits of the switch 200 of figure 2 each contain two transmission lines [0015]).
Therefore, it would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the combination of Wang and Varonen wherein the switching network is disposed between a differential transmission line and processing circuitry, as taught by Varonen2 for the purpose of providing a transmission line based switch having a much greater linearity than traditional transistor based switches especially in the case of PALNA applications [0011].
Regarding claim 11, the combination of Wang and Varonen discloses everything claimed as applied above (see claim 10), however the combination Wang and Varonen does not disclose, a differential transmission line configured to couple the switching network to a port of the power amplifier.
In the same field of endeavor, Varonen2 discloses, a differential transmission line configured to couple the switching network to a port of the power amplifier (there is provided a differential transmission line based switch configured to be connected to a power amplifier (PA) and/or Low Noise Amplifier (LNA), said transmission line [0004]; FIGURE 2 shows a differential transmission lined based switch 200 according to certain embodiments of the present invention. In contrast to the embodiment of figure 1, the first 201 and second 202 circuits of the switch 200 of figure 2 each contain two transmission lines [0015]).
Therefore, it would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the combination of Wang and Varonen a differential transmission line configured to couple the switching network to a port of the power amplifier, as taught by Varonen2 for the purpose of providing a transmission line based switch having a much greater linearity than traditional transistor based switches especially in the case of PALNA applications [0011].
Regarding claim 16, the combination of Wang and Varonen discloses everything claimed as applied above (see claim 10), however the combination Wang and Varonen does not disclose, a differential transmission line configured to couple the first shunt switch and the second shunt switch to the first switch and the second switch.
In the same field of endeavor, Varonen2 discloses, a differential transmission line configured to couple the first shunt switch and the second shunt switch to the first switch and the second switch (the differential transmission line based switch 100 comprises a first input port 131 conductively connected to: an input of a first transmission line 111 of a first circuit 101 and an input of a first transmission line 112 of a second circuit 102….. he first switch 122 of the second circuit 102 is conductively connected at one end to an output of the first transmission line 112 of the second circuit 102, the other end of the first switch 122 of the second circuit 102 being configured to be connected to a ground potential, Fig. 1 and [0012]).
Therefore, it would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the combination of Wang and Varonen a differential transmission line configured to couple the first shunt switch and the second shunt switch to the first switch and the second switch, as taught by Varonen2 for the purpose of providing a transmission line based switch having a much greater linearity than traditional transistor based switches especially in the case of PALNA applications [0011].
Regarding claim 17, the combination of Wang, Varonen and Varonen2 discloses everything claimed as applied above (see claim 16), in addition Varonen discloses, wherein the first shunt switch and the second shunt switch are coupled to a port of the power amplifier (Within the embodiment shown in FIG. 2A there is at least one positive port switch 220 connected at one end to a positive end of the secondary winding 214 of the transformer 210, the other end of the switch being configured to be connected to a ground potential. On the opposite side of the circuit there is at least one negative port switch 224 connected at one end to a negative end of the secondary winding 214 of the transformer 210, the other end of the switch being configured to be connected to a ground potential, Fig. 2 and [0026]-[0027]).
Claims 3 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Wang, in view of Varonen, and further in view of Yehezkely et al. (US 20150207536, hereinafter “Yehez”).
Regarding claim 3, the combination of Wang and Varonen discloses everything claimed as applied above (see claim 1), however the combination Wang and Varonen does not disclose, w an inductor coupled to the switching network to processing circuitry.
In the same field of endeavor, Yehezkely discloses, an inductor coupled to the switching network to processing circuitry. (FIG. 4 includes an input 402, an impedance circuit 404, a common node 406, a plurality of switches 408 (e.g., 4 switches 410-416) and a plurality of outputs 418 (e.g. 4 outputs 420-426), [0027]-[0029]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination of Wang and Varonen by specifically providing an inductor coupled to the switching network to processing circuitry, as taught by Yehez for the purpose of improving a signal-to-noise ratio of RF signals by reducing signal loss as compared to a static summing/distribution network that has "open" paths that introduce signal loss [0026].
Regarding claim 4, the combination of Wang, Veronen and Yehezkely discloses everything claimed as applied above (See claim 3), further Yehez discloses, wherein the other inductor comprises an inductance of 50 picohenries to 100 picohenries (the inductors 430-436 may be selected based on the switch capacitance and to match (or substantially match) the input impedance (e.g., of the impedance circuit 404, which includes the 100 picohenry (pH) inductor [0031]).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Wang, in view of Varonen, in view of Yehez and further in view of Srihari et al. (US 20160182037, hereinafter “Srihari”).
Regarding claim 5, the combination of Wang, Varonen and Yehez discloses everything claimed as applied above (see claim 3), however the combination Wang, Varonen and Yehez does not disclose, wherein the inductor is configured to absorb excess reactive power associated with the first switch and the second switch.
In the same field of endeavor, Srihari discloses, wherein the inductor is configured to absorb excess reactive power associated with the first switch and the second switch (the present invention circumvent the problem of leakage of the SPDT switch described above, thereby improving the isolation and reducing the insertion loss, when compared to the conventional SPDT switch. The resonant circuit in parallel to the FET resonates out the capacitance of the FET, resulting in higher isolation. Said differently, the capacitance of the FET is essentially cancelled out due to the configuration of the circuit [0016]-[0019]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination of Wang, Varonen and Yehez by specifically providing wherein the inductor is configured to absorb excess reactive power associated with the first switch and the second switch, as taught by Srihari for the purpose of providing a parallel resonant LC network across each of the series-shunt branch FETs in an RF circuit is provided for improved insertion loss, switch isolation, and out of band harmonics [0014].
Claims 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Wang, in view of Varonen, in view of Varonen2 and further in view of Yehez.
Regarding claim 12, the combination of Wang, Varonen and Varonen2 discloses everything claimed as applied above (see claim 11), however the combination Wang, Varonen and Varonen2 does not disclose, wherein the switching network is coupled to another inductor.
In the same field of endeavor, Yehezkely discloses, wherein the switching network is coupled to another inductor (FIG. 4 includes an input 402, an impedance circuit 404, a common node 406, a plurality of switches 408 (e.g., 4 switches 410-416) and a plurality of outputs 418 (e.g. 4 outputs 420-426), [0027]-[0029]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination of Wang, Varonen and Varonen2 by specifically providing wherein the switching network is coupled to another inductor, as taught by Yehez for the purpose of improving a signal-to-noise ratio of RF signals by reducing signal loss as compared to a static summing/distribution network that has "open" paths that introduce signal loss [0026].
Regarding claim 13, the combination of Wang, Veronen, Veronen2 and Yehez discloses everything claimed as applied above (See claim 5), further Yehez discloses, wherein the other inductor comprises an inductance of 50 picohenries to 100 picohenries (the inductors 430-436 may be selected based on the switch capacitance and to match (or substantially match) the input impedance (e.g., of the impedance circuit 404, which includes the 100 picohenry (pH) inductor [0031]).
Regarding claim 14, the combination of Wang, Veronen, Veronen2 and Yehez discloses everything claimed as applied above (See claim 12), further Wang discloses, wherein the switching network comprises a first shunt switch shunt FETs 314a; Fig. 3A) and a second shunt switch (shunt FETs 324a; Fig. 3A).
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Wang, in view of Varonen, in view of Varonen2, in view of Yehezand further in view of Feng et al. (US 20030090350, hereinafter “Feng”).
Regarding claim 15, the combination of Wang, Varonen, Varonen2 and Yehez discloses everything claimed as applied above (see claim 14), however the combination Wang, Varonen, Varonen2 and Yehez does not disclose, wherein the first shunt switch and the second shunt switch are disposed 100 micrometers to 250 micrometers from a port of the low noise amplifier.
In the same field of endeavor, Feng discloses, wherein the first shunt switch and the second shunt switch (A non-zero dielectric thickness corresponds to a capacitively coupled shunt switch, i.e., effectively a low-pass filter or an RF short [0027]) are disposed 100 micrometers to 250 micrometers from a port of the low noise amplifier (A width of the top electrodes 30 was chosen at 100 .mu.M and 150 .mu.m. Combined with the different coplanar waveguide structures, six different impedance sets are available [0037]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination of Wang, Varonen, Varonen2 and Yehez by specifically providing wherein the first shunt switch and the second shunt switch are disposed 100 micrometers to 250 micrometers from a port of the low noise amplifier, as taught by Feng for the purpose providing an improved microelectromechanical switch for RF communication device [0040].
Prior Art of the Record:
The prior art made of record not relied upon and considered pertinent to
Applicant’s disclosure:
US 12009564: A phased array element includes a transmit portion having a plurality of amplifier paths, each amplifier path having a driver amplifier and a power amplifier, a first transformer coupled to the power amplifier of a first amplifier path of the plurality of amplifier paths and a second transformer coupled to the power amplifier of a second amplifier path of the plurality of amplifier paths, a secondary winding of each of the first transformer and the second transformer coupled together by a common transformer segment.
US 11546010: One example includes a switch system. The system includes a first signal port and a second signal port. The system also includes a first switching path arranged between the first and second signal ports. The first switching path includes at least one first switch and at least one of the at least one first switch being configured as a high-speed switching device. The system further includes a second switching path arranged between the first and second signal ports in parallel with the first switching path.
US 11349503: An apparatus is disclosed for phase-shifting signals with a compensation circuit. In example implementations, an apparatus for phase-shifting signals includes a phase shifter having a first port and a second port. The phase shifter also includes a signal phase generator, a compensation circuit, and a vector modulator. The compensation circuit includes a first capacitor with a first capacitance and a second capacitor with a second capacitance. The first capacitance is different from the second capacitance.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GOLAM SOROWAR whose telephone number is (571)270-3761. The examiner can normally be reached Mon-Fri: 8:30AM-5PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Charles Appiah can be reached at (571) 272-7904. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/GOLAM SOROWAR/ Primary Examiner, Art Unit 2641
Prosecution Insights