DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Yoon et al (US 11,263,529) in view of Kadav et al (US Pub. 2018/0336468).
With respect to claim 1, Yoon discloses A method comprising: obtaining neural network model information in accordance with received input information, the received input information corresponding to a platform; determining, by the one or more processors using the input information, constraints associated with adapting a neural network to the platform, the neural network generated from the neural network model information; executing, by the one or more processors, a satisfiability solver on the constraints to generate a candidate configuration for the neural network; and responsive to determining that the candidate configuration is valid, updating, by the one or more processors, the constraints
However, Yoon fails to explicitly disclose, updating, by the one or more processors, the constraints by negating the candidate configuration to adapt the neural network to the platform, (emphasis added), as claimed.
Kadav teaches updating, by the one or more processors, the constraints by negating the candidate configuration to adapt the neural network to the platform, (emphasis added, see paragraph 0005, wherein … The CNN is retrained upon pruning [pruning is read as “negating”] the removed filters to generate a pruned CNN having fewer convolutional layers to efficiently recognize and predict conditions in an environment being surveilled), as claimed.
It would have been obvious to one ordinary skilled in the art at the effective date of invention to combine the two references as they are analogous because they are solving similar problem of modifying the neural networks. Teaching of Kadav to negate the unwanted layers of the CNN in order to attain a new CNN can be incorporated into Yoon’s system as suggested in col. 1, lines 51-52, wherein …An updated machine learning model can be generated based on the data of the machine learning model…, for suggestion, and modifying the system yields a efficient CNN by pruning (see Kadav paragraph 0002), for motivation.
With respect to claim 2, combination of Yoon and Kadav further discloses wherein the neural network comprises a plurality of decision points that are associated with at least one of a layout of the neural network, of numerical precision, algorithm selection, data padding, accelerator use, or stride, (see Yoon col. 1, lines 19-22, wherein …neural network can be represented as a graph with nodes [nodes read as decision points] and edges. A node can represent an operation that can have zero or more inputs and zero or more outputs…), as claimed.
With respect to claim 3, combination of Yoon and Kadav further discloses wherein the platform is at least one of a software platform or a hardware platform, (see Yoon col. 1, lines 9-11, wherein …Neural networks are machine learning models [neural networks is read as hardware software combination] that employ one or more layers of models to generate an output, e.g., a classification, for a received input…), as claimed.
With respect to claim 4, combination of Yoon and Kadav further discloses identifying, by the one or more processors, a plurality of configuration variables associated with the candidate configuration, each variable in the plurality of variables including a value; determining, by the one or more processors, that the value of each configuration variable satisfies the constraints and one or more performance metrics; and determining, by the one or more processors, that the candidate configuration is valid, in response to the value of each configuration variable satisfying the constraints and one or more performance metrics, (see Yoon col. 4, lines 14-27, wherein …Machine learning models, such as neural networks, can be highly compute intensive with key kernel operations such as matrix multiplication and convolution. In addition, neural networks are evolving to be deeper and more complex. To meet this ever increasing demand, new accelerators (e.g., machine learning processors) with dense compute units (e.g., processor cores) are being introduced. Low memory bandwidth can limit the performance of the compute units e.g., by having idle compute units waiting for data from memory. The hardware-software techniques for improving locality in neural network execution described herein can increase memory access speeds, thereby increasing the speed at which the compute units perform machine learning computations), as claimed.
With respect to claim 5, combination of Yoon and Kadav further discloses determining, by the one or more processors, that the candidate configuration is invalid, in response to the value of each configuration variable not satisfying the constraints and one or more performance metrics, (see Yoon col. 4, lines 14-27, wherein …The hardware-software techniques for improving locality in neural network execution described herein can increase memory access speeds, thereby increasing the speed at which the compute units perform machine learning computations), as claimed.
With respect to claim 6, combination of Yoon and Kadav further discloses wherein executing the satisfiability solver further comprises: feeding, by the one or more processors, the constraints to the satisfiability solver; analyzing, by the one or more processor using the satisfiability solver, a plurality of variables based on a layout of the neural network; and outputting, by the one or more processors using the satisfiability solver, the candidate configuration according to the analyzed plurality of variables and the constraints, (see Yoon col. 2, lines 5-18 and col. 2, lines 29-34), as claimed.
With respect to claims 7 and 8, combination of Yoon and Kadav further discloses executing, by the one or more processors, the satisfiability solver on the updated constraints to generate a second candidate configuration for the neural network; and updating, by the one or more processors, the constraints by negating the second candidate configuration to adapt the neural network to the platform, responsive to determining that the second candidate configuration is valid; and selecting, by the one or more processors, an output candidate configuration based on analyzing the candidate configuration and the second candidate configuration, wherein input data is provided to the candidate configuration and the second candidate configuration, and wherein the output candidate configuration is selected based on performance metrics associated with the candidate configuration and the second candidate configuration, (see Yoon col. 2, lines 4-18; and Kadav paragraph 0005), as claimed.
With respect to claim 9, combination of Yoon and Kadav further discloses presenting, by the one or more processors via a user interface, a dashboard to display the candidate configuration; and in response to a user input associated with updating the determined constraints, triggering, the satisfiability solver to determine an updated candidate configuration based on the user input, (see Yoon figure 1, numerical 110, user device and col. 4, lines 33-41), as claimed.
With respect to claim 10, combination of Yoon and Kadav further discloses wherein the neural network is a directed graph, wherein each node of the neural network corresponds to a layer and each edge connecting each node corresponds to a tensor, (see Yoon col. 1, lines 60-65), as claimed.
Claims 11-20 are rejected for the same reasons as set forth in the rejections for claims 1-10, because claims 11-20 are claiming subject matter of similar scope as claimed in claims 1-10.
Conclusion
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/VIKKRAM BALI/Primary Examiner, Art Unit 2663
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