DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on September 17, 2024 has been considered. The submission is in compliance with the provisions of 37 CFR 1.97. Form PTO-1449 is signed and attached hereto.
Drawings
The drawings filed on September 17, 2024 are accepted.
Specification
The specification filed September 17, 2024 is accepted.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. The claims do not fall within at least one of the four categories of patent eligible subject matter because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
The analysis is guided by the Supreme Court’s two-step framework, described in Mayo and Alice (Alice Corp. Pty Ltd. V. CLS Bank Int’l, 134 S. Ct. 2347, 2354 (2014) and Mayo Collaborative Servs. V. Prometheus Labs, Inc., 132 S. Ct. 1289, 1296-97 (2012)).
Step 1: Are the claims directed to a process, machine, manufacture, or composition of matter?
Answer: Yes, claims 1-11 are directed to a system/device and Claims 12-20 are directed to a method.
Step 2A: Are the claims directed to a law of nature, a natural phenomenon, or an abstract idea, i.e., judicially recognized exceptions (both individually and as an ordered combination)?
Answer: Yes, claims 1 and 12 are directed to the concept of transforming a byte of data from one representation of Galois Field (GF) to another and representing a Galois Field (GF) (i.e., Collection, storage and recognition of data (Smart System) and/or collecting and analyzing information to detect misuse and notifying user when misuse is detected (FairWarning) and/or Collecting, transmitting, analyzing & storing data to detect fraudulent and/or invalid clicks based on the time between two requests by the same device or client (Zuili v. Google) ), and is/are an abstract idea beyond the scope of § 101.
Step2B: Do the claims recite additional elements that when analyzed individually and in ordered combinations amount to significantly more than the judicial exception(s)?
Answer: No, the claims (both individually and as an ordered combinations) do not transform the nature of the claims into a patent-eligible application of the abstract idea. Claims 1 and 12 do not have any additional limitations outside of the abstract limitations of step 2A. Dependent claims 2-11 and 13-20 further clarify the abstract idea.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Schepers et al. [WO 2018/015325 A1] (hereinafter Schepers).
As pe claim 1, Schepers teaches a semiconductor intellectual property (IP) core comprising a transformation engine accessing different transformation matrices and transforming a byte of data within a block of a block cipher and a cryptographic key from one representation of a Galois Field (GF) to another representation of the GF [page 7, line 22-page 8, line 25].
As per claim 12, Schepers teaches method of building different representations of a Galois Field (GF) implemented by a compact logic comprising: representing a GF(2.sup.8) as an equivalent tower field [page 7, line 22-page 8, line 25].
As per claim 2, Schepers further teaches the IP core wherein said transformation engine accesses a different transformation matrix for each successive round of the block cipher [page 7, line 22-page 8, line 25].
As per claim 3, Schepers further teaches the IP core wherein said transformation engine applies 1 of at least 10 different transformation matrices for each successive round [page 7, line 22-page 8, line 25].
As per claim 4, Schepers further teaches the IP core wherein said transformation engine applies 1 of at least 20 different transformation matrices for each successive round [page 7, line 22-page 8, line 25].
As per claim 5, Schepers further teaches the IP core wherein said transformation engine applies 1 of at least 30 different transformation matrices for each successive round [page 7, line 22-page 8, line 25].
As per claim 6, Schepers further teaches the IP core provided as an application-specific integrated circuit (ASIC) design [page 7, line 22-page 8, line 25].
As per claim 7, Schepers further teaches the IP core provided as a field-programmable gate array (FPGA) logic designs [page 7, line 22-page 8, line 25].
As per claim 8, Schepers further teaches the IP core wherein said block cipher is selected from the group consisting of AES, SM4, and ARIA [page 7, line 22-page 8, line 25].
As per claim 9, Schepers further teaches the IP core wherein said transformation engine computes X.sup.Y by performing a series of: (i) multiplications of two different elements of the GF and (ii) raising an element of the field to a power Z wherein Z is a power of 2, wherein a number of multiplications (i) is at least two less than a number of ones (1s) in a binary representation of Y [page 7, line 22-page 8, line 25].
As per claim 10, Schepers further teaches the IP core wherein Y=254 [page 7, line 22-page 8, line 25].
As per claim 11, Schepers further teaches the IP core wherein a number of multiplications (i) is 4 or less [page 7, line 22-page 8, line 25].
As per claim 13, Schepers further teaches the method wherein said equivalent tower field is GF(((2.sup.2).sup.2).sup.2) [page 7, line 22-page 8, line 25].
As per claim 14, Schepers further teaches the method, wherein said equivalent tower field is GF((2.sup.4).sup.2) [page 7, line 22-page 8, line 25].
As per claim 15, Schepers further teaches the method wherein said equivalent tower field is represented in a polynomial basis [page 7, line 22-page 8, line 25].
As per claim 16, Schepers further teaches the method wherein said equivalent tower field is represented in a normal basis [page 7, line 22-page 8, line 25].
As per claim 17, Schepers further teaches the method which yields at least 432 different representations of said GF [page 7, line 22-page 8, line 25].
As per claim 18, Schepers further teaches the method comprising computing X.sup.Y by performing a series of: (i) multiplications of two different elements of the field; and (ii) raising an element of the field to a power Z wherein Z is a power of 2, wherein a number of the multiplications (i) is at least two less than a number of ones (1s) in the binary representation of Y [page 7, line 22-page 8, line 25].
As per claim 19, Schepers further teaches the method wherein Y=254 [page 7, line 22-page 8, line 25].
As per claim 20, Schepers further teaches the method wherein a number of multiplications (i) is 4 or less [page 7, line 22-page 8, line 25].
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BEEMNET W DADA whose telephone number is (571)272-3847. The examiner can normally be reached Monday-Friday, 9am-5pm.
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BEEMNET W. DADA
Primary Examiner
Art Unit 2435
/BEEMNET W DADA/Primary Examiner, Art Unit 2435