DETAILED ACTION
1. This action is in response to the amendment filed on 7/15/26.
Notice of Pre-AIA or AIA Status
2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
4. Claims 15-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shenoy et al. (US 20150207400).
Regarding claim 15: Shenoy et al. disclose (i.e. figures 1-2) a method comprising:
receiving a first temperature value (i.e. value of 26-1) indicating a temperature of a first power converter (i.e. 4-1), the first power converter supplying first current (i.e. I-1) to a load (i.e. load at Vout);
receiving a second temperature value (i.e. value of 26-2) indicating a temperature of a second power converter (i.e. 4-2), the second power converter supplying second current (i.e. I-2) to the load (i.e. load at Vout); and
adjusting a magnitude of the first current (i.e. I-1) based on a comparison of the first temperature value (i.e. value of 26-1) and the second temperature value (i.e. value of 26-2): and
wherein the adjusted magnitude of the first current (i.e. I-1) increases a difference (i.e. figure 4: see the different between output current signals I-1 and I-2, where the magnitude of current I-1 is adjusted) between the magnitude of the first current (i.e. I-1) and a magnitude of the second current (i.e. I-2) (i.e. ¶ 32-34 and 37-39).
Regarding claim 16: (i.e. figures 1-2) wherein the comparison of the first temperature value (i.e. value of 26-1) and the second temperature value (i.e. value of 26-2) indicates that the first power converter (i.e. 4-1) is lower in temperature than the second power converter (i.e. 4-2) (i.e. ¶ 32-34 and 37-39).
Regarding claim 17: (i.e. figures 1-2) wherein adjusting the magnitude of the first current (i.e. I-1) includes increasing the magnitude of the first current (i.e. see figure 4: I-1) in response to detecting that the first temperature value (i.e. value of 26-1) is less than the second temperature value (i.e. 4-2) based on the comparison (i.e. ¶ 32-34 and 37-39).
Claim Rejections - 35 USC § 103
5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
6. Claims 1, 6, 10-11, 20-22, 24-26 are rejected under 35 U.S.C. 103 as being unpatentable over Shenoy et al. (US 20150207400) in view of Lin (US 20250062694).
Regarding claim 1: Shenoy et al. disclose an apparatus (i.e. figures 1-2) comprising:
a first power converter (i.e. 4-1 and circuitry of controller 16 that drive DC-DC 4-1) operative to:
receive a first temperature value (i.e. value of 26-1) indicating a temperature (i.e. 26-1) of the first power converter (i.e. 4-1 and circuitry of controller 16 that drive DC-DC 4-1), the first power converter (i.e. 4-1 and circuitry of controller 16 that drive DC-DC 4-1) supplying first current (i.e. I-1) to a load (i.e. load at Vout);
receive a second temperature value (i.e. value of 26-2) indicating a temperature (i.e. 26-2) of a second power converter (i.e. 4-2 and circuitry of controller 16 that drive DC-DC 4-2), the second power converter (i.e. 4-2 and circuitry of controller 16 that drive DC-DC 4-2) supplying second current (i.e. I-2) to the load (i.e. load at Vout);
compare the first temperature value (i.e. value of 26-1) and the second temperature value (i.e. value of 26-2);
modify a magnitude of the first current (i.e. I-1) based on a comparison of the first temperature value (i.e. value of 26-1) and the second temperature value (i.e. 26-2) (i.e. ¶ 32-34, 37-39).
the comparison indicating that the first power converter (i.e. 4-1 and circuitry of controller 16 that drive DC-DC 4-1) is lower in temperature than the second power converter (i.e. 4-2 and circuitry of controller 16 that drive DC-DC 4-2) (¶ 32-34, 37-39),
but does not specifically disclose the first current modified via adjustment of a timing of an edge of a first pulse width modulation control signal to produce a second pulse width modulation control signal, the second pulse width modulation control signal operative to control the first power converter and the magnitude of the first current.
Lin discloses a voltage regulator (i.e. figures 2-4) comprising the first current (i.e. output current of 222) modified via adjustment of a timing of an edge (i.e. edge of T1) of a first pulse width modulation control signal (i.e. SPWM) to produce a second pulse width modulation control signal (i.e. SADJ), the second pulse width modulation control signal (i.e. SADJ) operative to control the first power converter (i.e. 222) and the magnitude of the first current (i.e. magnitude of the output current from 22) (i.e. ¶32-35).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shenoy et al.’s invention with the regulator as disclose by Lin, because in situation where each phase includes multiple power circuits coupled in parallel, the temperature of the different power circuits in the same phase can be adjusted by controlling the PWM control signal.
Regarding claim 6: Shenoy et al. disclose (i.e. figures 1-2) wherein the first power converter (i.e. 4-1 and circuitry of controller 16 that drive DC-DC 4-1) is operative to discontinue increasing the magnitude of the first current (i.e. I-1) in response to detecting that the first temperature value (i.e. value of 26-1) is within a threshold level of the second temperature value (i.e. value of 26-2) ¶ 32-34, 37-39).
Regarding claim 10: Shenoy et al. disclose (i.e. figures 1-2) an apparatus comprising:
a first power converter (i.e. 4-1 and circuitry of controller 16 that drive DC-DC 4-1) operative to:
receive a control signal (i.e. to and/or from 24) supplied to each of multiple power converters (i.e. circuitry of 16 the drive DC-DC 4-1 to 4-4) including the first power converter (i.e. 4-1 and circuitry of controller 16 that drive DC-DC 4-1) and a second power converter (i.e. 4-2 and circuitry of controller 16 that drive DC-DC 4-2);
receive temperature information (i.e. 26-1, 26-2) associated with the first power converter (i.e. 4-1 and circuitry of controller 16 that drive DC-DC 4-1) and the second power converter (i.e. 4-2 and circuitry of controller 16 that drive DC-DC 4-2) (i.e. ¶ 24) ¶ 32-34, 37-39),
but does not specifically disclose adjust at least one edge of the received control signal based on the received temperature information to produce an adjusted control signal; and via the adjusted control signal, control the first power converter and corresponding first current outputted from the first power converter to a load.
Lin discloses a voltage regulator (i.e. figures 2-4) comprising adjust at least one edge of the received control signal (i.e. edge of SPWM) based on the received temperature information (i.e. from Vtemp) to produce an adjusted control signal (i.e. SADJ); and via the adjusted control signal (i.e. SADJ), control the first power converter (i.e. 222) and corresponding first current outputted (i.e. output current to load) from the first power converter (i.e. 222) to a load (i.e. load) (i.e. ¶32-35).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shenoy et al.’s invention with the regulator as disclose by Lin, because in situation where each phase includes multiple power circuits coupled in parallel, the temperature of the different power circuits in the same phase can be adjusted by controlling the PWM control signal.
Regarding claim 11: Shenoy et al. disclose (i.e. figures 1-2) wherein the temperature information includes a first temperature value (i.e. value of 26-1) and a second temperature value (i.e. value of 26-2); wherein the first temperature value (i.e. value of 26-1) indicates a temperature of the first power converter (i.e. 4-1 and circuitry of controller 16 that drive DC-DC 4-1); and wherein the second temperature value (i.e. value of 26-2) indicates a temperature of the second power converter (i.e. 4-2 and circuitry of controller 16 that drive DC-DC 4-2) ¶ 32-34, 37-39).
Regarding claim 21: Shenoy et al. discloses the limitation of the claim(s) as discussed above, but does not specifically disclose the edge of the first pulse width modulation control signal is a leading edge of the first pulse width modulation control signal.
Lin discloses a voltage regulator (i.e. figures 2-4) comprising the edge of the first pulse width modulation control signal (i.e. SPWM) is a leading edge of the first pulse width modulation control signal (i.e. leading edge of SPWM) (i.e. ¶32-35).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shenoy et al.’s invention with the regulator as disclose by Lin, because in situation where each phase includes multiple power circuits coupled in parallel, the temperature of the different power circuits in the same phase can be adjusted by controlling the PWM control signal.
Regarding claim 22: Shenoy et al. discloses the limitation of the claim(s) as discussed above, but does not specifically disclose the first power converter is further operative to modify a trailing edge of the first pulse width modulation control signal to produce the second pulse width modulation control signal.
Lin discloses a voltage regulator (i.e. figures 2-4) comprising the first power converter is further operative to modify a trailing edge of the first pulse width modulation control signal (i.e. trailing edge of SPWM) to produce the second pulse width modulation control signal (i.e. the modified trailing edge of SADJ) (i.e. ¶32-35).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shenoy et al.’s invention with the regulator as disclose by Lin, because in situation where each phase includes multiple power circuits coupled in parallel, the temperature of the different power circuits in the same phase can be adjusted by controlling the PWM control signal.
Regarding claim 26: Shenoy et al. discloses the limitation of the claim(s) as discussed above, but does not specifically disclose the adjusted control signal has a different duty cycle than a duty cycle of the received control signal.
Lin discloses a voltage regulator (i.e. figures 2-4) comprising the adjusted control signal (i.e. duty cycle of SADJ) has a different duty cycle than a duty cycle of the received control signal (i.e. duty cycle of SPWM) (i.e. ¶32-35).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shenoy et al.’s invention with the regulator as disclose by Lin, because in situation where each phase includes multiple power circuits coupled in parallel, the temperature of the different power circuits in the same phase can be adjusted by controlling the PWM control signal.
Regarding claim 20 and 24-25: the method steps will be met during the normal operation of the apparatus described above. (Examiner notes: For method claims, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device will inherently perform the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed. Cir. 1986). Therefore, the previous rejections based on the apparatus will not be repeated).
7. Claims 3-5 are rejected under 35 U.S.C. 103 as being unpatentable over Shenoy et al. (US 20150207400) in view of Lin (US 20250062694) and further in view of Dsouza et al. (US 20250158526).
Regarding claim 3: Shenoy et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the first pulse width modulation control signal is received by both the first power converter and the second power converter to control the first current and the second current; and wherein the first power converter is further operative to: adjust the timing of the edge of the first pulse width modulation control signal in response to the first temperature value being less than the second temperature value.
Dsouza et al. disclose a power converter (i.e. figure 3A and 5) comprising the first pulse width modulation control signal (i.e. 216) is received by both the first power converter (i.e. 310) and the second power converter (i.e. 320) to control the first current and the second current (i.e. output of current of 310, 320)
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shenoy et al.’s invention with the converter as disclose by Dsouza et al. for achieving current balancing.
Lin discloses a voltage regulator (i.e. figures 2-4) comprising wherein the first power converter (i.e. 222) is further operative to: adjust the timing of the edge of the first pulse width modulation control signal (i.e. figure 4: SPWM to SADJ) in response to the first temperature (i.e. temperature of 222) value being less than the second temperature value (i.e. temperature of 224) (i.e. ¶32-35).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shenoy et al.’s invention with the regulator as disclose by Lin, because in situation where each phase includes multiple power circuits coupled in parallel, the temperature of the different power circuits in the same phase can be adjusted by controlling the PWM control signal.
Regarding claim 4: Lin discloses the limitation of the claim(s) as discussed above, but does not specifically disclose the edge is a trailing edge of the first pulse width modulation control signal.
Lin discloses a voltage regulator (i.e. figures 2-4) comprising the edge is a trailing edge of the first pulse width modulation control signal (i.e. trailing edge of pulse SADJ) (i.e. ¶32-35).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shenoy et al.’s invention with the regulator as disclose by Lin, because in situation where each phase includes multiple power circuits coupled in parallel, the temperature of the different power circuits in the same phase can be adjusted by controlling the PWM control signal.
Regarding claim 5: Lin discloses the limitation of the claim(s) as discussed above, but does not specifically disclose the first pulse width modulation control signal is received by the first power converter; and wherein the adjustment of the timing of the edge of the first pulse width modulation control signal is operative to modify a duty cycle of the first pulse width modulation signal.
Lin discloses a voltage regulator (i.e. figures 2-4) comprising the first pulse width modulation control signal (i.e. SPWM) is received by the first power converter (i.e. 222); and wherein the adjustment of the timing of the edge of the first pulse width modulation control signal (i.e. timing edge of SPWM to the adjusted pulse SADJ) is operative to modify a duty cycle of the first pulse width modulation signal (i.e. signal SADJ) (i.e. ¶32-35).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shenoy et al.’s invention with the regulator as disclose by Lin, because in situation where each phase includes multiple power circuits coupled in parallel, the temperature of the different power circuits in the same phase can be adjusted by controlling the PWM control signal.
8. Claims 7-9 are rejected under 35 U.S.C. 103 as being unpatentable over Shenoy et al. (US 20150207400) in view of Lin (US 20250062694) and further in view of Pearce (US 20040146101).
Regarding claim 7: Shenoy et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the first power converter is operative to adjust the magnitude of the first current via selection of a delay signal from a tapped delay line to control a respective timing of an edge of a first control signal controlling the magnitude of the first current.
Pearce disclose a PWM pulse signal that is compatible with multiphase DC-DC converters comprising the first power converter (i.e. figure 1) is operative to adjust the magnitude of the first current (i.e. current to load) via selection of a delay signal from a tapped delay line (i.e. figures 2 or 4) to control a respective timing of an edge of a first control signal (i.e. signal of figures 2 or 4) controlling the magnitude of the first current (i.e. current to load) (i.e. Abstract and ¶ 13-15).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shenoy et al.’s invention with the controller as disclose by Pearce to provide a high precision fractional adjustment of the duty-cycle of the Integer PWM Pulse that is effectively independent of processing variations and operational parameters such as temperature and supply voltage.
Regarding claim 8: Shenoy et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the first power converter is operative to adjust the magnitude of the first current via implementation of a first current starved inverter circuit; wherein the edge is a trailing edge; and wherein the first current starved inverter circuit is operative to adjust timing of the trailing edge of the first pulse width modulation control signal to produce the second pulse width modulation control signal.
Pearce discloses a PWM pulse signal that is compatible with multiphase DC-DC converters comprising
the first power converter (i.e. figure 1) is operative to adjust the magnitude of the first current (i.e. current to load) via implementation of a first current starved inverter circuit (i.e. circuit of figure 2 or 4); wherein the edge is a trailing edge (i.e. trailing edge of pulse signal to 400-1); and wherein the first current starved inverter circuit (i.e. circuit of figures 2 or 4) is operative to adjust timing of the trailing edge (i.e. trailing edge of pulse signal to 400-1) of the first pulse width modulation control signal (i.e. signal to 400-1) to produce the second pulse width modulation control signal (i.e. signal to 4310) (i.e. Abstract and ¶ 13-15).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shenoy et al.’s invention with the controller as disclose by Pearce to provide a high precision fractional adjustment of the duty-cycle of the Integer PWM Pulse that is effectively independent of processing variations and operational parameters such as temperature and supply voltage.
Regarding claim 9: Shenoy et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose wherein the edge of the first pulse width modulation control signal is a trailing edge; the first power converter is operative to: via a continuous delay element circuit, convert the first pulse width modulation control signal into the second pulse width modulation control signal, the current continuous delay element circuit operative to control timing of the trailing edge of the second control signal.
Pearce discloses a PWM pulse signal that is compatible with multiphase DC-DC converters comprising wherein the edge of the first pulse width modulation control signal is a trailing edge (i.e. trailing edge of pulse signal to 400-1); the first power converter (i.e. figure 1) is operative to: via a continuous delay element circuit (i.e. delay of figure 2 or 4), convert the first pulse width modulation control signal (i.e. signal to 400-1) into the second pulse width modulation control signal (i.e. signal to 4310), the current continuous delay element circuit (i.e. delay of figure 2 or 4) operative to control timing of the trailing edge of the second control signal (i.e. signal to 4310) (i.e. Abstract and ¶ 13-15).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shenoy et al.’s invention with the controller as disclose by Pearce to provide a high precision fractional adjustment of the duty-cycle of the Integer PWM Pulse that is effectively independent of processing variations and operational parameters such as temperature and supply voltage.
9. Claim 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Shenoy et al. (US 20150207400) in view of Lin (US 20250062694) and further in view of Dsouza et al. (US 20250158526).
Regarding claim 12: Shenoy et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the control signal is a pulse width modulation control signal supplied to both the first power converter and the second power converter.
Dsouza et al. disclose a power converter (i.e. figure 3A and 5) comprising the control signal is a pulse width modulation control signal (i.e. 216) supplied to both the first power converter (i.e. 310) and the second power converter (i.e. 320).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shenoy et al.’s invention with the converter as disclose by Dsouza et al. for achieving current balancing.
Regarding claim 13: Shenoy et al. discloses the limitation of the claim(s) as discussed above, but does not specifically disclose the adjustment of the at least one edge of the received control signal is operative to adjust a duty cycle of the received control signal to produce the adjusted control signal, the duty cycle adjusted to produce the adjust the control signal in response to a condition in which the second temperature value is detected as being greater than the first temperature value.
Lin discloses a voltage regulator (i.e. figures 2-4) comprising the adjustment of the at least one edge of the received control signal (i.e. edge of SPMW) is operative to adjust a duty cycle (i.e. duty cycle of SPWM) of the received control signal (i.e. edge of SPWM) to produce the adjusted control signal (i.e. SADJ), the duty cycle adjusted to produce the adjust the control signal (i.e. duty cycle of SADJ) in response to a condition in which the second temperature value is detected as being greater than the first temperature value (i.e. by comparing temperature of first and second converter) (i.e. ¶32-35).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Shenoy et al.’s invention with the regulator as disclose by Lin, because in situation where each phase includes multiple power circuits coupled in parallel, the temperature of the different power circuits in the same phase can be adjusted by controlling the PWM control signal.
Allowable Subject Matter
10. Claims 14, 18-19, and 23 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Previously, the allowable subject matter of claims 3-5, 13 and 20 have been withdrawn, because the scope of the claims has been changed.
Response to Arguments
11. Applicant’s arguments with respect to claim(s) 1 and 10 have been considered but are moot because the new ground of rejection in view of newly found prior art.
12. Applicant’s arguments filed 7/15/26 have been fully considered but they are not persuasive.
With regard to claim 15, Applicant argues that “in contrast to the cited prior, the claimed invention recites, inter alia, adjusting a magnitude of the first current based on a comparison of the first temperature value and the second temperature value; and wherein the adjusted magnitude of the first current increases a difference between the magnitude of the first current and a magnitude of the second current.”
The Examiner disagrees, because Shenoy et al. disclose (i.e. equivalent shows in parentheses) adjusting a magnitude of the first current (i.e. I-1) based on a comparison of the first temperature value (i.e. value of 26-1) and the second temperature value (i.e. value of 26-2): and
wherein the adjusted magnitude of the first current (i.e. I-1) increases a difference (i.e. figure 4: see the different between output current signals I-1 and I-2, where the magnitude of current I-1 is adjusted) between the magnitude of the first current (i.e. I-1) and a magnitude of the second current (i.e. I-2) (i.e. ¶ 32-34 and 37-39).
Conclusion
13. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
14. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NGUYEN TRAN whose telephone number is (571)270-1269. The examiner can normally be reached Flex: M-F 8-7.
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/Nguyen Tran/Primary Examiner, Art Unit 2838
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