CTNF 18/888,108 CTNF 80866 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claim 14 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 14 The claim is inappropriately narrative and attempts to narratively define the apparatus claim. More particularly, the claim recites the desired operation of how the switch is controlled/operated without any structure of what is controlling/operating said switch “that switches whether the gate of the first switching transistor and the gate of the second switching transistor are connected with or cut off from an output node of the electromotive force generation circuit”. The claim will be examined as best understood. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1-8, and 12-17 and is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Tsunetsugu US 2024/0113706 . Tsunetsugu teaches: 1. A semiconductor switch comprising: an electromotive force generation circuit (photodiode array 16, 18, FIG2) that generates an electromotive force by receiving light; a first switching transistor (26a) that is connected between a first output terminal (10c) and a reference voltage node (reference node of 24) and drives a load when the electromotive force is generated; a second switching transistor (26b) that is connected between a second output terminal (10d) and the reference voltage node (node of 34) and drives the load when the electromotive force is generated; and a protection circuit (34 including none, some or all of 20, 22, 38) that protects the first switching transistor and the second switching transistor from overcurrent and overheating using the electromotive force as a power supply voltage (see Specification @ [0056]). 2. The semiconductor switch according to claim 1, further comprising: a first overcurrent detection circuit (via 32a, see [0056]) that outputs a first overcurrent detection signal corresponding to a current flowing between a drain and a source of the first switching transistor; and a second overcurrent detection circuit that outputs a second overcurrent detection signal (via 32b, [0056]) corresponding to a current flowing between a drain and a source of the second switching transistor, wherein the protection circuit determines whether to turn off the first switching transistor and the second switching transistor based on signal levels of the first overcurrent detection signal and the second overcurrent detection signal ([0056]). 3. The semiconductor switch according to claim 2, wherein the first overcurrent detection circuit includes a first resistor (resistor 32a) connected between a body and the source of the first switching transistor, and outputs the first overcurrent detection signal having a signal level corresponding to a voltage across both ends of the first resistor, and the second overcurrent detection circuit includes a second resistor (32b) connected between a body and the source of the second switching transistor, and outputs the second overcurrent detection signal having a signal level corresponding to a voltage across both ends of the second resistor. 4. The semiconductor switch according to claim 2, wherein the protection circuit includes an overcurrent determination circuit, and the overcurrent determination circuit includes a first comparator that compares the signal level of the first overcurrent detection signal with a predetermined first reference voltage, and a second comparator that compares the signal level of the second overcurrent detection signal with the first reference voltage (first and second comparators of overcurrent protection circuit 34b (not shown), see [0040]). 5. The semiconductor switch according to claim 4, further comprising: a first wiring connected to an output node of the first comparator; and a second wiring connected to an output node of the second comparator, wherein a connection node between the first wiring and the second wiring generates an overcurrent detection signal generated by wired-OR of an output signal of the first comparator and an output signal of the second comparator (see [0040-0042] noting “OR” gate of [0040]). 6. The semiconductor switch according to claim 4, wherein the protection circuit includes an overheat detection circuit, and the overheat detection circuit includes a diode (see diode (not shown) and [0039]) for overheat detection, and a third comparator (see comparator [0039] that “compares a forward voltage of the diode with a reference voltage corresponding to the set temperature) that compares a forward voltage of the diode with a second reference voltage. 7. The semiconductor switch according to claim 6, wherein the protection circuit includes a minute current source (read on by current source 22, FIG2) that generates a minute current using the electromotive force as a power supply voltage, and each of the first comparator, the second comparator, and the third comparator is supplied with a minute current from the minute current source (see FIG2 noting connection of 22). 8. The semiconductor switch according to claim 6, wherein the protection circuit includes a protection control circuit (36) that forcibly turns off the first switching transistor and the second switching transistor when at least one of overcurrent and overheating is detected in the first comparator, the second comparator, and the third comparator (see result of 36 being turned on forcing switches off, [0058]). 12. The semiconductor switch according to claim 1, further comprising a voltage cut-off circuit that cuts off a first wiring connecting an output node of the protection circuit with a gate of the first switching transistor and a gate of the second switching transistor from a second wiring that supplies the electromotive force when the protection circuit forcibly turns off the first switching transistor and the second switching transistor (see 36, FIG2). 13. The semiconductor switch according to claim 12, wherein the voltage cut-off circuit includes a diode (41a/41b, FIG2) having an anode connected to the gate of the first switching transistor and the gate of the second switching transistor, and a cathode connected to an output node of the electromotive force generation circuit (noting the anode and cathode connected to all of said circuitry, albeit via intermediate circuitry, to form a complete and operative circuit as shown in FIG2). 14. The semiconductor switch according to claim 12, wherein the voltage cut-off circuit includes an analog switch (36). 15. The semiconductor switch according to claim 1, wherein the electromotive force generation circuit includes a light emitting element (source of light, not shown), a first photodiode array including two or more photodiodes that are connected in series (18a), receive light emitted by the light emitting element, and generate an electromotive force, a second photodiode array including two or more photodiodes that are connected in series (18b), receive light emitted by the light emitting element, and generate an electromotive force, a third photodiode array including two or more photodiodes that are connected in series (16c), receive light emitted by the light emitting element, and generate an electromotive force, and a voltage control circuit (22) that controls a voltage of a wiring connected to a gate of the first switching transistor and a gate of the second switching transistor based on the electromotive force generated by light reception in the second photodiode array and the electromotive force generated by light reception in the third photodiode array, and the electromotive force of the first photodiode array is used as a power supply voltage of the protection circuit. 16. The semiconductor switch according to claim 15, wherein a connection direction of the two or more photodiodes in the first photodiode array and the second photodiode array is opposite to a connection direction of the two or more photodiodes in the third photodiode array (see direction of 16c opposite of 18a, 16a, FIG2). 17. The semiconductor switch according to claim 16, wherein the voltage control circuit turns on both the first switching transistor and the second switching transistor when the electromotive force generated by light reception in the second photodiode array exceeds a first threshold voltage, and turns off both the first switching transistor and the second switching transistor when the electromotive force generated by light reception in the third photodiode array becomes equal to or less than a second threshold voltage (Noting that is the case of a solar powered system that if/when the solar power is available, the device is powered and alternatively, when the light source is not removed, there is no power to power the device) . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsunetsugu US 2024/0113706 in view of Mayer et al. US 2021/0028780 . Tsunetsugu fails to teach: 18. The semiconductor switch according to claim 1, further comprising a semiconductor chip incorporating the electromotive force generation circuit and the protection circuit. Mayer teaches a semiconductor switch wherein all of said switch and control circuitry is integrated on the same semiconductor chip (see FIG7 and [0038]). It would have been obvious to integrate the components of the semiconductor switch of Tsunetsugu onto the same semiconductor switch as taught by Mayer with the motivation of reducing size and cost of the chip/circuit, improved performance via close proximity, reduced power consumption of single chip design, and compact size . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 9-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL CAVALLARI whose telephone number is (571)272-8541. The examiner can normally be reached Mon-Fri 0900-18:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rexford Barnie can be reached at (571)272-7492. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DANIEL CAVALLARI/Primary Examiner, Art Unit 2836 Application/Control Number: 18/888,108 Page 2 Art Unit: 2836 Application/Control Number: 18/888,108 Page 3 Art Unit: 2836 Application/Control Number: 18/888,108 Page 4 Art Unit: 2836 Application/Control Number: 18/888,108 Page 5 Art Unit: 2836 Application/Control Number: 18/888,108 Page 6 Art Unit: 2836 Application/Control Number: 18/888,108 Page 7 Art Unit: 2836 Application/Control Number: 18/888,108 Page 8 Art Unit: 2836 Application/Control Number: 18/888,108 Page 9 Art Unit: 2836 Application/Control Number: 18/888,108 Page 10 Art Unit: 2836
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